1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3 3# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM4 4# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM5 5 6scvtf h0, w0 7scvtf s1, w1 8scvtf d2, x2 9 10fcvtzs w3, h3 11fcvtzs w4, s4 12fcvtzs x5, d5 13 14fmov h6, #2.0 15fmov s7, #4.0 16fmov d8, #8.0 17 18fmov h9, w9 19fmov s10, w10 20fmov d11, x11 21fmov v12.d[1], x12 22 23fmov w13, h13 24fmov w14, s14 25fmov x15, d15 26fmov x16, v16.d[1] 27 28# ALL: Iterations: 100 29 30# EM3-NEXT: Instructions: 1200 31# EM3-NEXT: Total Cycles: 405 32# EM3-NEXT: Total uOps: 1400 33 34# EM4-NEXT: Instructions: 1700 35# EM4-NEXT: Total Cycles: 1108 36# EM4-NEXT: Total uOps: 1900 37 38# EM5-NEXT: Instructions: 1700 39# EM5-NEXT: Total Cycles: 1407 40# EM5-NEXT: Total uOps: 1900 41 42# ALL: Dispatch Width: 6 43 44# EM3-NEXT: uOps Per Cycle: 3.46 45# EM3-NEXT: IPC: 2.96 46# EM3-NEXT: Block RThroughput: 4.0 47 48# EM4-NEXT: uOps Per Cycle: 1.71 49# EM4-NEXT: IPC: 1.53 50# EM4-NEXT: Block RThroughput: 11.0 51 52# EM5-NEXT: uOps Per Cycle: 1.35 53# EM5-NEXT: IPC: 1.21 54# EM5-NEXT: Block RThroughput: 14.0 55 56# ALL: Instruction Info: 57# ALL-NEXT: [1]: #uOps 58# ALL-NEXT: [2]: Latency 59# ALL-NEXT: [3]: RThroughput 60# ALL-NEXT: [4]: MayLoad 61# ALL-NEXT: [5]: MayStore 62# ALL-NEXT: [6]: HasSideEffects (U) 63 64# EM3: [1] [2] [3] [4] [5] [6] Instructions: 65# EM3-NEXT: 1 4 1.00 scvtf s1, w1 66# EM3-NEXT: 1 4 1.00 scvtf d2, x2 67# EM3-NEXT: 1 3 1.00 fcvtzs w4, s4 68# EM3-NEXT: 1 3 1.00 fcvtzs x5, d5 69# EM3-NEXT: 1 1 0.33 fmov s7, #4.00000000 70# EM3-NEXT: 1 1 0.33 fmov d8, #8.00000000 71# EM3-NEXT: 1 1 0.33 fmov s10, w10 72# EM3-NEXT: 1 1 0.33 fmov d11, x11 73# EM3-NEXT: 2 5 1.00 fmov v12.d[1], x12 74# EM3-NEXT: 1 1 0.33 fmov w14, s14 75# EM3-NEXT: 1 1 0.33 fmov x15, d15 76# EM3-NEXT: 2 5 1.00 fmov x16, v16.d[1] 77 78# EM4: [1] [2] [3] [4] [5] [6] Instructions: 79# EM4-NEXT: 1 6 1.00 scvtf h0, w0 80# EM4-NEXT: 1 6 1.00 scvtf s1, w1 81# EM4-NEXT: 1 6 1.00 scvtf d2, x2 82# EM4-NEXT: 1 4 1.00 fcvtzs w3, h3 83# EM4-NEXT: 1 4 1.00 fcvtzs w4, s4 84# EM4-NEXT: 1 4 1.00 fcvtzs x5, d5 85# EM4-NEXT: 1 1 0.33 fmov h6, #2.00000000 86# EM4-NEXT: 1 1 0.33 fmov s7, #4.00000000 87# EM4-NEXT: 1 1 0.33 fmov d8, #8.00000000 88# EM4-NEXT: 1 3 1.00 fmov h9, w9 89# EM4-NEXT: 1 3 1.00 fmov s10, w10 90# EM4-NEXT: 1 3 1.00 fmov d11, x11 91# EM4-NEXT: 2 2 1.00 fmov v12.d[1], x12 92# EM4-NEXT: 1 4 1.00 fmov w13, h13 93# EM4-NEXT: 1 4 1.00 fmov w14, s14 94# EM4-NEXT: 1 4 1.00 fmov x15, d15 95# EM4-NEXT: 2 5 1.00 fmov x16, v16.d[1] 96 97# EM5: [1] [2] [3] [4] [5] [6] Instructions: 98# EM5-NEXT: 1 6 1.00 scvtf h0, w0 99# EM5-NEXT: 1 6 1.00 scvtf s1, w1 100# EM5-NEXT: 1 6 1.00 scvtf d2, x2 101# EM5-NEXT: 1 4 1.00 fcvtzs w3, h3 102# EM5-NEXT: 1 4 1.00 fcvtzs w4, s4 103# EM5-NEXT: 1 4 1.00 fcvtzs x5, d5 104# EM5-NEXT: 1 1 0.33 fmov h6, #2.00000000 105# EM5-NEXT: 1 1 0.33 fmov s7, #4.00000000 106# EM5-NEXT: 1 1 0.33 fmov d8, #8.00000000 107# EM5-NEXT: 1 4 1.00 fmov h9, w9 108# EM5-NEXT: 1 4 1.00 fmov s10, w10 109# EM5-NEXT: 1 4 1.00 fmov d11, x11 110# EM5-NEXT: 2 6 1.00 fmov v12.d[1], x12 111# EM5-NEXT: 1 3 1.00 fmov w13, h13 112# EM5-NEXT: 1 3 1.00 fmov w14, s14 113# EM5-NEXT: 1 3 1.00 fmov x15, d15 114# EM5-NEXT: 2 5 1.00 fmov x16, v16.d[1] 115