1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s 3 4movbe %cx, (%rax) 5movbe (%rax), %cx 6 7movbe %ecx, (%rax) 8movbe (%rax), %ecx 9 10movbe %rcx, (%rax) 11movbe (%rax), %rcx 12 13# CHECK: Instruction Info: 14# CHECK-NEXT: [1]: #uOps 15# CHECK-NEXT: [2]: Latency 16# CHECK-NEXT: [3]: RThroughput 17# CHECK-NEXT: [4]: MayLoad 18# CHECK-NEXT: [5]: MayStore 19# CHECK-NEXT: [6]: HasSideEffects (U) 20 21# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 22# CHECK-NEXT: 3 2 1.00 * movbew %cx, (%rax) 23# CHECK-NEXT: 2 6 0.50 * movbew (%rax), %cx 24# CHECK-NEXT: 3 2 1.00 * movbel %ecx, (%rax) 25# CHECK-NEXT: 2 6 0.50 * movbel (%rax), %ecx 26# CHECK-NEXT: 3 2 1.00 * movbeq %rcx, (%rax) 27# CHECK-NEXT: 2 6 0.50 * movbeq (%rax), %rcx 28 29# CHECK: Resources: 30# CHECK-NEXT: [0] - BWDivider 31# CHECK-NEXT: [1] - BWFPDivider 32# CHECK-NEXT: [2] - BWPort0 33# CHECK-NEXT: [3] - BWPort1 34# CHECK-NEXT: [4] - BWPort2 35# CHECK-NEXT: [5] - BWPort3 36# CHECK-NEXT: [6] - BWPort4 37# CHECK-NEXT: [7] - BWPort5 38# CHECK-NEXT: [8] - BWPort6 39# CHECK-NEXT: [9] - BWPort7 40 41# CHECK: Resource pressure per iteration: 42# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] 43# CHECK-NEXT: - - - 3.00 2.50 2.50 3.00 3.00 - 1.00 44 45# CHECK: Resource pressure by instruction: 46# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: 47# CHECK-NEXT: - - - 0.50 0.33 0.33 1.00 0.50 - 0.33 movbew %cx, (%rax) 48# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - movbew (%rax), %cx 49# CHECK-NEXT: - - - 0.50 0.33 0.33 1.00 0.50 - 0.33 movbel %ecx, (%rax) 50# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - movbel (%rax), %ecx 51# CHECK-NEXT: - - - 0.50 0.33 0.33 1.00 0.50 - 0.33 movbeq %rcx, (%rax) 52# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - movbeq (%rax), %rcx 53