1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1500 -timeline -timeline-max-iterations=7 < %s | FileCheck %s 3 4# The lzcnt cannot execute in parallel with the imul because there is a false 5# dependency on %bx. 6 7imul %ax, %bx 8lzcnt %ax, %bx 9add %cx, %bx 10 11# CHECK: Iterations: 1500 12# CHECK-NEXT: Instructions: 4500 13# CHECK-NEXT: Total Cycles: 7503 14# CHECK-NEXT: Total uOps: 4500 15 16# CHECK: Dispatch Width: 4 17# CHECK-NEXT: uOps Per Cycle: 0.60 18# CHECK-NEXT: IPC: 0.60 19# CHECK-NEXT: Block RThroughput: 1.0 20 21# CHECK: Instruction Info: 22# CHECK-NEXT: [1]: #uOps 23# CHECK-NEXT: [2]: Latency 24# CHECK-NEXT: [3]: RThroughput 25# CHECK-NEXT: [4]: MayLoad 26# CHECK-NEXT: [5]: MayStore 27# CHECK-NEXT: [6]: HasSideEffects (U) 28 29# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 30# CHECK-NEXT: 1 3 1.00 imulw %ax, %bx 31# CHECK-NEXT: 1 1 0.25 lzcntw %ax, %bx 32# CHECK-NEXT: 1 1 0.25 addw %cx, %bx 33 34# CHECK: Resources: 35# CHECK-NEXT: [0] - Zn2AGU0 36# CHECK-NEXT: [1] - Zn2AGU1 37# CHECK-NEXT: [2] - Zn2AGU2 38# CHECK-NEXT: [3] - Zn2ALU0 39# CHECK-NEXT: [4] - Zn2ALU1 40# CHECK-NEXT: [5] - Zn2ALU2 41# CHECK-NEXT: [6] - Zn2ALU3 42# CHECK-NEXT: [7] - Zn2Divider 43# CHECK-NEXT: [8] - Zn2FPU0 44# CHECK-NEXT: [9] - Zn2FPU1 45# CHECK-NEXT: [10] - Zn2FPU2 46# CHECK-NEXT: [11] - Zn2FPU3 47# CHECK-NEXT: [12] - Zn2Multiplier 48 49# CHECK: Resource pressure per iteration: 50# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] 51# CHECK-NEXT: - - - 0.67 1.00 0.67 0.67 - - - - - 1.00 52 53# CHECK: Resource pressure by instruction: 54# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: 55# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulw %ax, %bx 56# CHECK-NEXT: - - - 0.33 - 0.33 0.33 - - - - - - lzcntw %ax, %bx 57# CHECK-NEXT: - - - 0.33 - 0.33 0.33 - - - - - - addw %cx, %bx 58 59# CHECK: Timeline view: 60# CHECK-NEXT: 0123456789 01234567 61# CHECK-NEXT: Index 0123456789 0123456789 62 63# CHECK: [0,0] DeeeER . . . . . . . imulw %ax, %bx 64# CHECK-NEXT: [0,1] D===eER . . . . . . . lzcntw %ax, %bx 65# CHECK-NEXT: [0,2] D====eER . . . . . . . addw %cx, %bx 66# CHECK-NEXT: [1,0] D=====eeeER . . . . . . imulw %ax, %bx 67# CHECK-NEXT: [1,1] .D=======eER . . . . . . lzcntw %ax, %bx 68# CHECK-NEXT: [1,2] .D========eER . . . . . . addw %cx, %bx 69# CHECK-NEXT: [2,0] .D=========eeeER . . . . . imulw %ax, %bx 70# CHECK-NEXT: [2,1] .D============eER . . . . . lzcntw %ax, %bx 71# CHECK-NEXT: [2,2] . D============eER . . . . . addw %cx, %bx 72# CHECK-NEXT: [3,0] . D=============eeeER . . . . imulw %ax, %bx 73# CHECK-NEXT: [3,1] . D================eER . . . . lzcntw %ax, %bx 74# CHECK-NEXT: [3,2] . D=================eER . . . . addw %cx, %bx 75# CHECK-NEXT: [4,0] . D=================eeeER . . . imulw %ax, %bx 76# CHECK-NEXT: [4,1] . D====================eER . . . lzcntw %ax, %bx 77# CHECK-NEXT: [4,2] . D=====================eER . . . addw %cx, %bx 78# CHECK-NEXT: [5,0] . D======================eeeER . . imulw %ax, %bx 79# CHECK-NEXT: [5,1] . D========================eER . . lzcntw %ax, %bx 80# CHECK-NEXT: [5,2] . D=========================eER . . addw %cx, %bx 81# CHECK-NEXT: [6,0] . D==========================eeeER . imulw %ax, %bx 82# CHECK-NEXT: [6,1] . D=============================eER. lzcntw %ax, %bx 83# CHECK-NEXT: [6,2] . D=============================eER addw %cx, %bx 84 85# CHECK: Average Wait times (based on the timeline view): 86# CHECK-NEXT: [0]: Executions 87# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 88# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 89# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 90 91# CHECK: [0] [1] [2] [3] 92# CHECK-NEXT: 0. 7 14.1 0.1 0.0 imulw %ax, %bx 93# CHECK-NEXT: 1. 7 16.9 0.0 0.0 lzcntw %ax, %bx 94# CHECK-NEXT: 2. 7 17.6 0.0 0.0 addw %cx, %bx 95# CHECK-NEXT: 7 16.2 0.0 0.0 <total> 96