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1// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm -convert-std-to-llvm | \
2// RUN: mlir-cpu-runner -e entry -entry-point-result=void  \
3// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
4// RUN: FileCheck %s
5
6func @entry() {
7  // Construct test vector.
8  %i1 = constant 1: i32
9  %i2 = constant 2: i32
10  %i3 = constant 3: i32
11  %i4 = constant 4: i32
12  %i5 = constant 5: i32
13  %i6 = constant -1: i32
14  %i7 = constant -2: i32
15  %i8 = constant -4: i32
16  %i9 = constant -80: i32
17  %i10 = constant -16: i32
18  %v0 = vector.broadcast %i1 : i32 to vector<10xi32>
19  %v1 = vector.insert %i2, %v0[1] : i32 into vector<10xi32>
20  %v2 = vector.insert %i3, %v1[2] : i32 into vector<10xi32>
21  %v3 = vector.insert %i4, %v2[3] : i32 into vector<10xi32>
22  %v4 = vector.insert %i5, %v3[4] : i32 into vector<10xi32>
23  %v5 = vector.insert %i6, %v4[5] : i32 into vector<10xi32>
24  %v6 = vector.insert %i7, %v5[6] : i32 into vector<10xi32>
25  %v7 = vector.insert %i8, %v6[7] : i32 into vector<10xi32>
26  %v8 = vector.insert %i9, %v7[8] : i32 into vector<10xi32>
27  %v9 = vector.insert %i10, %v8[9] : i32 into vector<10xi32>
28  vector.print %v9 : vector<10xi32>
29  //
30  // test vector:
31  //
32  // CHECK: ( 1, 2, 3, 4, 5, -1, -2, -4, -80, -16 )
33
34  // Various vector reductions. Not full functional unit tests, but
35  // a simple integration test to see if the code runs end-to-end.
36  %0 = vector.reduction "add", %v9 : vector<10xi32> into i32
37  vector.print %0 : i32
38  // CHECK: -88
39  %1 = vector.reduction "mul", %v9 : vector<10xi32> into i32
40  vector.print %1 : i32
41  // CHECK: -1228800
42  %2 = vector.reduction "min", %v9 : vector<10xi32> into i32
43  vector.print %2 : i32
44  // CHECK: -80
45  %3 = vector.reduction "max", %v9 : vector<10xi32> into i32
46  vector.print %3 : i32
47  // CHECK: 5
48  %4 = vector.reduction "and", %v9 : vector<10xi32> into i32
49  vector.print %4 : i32
50  // CHECK: 0
51  %5 = vector.reduction "or", %v9 : vector<10xi32> into i32
52  vector.print %5 : i32
53  // CHECK: -1
54  %6 = vector.reduction "xor", %v9 : vector<10xi32> into i32
55  vector.print %6 : i32
56  // CHECK: -68
57
58  return
59}
60