1// RUN: mlir-opt -std-expand %s -split-input-file | FileCheck %s 2 3// CHECK-LABEL: func @atomic_rmw_to_generic 4// CHECK-SAME: ([[F:%.*]]: memref<10xf32>, [[f:%.*]]: f32, [[i:%.*]]: index) 5func @atomic_rmw_to_generic(%F: memref<10xf32>, %f: f32, %i: index) -> f32 { 6 %x = atomic_rmw "maxf" %f, %F[%i] : (f32, memref<10xf32>) -> f32 7 return %x : f32 8} 9// CHECK: %0 = std.generic_atomic_rmw %arg0[%arg2] : memref<10xf32> { 10// CHECK: ^bb0([[CUR_VAL:%.*]]: f32): 11// CHECK: [[CMP:%.*]] = cmpf "ogt", [[CUR_VAL]], [[f]] : f32 12// CHECK: [[SELECT:%.*]] = select [[CMP]], [[CUR_VAL]], [[f]] : f32 13// CHECK: atomic_yield [[SELECT]] : f32 14// CHECK: } 15// CHECK: return %0 : f32 16 17// ----- 18 19// CHECK-LABEL: func @atomic_rmw_no_conversion 20func @atomic_rmw_no_conversion(%F: memref<10xf32>, %f: f32, %i: index) -> f32 { 21 %x = atomic_rmw "addf" %f, %F[%i] : (f32, memref<10xf32>) -> f32 22 return %x : f32 23} 24// CHECK-NOT: generic_atomic_rmw 25 26// ----- 27 28// Test ceil divide with signed integer 29// CHECK-LABEL: func @ceildivi 30// CHECK-SAME: ([[ARG0:%.+]]: i32, [[ARG1:%.+]]: i32) -> i32 { 31func @ceildivi(%arg0: i32, %arg1: i32) -> (i32) { 32 %res = ceildivi_signed %arg0, %arg1 : i32 33 return %res : i32 34 35// CHECK: [[ONE:%.+]] = constant 1 : i32 36// CHECK: [[ZERO:%.+]] = constant 0 : i32 37// CHECK: [[MINONE:%.+]] = constant -1 : i32 38// CHECK: [[CMP1:%.+]] = cmpi "sgt", [[ARG1]], [[ZERO]] : i32 39// CHECK: [[X:%.+]] = select [[CMP1]], [[MINONE]], [[ONE]] : i32 40// CHECK: [[TRUE1:%.+]] = addi [[X]], [[ARG0]] : i32 41// CHECK: [[TRUE2:%.+]] = divi_signed [[TRUE1]], [[ARG1]] : i32 42// CHECK: [[TRUE3:%.+]] = addi [[ONE]], [[TRUE2]] : i32 43// CHECK: [[FALSE1:%.+]] = subi [[ZERO]], [[ARG0]] : i32 44// CHECK: [[FALSE2:%.+]] = divi_signed [[FALSE1]], [[ARG1]] : i32 45// CHECK: [[FALSE3:%.+]] = subi [[ZERO]], [[FALSE2]] : i32 46// CHECK: [[NNEG:%.+]] = cmpi "slt", [[ARG0]], [[ZERO]] : i32 47// CHECK: [[NPOS:%.+]] = cmpi "sgt", [[ARG0]], [[ZERO]] : i32 48// CHECK: [[MNEG:%.+]] = cmpi "slt", [[ARG1]], [[ZERO]] : i32 49// CHECK: [[MPOS:%.+]] = cmpi "sgt", [[ARG1]], [[ZERO]] : i32 50// CHECK: [[TERM1:%.+]] = and [[NNEG]], [[MNEG]] : i1 51// CHECK: [[TERM2:%.+]] = and [[NPOS]], [[MPOS]] : i1 52// CHECK: [[CMP2:%.+]] = or [[TERM1]], [[TERM2]] : i1 53// CHECK: [[RES:%.+]] = select [[CMP2]], [[TRUE3]], [[FALSE3]] : i32 54} 55 56// ----- 57 58// Test floor divide with signed integer 59// CHECK-LABEL: func @floordivi 60// CHECK-SAME: ([[ARG0:%.+]]: i32, [[ARG1:%.+]]: i32) -> i32 { 61func @floordivi(%arg0: i32, %arg1: i32) -> (i32) { 62 %res = floordivi_signed %arg0, %arg1 : i32 63 return %res : i32 64// CHECK: [[ONE:%.+]] = constant 1 : i32 65// CHECK: [[ZERO:%.+]] = constant 0 : i32 66// CHECK: [[MIN1:%.+]] = constant -1 : i32 67// CHECK: [[CMP1:%.+]] = cmpi "slt", [[ARG1]], [[ZERO]] : i32 68// CHECK: [[X:%.+]] = select [[CMP1]], [[ONE]], [[MIN1]] : i32 69// CHECK: [[TRUE1:%.+]] = subi [[X]], [[ARG0]] : i32 70// CHECK: [[TRUE2:%.+]] = divi_signed [[TRUE1]], [[ARG1]] : i32 71// CHECK: [[TRUE3:%.+]] = subi [[MIN1]], [[TRUE2]] : i32 72// CHECK: [[FALSE:%.+]] = divi_signed [[ARG0]], [[ARG1]] : i32 73// CHECK: [[NNEG:%.+]] = cmpi "slt", [[ARG0]], [[ZERO]] : i32 74// CHECK: [[NPOS:%.+]] = cmpi "sgt", [[ARG0]], [[ZERO]] : i32 75// CHECK: [[MNEG:%.+]] = cmpi "slt", [[ARG1]], [[ZERO]] : i32 76// CHECK: [[MPOS:%.+]] = cmpi "sgt", [[ARG1]], [[ZERO]] : i32 77// CHECK: [[TERM1:%.+]] = and [[NNEG]], [[MPOS]] : i1 78// CHECK: [[TERM2:%.+]] = and [[NPOS]], [[MNEG]] : i1 79// CHECK: [[CMP2:%.+]] = or [[TERM1]], [[TERM2]] : i1 80// CHECK: [[RES:%.+]] = select [[CMP2]], [[TRUE3]], [[FALSE]] : i32 81} 82 83// ----- 84 85// CHECK-LABEL: func @memref_reshape( 86func @memref_reshape(%input: memref<*xf32>, 87 %shape: memref<3xi32>) -> memref<?x?x?xf32> { 88 %result = memref_reshape %input(%shape) 89 : (memref<*xf32>, memref<3xi32>) -> memref<?x?x?xf32> 90 return %result : memref<?x?x?xf32> 91} 92// CHECK-SAME: [[SRC:%.*]]: memref<*xf32>, 93// CHECK-SAME: [[SHAPE:%.*]]: memref<3xi32>) -> memref<?x?x?xf32> { 94 95// CHECK: [[C1:%.*]] = constant 1 : index 96// CHECK: [[C2:%.*]] = constant 2 : index 97// CHECK: [[DIM_2:%.*]] = load [[SHAPE]]{{\[}}[[C2]]] : memref<3xi32> 98// CHECK: [[SIZE_2:%.*]] = index_cast [[DIM_2]] : i32 to index 99// CHECK: [[STRIDE_1:%.*]] = muli [[C1]], [[SIZE_2]] : index 100 101// CHECK: [[C1_:%.*]] = constant 1 : index 102// CHECK: [[DIM_1:%.*]] = load [[SHAPE]]{{\[}}[[C1_]]] : memref<3xi32> 103// CHECK: [[SIZE_1:%.*]] = index_cast [[DIM_1]] : i32 to index 104// CHECK: [[STRIDE_0:%.*]] = muli [[STRIDE_1]], [[SIZE_1]] : index 105 106// CHECK: [[C0:%.*]] = constant 0 : index 107// CHECK: [[DIM_0:%.*]] = load [[SHAPE]]{{\[}}[[C0]]] : memref<3xi32> 108// CHECK: [[SIZE_0:%.*]] = index_cast [[DIM_0]] : i32 to index 109 110// CHECK: [[RESULT:%.*]] = memref_reinterpret_cast [[SRC]] 111// CHECK-SAME: to offset: [0], sizes: {{\[}}[[SIZE_0]], [[SIZE_1]], [[SIZE_2]]], 112// CHECK-SAME: strides: {{\[}}[[STRIDE_0]], [[STRIDE_1]], [[C1]]] 113// CHECK-SAME: : memref<*xf32> to memref<?x?x?xf32> 114