1; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s -check-prefix=SEQUENTIAL 2; RUN: opt %loadPolly -polly-codegen -polly-ast-detect-parallel -S < %s | FileCheck %s -check-prefix=PARALLEL 3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 4 5; This is a trivially parallel loop. We just use it to ensure that we actually 6; emit the right information. 7; 8; for (i = 0; i < n; i++) 9; A[i] = 1; 10; 11@A = common global [1024 x i32] zeroinitializer 12define void @test-one(i64 %n) { 13start: 14 fence seq_cst 15 br label %loop.header 16 17loop.header: 18 %i = phi i64 [ 0, %start ], [ %i.next, %loop.backedge ] 19 %exitcond = icmp ne i64 %i, %n 20 br i1 %exitcond, label %loop.body, label %ret 21 22loop.body: 23 %scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %i 24 store i32 1, i32* %scevgep 25 br label %loop.backedge 26 27loop.backedge: 28 %i.next = add nsw i64 %i, 1 29 br label %loop.header 30 31ret: 32 fence seq_cst 33 ret void 34} 35 36; SEQUENTIAL: @test-one 37; SEQUENTIAL-NOT: !llvm.mem.parallel_loop_access 38; SEQUENTIAL-NOT: !llvm.loop 39 40; PARALLEL: @test-one 41; PARALLEL: store i32 1, i32* %scevgep1, {{[ ._!,a-zA-Z0-9]*}}, !llvm.mem.parallel_loop_access ![[LoopID:[0-9]*]] 42; PARALLEL: br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit, !llvm.loop ![[LoopID]] 43 44; This loop has memory dependences that require at least a simple dependence 45; analysis to detect the parallelism. 46; 47; for (i = 0; i < n; i++) 48; A[2 * i] = A[2 * i + 1]; 49; 50define void @test-two(i64 %n) { 51start: 52 fence seq_cst 53 br label %loop.header 54 55loop.header: 56 %i = phi i64 [ 0, %start ], [ %i.next, %loop.backedge ] 57 %exitcond = icmp ne i64 %i, %n 58 br i1 %exitcond, label %loop.body, label %ret 59 60loop.body: 61 %loadoffset1 = mul nsw i64 %i, 2 62 %loadoffset2 = add nsw i64 %loadoffset1, 1 63 %scevgepload = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %loadoffset2 64 %val = load i32, i32* %scevgepload 65 %storeoffset = mul i64 %i, 2 66 %scevgepstore = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %storeoffset 67 store i32 %val, i32* %scevgepstore 68 br label %loop.backedge 69 70loop.backedge: 71 %i.next = add nsw i64 %i, 1 72 br label %loop.header 73 74ret: 75 fence seq_cst 76 ret void 77} 78 79; SEQUENTIAL: @test-two 80; SEQUENTIAL-NOT: !llvm.mem.parallel_loop_access 81; SEQUENTIAL-NOT: !llvm.loop 82 83; PARALLEL: @test-two 84; PARALLEL: %val_p_scalar_ = load i32, i32* %scevgep, {{[ ._!,a-zA-Z0-9]*}}, !llvm.mem.parallel_loop_access ![[LoopID:[0-9]*]] 85; PARALLEL: store i32 %val_p_scalar_, i32* %scevgep1, {{[ ._!,a-zA-Z0-9]*}}, !llvm.mem.parallel_loop_access ![[LoopID]] 86; PARALLEL: br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit, !llvm.loop ![[LoopID]] 87