1{ 2 "arrays" : [ 3 { 4 "name" : "MemRef_symmat", 5 "sizes" : [ "*", "1000" ], 6 "type" : "double" 7 } 8 ], 9 "context" : "{ : }", 10 "name" : "%for.body98---%for.cond87.loopexit", 11 "statements" : [ 12 { 13 "accesses" : [ 14 { 15 "kind" : "write", 16 "relation" : "{ Stmt_for_body105[i0, i1] -> MemRef_symmat[1 + i0, 0] }" 17 } 18 ], 19 "domain" : "{ Stmt_for_body105[i0, i1] : 0 <= i0 <= 998 and 0 <= i1 <= 999 }", 20 "name" : "Stmt_for_body105", 21 "schedule" : "{ Stmt_for_body105[i0, i1] -> [i0, 0, i1] }" 22 }, 23 { 24 "accesses" : [ 25 { 26 "kind" : "write", 27 "relation" : "{ Stmt_for_end122[i0] -> MemRef_symmat[1 + i0, 0] }" 28 }, 29 { 30 "kind" : "read", 31 "relation" : "{ Stmt_for_end122[i0] -> MemRef_symmat[1 + i0, 0] }" 32 } 33 ], 34 "domain" : "{ Stmt_for_end122[i0] : 0 <= i0 <= 998 }", 35 "name" : "Stmt_for_end122", 36 "schedule" : "{ Stmt_for_end122[i0] -> [i0, 1, 0] }" 37 } 38 ] 39} 40