1;RUN: opt -mtriple=amdgcn-mesa-mesa3d -analyze -divergence %s | FileCheck %s 2 3;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.swap.i32( 4define float @image_atomic_swap(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 5main_body: 6 %orig = call i32 @llvm.amdgcn.image.atomic.swap.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 7 %r = bitcast i32 %orig to float 8 ret float %r 9} 10 11;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.add.i32( 12define float @image_atomic_add(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 13main_body: 14 %orig = call i32 @llvm.amdgcn.image.atomic.add.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 15 %r = bitcast i32 %orig to float 16 ret float %r 17} 18 19;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.sub.i32( 20define float @image_atomic_sub(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 21main_body: 22 %orig = call i32 @llvm.amdgcn.image.atomic.sub.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 23 %r = bitcast i32 %orig to float 24 ret float %r 25} 26 27;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.smin.i32( 28define float @image_atomic_smin(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 29main_body: 30 %orig = call i32 @llvm.amdgcn.image.atomic.smin.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 31 %r = bitcast i32 %orig to float 32 ret float %r 33} 34 35;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.umin.i32( 36define float @image_atomic_umin(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 37main_body: 38 %orig = call i32 @llvm.amdgcn.image.atomic.umin.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 39 %r = bitcast i32 %orig to float 40 ret float %r 41} 42 43;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.smax.i32( 44define float @image_atomic_smax(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 45main_body: 46 %orig = call i32 @llvm.amdgcn.image.atomic.smax.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 47 %r = bitcast i32 %orig to float 48 ret float %r 49} 50 51;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.umax.i32( 52define float @image_atomic_umax(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 53main_body: 54 %orig = call i32 @llvm.amdgcn.image.atomic.umax.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 55 %r = bitcast i32 %orig to float 56 ret float %r 57} 58 59;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.and.i32( 60define float @image_atomic_and(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 61main_body: 62 %orig = call i32 @llvm.amdgcn.image.atomic.and.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 63 %r = bitcast i32 %orig to float 64 ret float %r 65} 66 67;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.or.i32( 68define float @image_atomic_or(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 69main_body: 70 %orig = call i32 @llvm.amdgcn.image.atomic.or.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 71 %r = bitcast i32 %orig to float 72 ret float %r 73} 74 75;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.xor.i32( 76define float @image_atomic_xor(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 77main_body: 78 %orig = call i32 @llvm.amdgcn.image.atomic.xor.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 79 %r = bitcast i32 %orig to float 80 ret float %r 81} 82 83;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.inc.i32( 84define float @image_atomic_inc(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 85main_body: 86 %orig = call i32 @llvm.amdgcn.image.atomic.inc.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 87 %r = bitcast i32 %orig to float 88 ret float %r 89} 90 91;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.dec.i32( 92define float @image_atomic_dec(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 93main_body: 94 %orig = call i32 @llvm.amdgcn.image.atomic.dec.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 95 %r = bitcast i32 %orig to float 96 ret float %r 97} 98 99;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.cmpswap.i32( 100define float @image_atomic_cmpswap(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data, i32 inreg %cmp) #0 { 101main_body: 102 %orig = call i32 @llvm.amdgcn.image.atomic.cmpswap.i32(i32 %data, i32 %cmp, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 103 %r = bitcast i32 %orig to float 104 ret float %r 105} 106 107declare i32 @llvm.amdgcn.image.atomic.swap.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 108declare i32 @llvm.amdgcn.image.atomic.add.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 109declare i32 @llvm.amdgcn.image.atomic.sub.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 110declare i32 @llvm.amdgcn.image.atomic.smin.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 111declare i32 @llvm.amdgcn.image.atomic.umin.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 112declare i32 @llvm.amdgcn.image.atomic.smax.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 113declare i32 @llvm.amdgcn.image.atomic.umax.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 114declare i32 @llvm.amdgcn.image.atomic.and.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 115declare i32 @llvm.amdgcn.image.atomic.or.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 116declare i32 @llvm.amdgcn.image.atomic.xor.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 117declare i32 @llvm.amdgcn.image.atomic.inc.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 118declare i32 @llvm.amdgcn.image.atomic.dec.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 119declare i32 @llvm.amdgcn.image.atomic.cmpswap.i32(i32, i32, i32, <8 x i32>,i1, i1, i1) #0 120 121attributes #0 = { nounwind } 122