1; RUN: llc < %s -mtriple=armv7-eabi -float-abi=hard -mcpu=cortex-a8 | FileCheck %s 2 3; CHECK-LABEL: test: 4; CHECK: vabs.f32 q0, q0 5define <4 x float> @test(<4 x float> %a) { 6 %foo = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a) 7 ret <4 x float> %foo 8} 9declare <4 x float> @llvm.fabs.v4f32(<4 x float> %a) 10 11; CHECK-LABEL: test2: 12; CHECK: vabs.f32 d0, d0 13define <2 x float> @test2(<2 x float> %a) { 14 %foo = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a) 15 ret <2 x float> %foo 16} 17declare <2 x float> @llvm.fabs.v2f32(<2 x float> %a) 18 19; No constant pool loads or vector ops are needed for the fabs of a 20; bitcasted integer constant; we should just return integer constants 21; that have the sign bits turned off. 22; 23; So instead of something like this: 24; mvn r0, #0 25; mov r1, #0 26; vmov d16, r1, r0 27; vabs.f32 d16, d16 28; vmov r0, r1, d16 29; bx lr 30; 31; We should generate: 32; mov r0, #0 33; mvn r1, #-2147483648 34; bx lr 35 36define i64 @fabs_v2f32_1() { 37; CHECK-LABEL: fabs_v2f32_1: 38; CHECK: mvn r1, #-2147483648 39; CHECK: bx lr 40; CHECK-NOT: vabs 41 %bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000 42 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast) 43 %ret = bitcast <2 x float> %fabs to i64 44 ret i64 %ret 45} 46 47define i64 @fabs_v2f32_2() { 48; CHECK-LABEL: fabs_v2f32_2: 49; CHECK: mvn r0, #-2147483648 50; CHECK: bx lr 51; CHECK-NOT: vabs 52 %bitcast = bitcast i64 4294967295 to <2 x float> ; 0x0000_0000_FFFF_FFFF 53 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast) 54 %ret = bitcast <2 x float> %fabs to i64 55 ret i64 %ret 56} 57