1; RUN: llc -march=mips < %s 2; RUN: llc -march=mips -mattr=+msa,+fp64 < %s 3; RUN: llc -march=mipsel < %s 4; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s 5 6; This test originally failed for MSA with a 7; "Type for zero vector elements is not legal" assertion. 8; It should at least successfully build. 9 10define void @autogen_SD3926023935(i8*, i32*, i64*, i32, i64, i8) { 11BB: 12 %A4 = alloca i1 13 %A3 = alloca float 14 %A2 = alloca double 15 %A1 = alloca float 16 %A = alloca double 17 %L = load i8, i8* %0 18 store i8 -123, i8* %0 19 %E = extractelement <4 x i64> zeroinitializer, i32 1 20 %Shuff = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 21 %I = insertelement <2 x i1> zeroinitializer, i1 false, i32 0 22 %BC = bitcast i64 181325 to double 23 %Sl = select i1 false, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer 24 %Cmp = icmp ne <4 x i64> zeroinitializer, zeroinitializer 25 %L5 = load i8, i8* %0 26 store i8 %L, i8* %0 27 %E6 = extractelement <4 x i64> zeroinitializer, i32 3 28 %Shuff7 = shufflevector <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i32> <i32 2, i32 0> 29 %I8 = insertelement <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, i64 498254, i32 4 30 %B = shl i32 0, 364464 31 %Sl9 = select i1 false, i64 %E, i64 498254 32 %Cmp10 = icmp sge i8 -123, %5 33 br label %CF80 34 35CF80: ; preds = %BB 36 %L11 = load i8, i8* %0 37 store i8 -123, i8* %0 38 %E12 = extractelement <2 x i16> zeroinitializer, i32 1 39 %Shuff13 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 40 %I14 = insertelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 %B, i32 2 41 %B15 = sdiv i64 334618, -1 42 %PC = bitcast i1* %A4 to i64* 43 %Sl16 = select i1 %Cmp10, <4 x i32> zeroinitializer, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1> 44 %Cmp17 = icmp ule <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %Sl16 45 %L18 = load double, double* %A2 46 store i64 498254, i64* %PC 47 %E19 = extractelement <4 x i64> zeroinitializer, i32 0 48 %Shuff20 = shufflevector <2 x i1> zeroinitializer, <2 x i1> %I, <2 x i32> <i32 3, i32 1> 49 %I21 = insertelement <2 x i1> zeroinitializer, i1 false, i32 1 50 %B22 = fadd double 0.000000e+00, %BC 51 %ZE = zext <2 x i1> %Shuff20 to <2 x i32> 52 %Sl23 = select i1 %Cmp10, <2 x i1> %Shuff20, <2 x i1> zeroinitializer 53 %Cmp24 = icmp ult <2 x i32> zeroinitializer, zeroinitializer 54 %L25 = load i8, i8* %0 55 store i8 %L25, i8* %0 56 %E26 = extractelement <4 x i8> <i8 -1, i8 -1, i8 -1, i8 -1>, i32 3 57 %Shuff27 = shufflevector <4 x i32> %Shuff, <4 x i32> %I14, <4 x i32> <i32 6, i32 0, i32 undef, i32 4> 58 %I28 = insertelement <4 x i32> zeroinitializer, i32 %3, i32 0 59 %B29 = lshr i8 %E26, -43 60 %Tr = trunc i8 %L5 to i1 61 br label %CF79 62 63CF79: ; preds = %CF80 64 %Sl30 = select i1 false, i8 %B29, i8 -123 65 %Cmp31 = icmp sge <2 x i1> %I, %I 66 %L32 = load i64, i64* %PC 67 store i8 -123, i8* %0 68 %E33 = extractelement <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, i32 2 69 %Shuff34 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff13, <4 x i32> <i32 5, i32 7, i32 1, i32 3> 70 %I35 = insertelement <4 x i64> zeroinitializer, i64 498254, i32 3 71 %B36 = sub <8 x i64> %I8, <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1> 72 %PC37 = bitcast i8* %0 to i1* 73 %Sl38 = select i1 %Cmp10, i8 -43, i8 %L5 74 %Cmp39 = icmp eq i64 498254, %B15 75 br label %CF 76 77CF: ; preds = %CF, %CF79 78 %L40 = load double, double* %A 79 store i1 %Cmp39, i1* %PC37 80 %E41 = extractelement <4 x i64> zeroinitializer, i32 3 81 %Shuff42 = shufflevector <2 x i32> zeroinitializer, <2 x i32> %ZE, <2 x i32> <i32 2, i32 undef> 82 %I43 = insertelement <4 x i32> %Shuff, i32 %3, i32 0 83 %B44 = shl i64 %E41, -1 84 %Se = sext <2 x i1> %I to <2 x i32> 85 %Sl45 = select i1 %Cmp10, i1 false, i1 false 86 br i1 %Sl45, label %CF, label %CF77 87 88CF77: ; preds = %CF77, %CF 89 %Cmp46 = fcmp uno double 0.000000e+00, 0.000000e+00 90 br i1 %Cmp46, label %CF77, label %CF78 91 92CF78: ; preds = %CF78, %CF83, %CF82, %CF77 93 %L47 = load i64, i64* %PC 94 store i8 -123, i8* %0 95 %E48 = extractelement <4 x i64> zeroinitializer, i32 3 96 %Shuff49 = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 undef> 97 %I50 = insertelement <2 x i1> zeroinitializer, i1 %Cmp10, i32 0 98 %B51 = sdiv i64 %E19, 463132 99 %Tr52 = trunc i64 %E48 to i32 100 %Sl53 = select i1 %Tr, i1 %Cmp46, i1 %Cmp10 101 br i1 %Sl53, label %CF78, label %CF83 102 103CF83: ; preds = %CF78 104 %Cmp54 = fcmp uge double %L40, %L40 105 br i1 %Cmp54, label %CF78, label %CF82 106 107CF82: ; preds = %CF83 108 %L55 = load i64, i64* %PC 109 store i64 %L32, i64* %PC 110 %E56 = extractelement <2 x i16> %Shuff7, i32 1 111 %Shuff57 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 0> 112 %I58 = insertelement <2 x i32> %Sl, i32 %Tr52, i32 0 113 %B59 = or i32 %B, %3 114 %FC = sitofp i64 498254 to double 115 %Sl60 = select i1 false, i64 %E6, i64 -1 116 %Cmp61 = icmp sgt <4 x i32> %Shuff27, %I43 117 %L62 = load i64, i64* %PC 118 store i64 %Sl9, i64* %PC 119 %E63 = extractelement <2 x i32> %ZE, i32 0 120 %Shuff64 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff13, <4 x i32> <i32 1, i32 3, i32 undef, i32 7> 121 %I65 = insertelement <4 x i32> %Shuff, i32 %3, i32 3 122 %B66 = sub i64 %L47, 53612 123 %Tr67 = trunc i64 %4 to i32 124 %Sl68 = select i1 %Cmp39, i1 %Cmp39, i1 false 125 br i1 %Sl68, label %CF78, label %CF81 126 127CF81: ; preds = %CF82 128 %Cmp69 = icmp ne <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, %B36 129 %L70 = load i8, i8* %0 130 store i64 %L55, i64* %PC 131 %E71 = extractelement <4 x i32> %Shuff49, i32 1 132 %Shuff72 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff34, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 133 %I73 = insertelement <4 x i64> %Shuff64, i64 %E, i32 2 134 %B74 = lshr <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, %B36 135 %Sl75 = select i1 %Sl68, i64 %B51, i64 %L55 136 %Cmp76 = icmp sgt <8 x i64> %B74, %B36 137 store i1 %Cmp39, i1* %PC37 138 store i64 %E41, i64* %PC 139 store i64 %L32, i64* %PC 140 store i64 %Sl75, i64* %2 141 store i64 %L32, i64* %PC 142 ret void 143} 144