1; Test 64-bit atomic exchange. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5; Check register exchange. 6define i64 @f1(i64 %dummy, i64 *%src, i64 %b) { 7; CHECK-LABEL: f1: 8; CHECK: lg %r2, 0(%r3) 9; CHECK: [[LABEL:\.[^:]*]]: 10; CHECK: csg %r2, %r4, 0(%r3) 11; CHECK: jl [[LABEL]] 12; CHECK: br %r14 13 %res = atomicrmw xchg i64 *%src, i64 %b seq_cst 14 ret i64 %res 15} 16 17; Check the high end of the aligned CSG range. 18define i64 @f2(i64 %dummy, i64 *%src, i64 %b) { 19; CHECK-LABEL: f2: 20; CHECK: lg %r2, 524280(%r3) 21; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3) 22; CHECK: br %r14 23 %ptr = getelementptr i64, i64 *%src, i64 65535 24 %res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst 25 ret i64 %res 26} 27 28; Check the next doubleword up, which requires separate address logic. 29define i64 @f3(i64 %dummy, i64 *%src, i64 %b) { 30; CHECK-LABEL: f3: 31; CHECK: agfi %r3, 524288 32; CHECK: lg %r2, 0(%r3) 33; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3) 34; CHECK: br %r14 35 %ptr = getelementptr i64, i64 *%src, i64 65536 36 %res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst 37 ret i64 %res 38} 39 40; Check the low end of the CSG range. 41define i64 @f4(i64 %dummy, i64 *%src, i64 %b) { 42; CHECK-LABEL: f4: 43; CHECK: lg %r2, -524288(%r3) 44; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3) 45; CHECK: br %r14 46 %ptr = getelementptr i64, i64 *%src, i64 -65536 47 %res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst 48 ret i64 %res 49} 50 51; Check the next doubleword down, which requires separate address logic. 52define i64 @f5(i64 %dummy, i64 *%src, i64 %b) { 53; CHECK-LABEL: f5: 54; CHECK: agfi %r3, -524296 55; CHECK: lg %r2, 0(%r3) 56; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3) 57; CHECK: br %r14 58 %ptr = getelementptr i64, i64 *%src, i64 -65537 59 %res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst 60 ret i64 %res 61} 62 63; Check that indexed addresses are not allowed. 64define i64 @f6(i64 %dummy, i64 %base, i64 %index, i64 %b) { 65; CHECK-LABEL: f6: 66; CHECK: agr %r3, %r4 67; CHECK: lg %r2, 0(%r3) 68; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3) 69; CHECK: br %r14 70 %add = add i64 %base, %index 71 %ptr = inttoptr i64 %add to i64 * 72 %res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst 73 ret i64 %res 74} 75 76; Check exchange of a constant. We should force it into a register and 77; use the sequence above. 78define i64 @f7(i64 %dummy, i64 *%ptr) { 79; CHECK-LABEL: f7: 80; CHECK: llilf [[VALUE:%r[0-9+]]], 3000000000 81; CHECK: lg %r2, 0(%r3) 82; CHECK: [[LABEL:\.[^:]*]]: 83; CHECK: csg %r2, [[VALUE]], 0(%r3) 84; CHECK: jl [[LABEL]] 85; CHECK: br %r14 86 %res = atomicrmw xchg i64 *%ptr, i64 3000000000 seq_cst 87 ret i64 %res 88} 89