1; Test 32-bit byteswaps from memory to registers. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5declare i32 @llvm.bswap.i32(i32 %a) 6 7; Check LRV with no displacement. 8define i32 @f1(i32 *%src) { 9; CHECK-LABEL: f1: 10; CHECK: lrv %r2, 0(%r2) 11; CHECK: br %r14 12 %a = load i32 , i32 *%src 13 %swapped = call i32 @llvm.bswap.i32(i32 %a) 14 ret i32 %swapped 15} 16 17; Check the high end of the aligned LRV range. 18define i32 @f2(i32 *%src) { 19; CHECK-LABEL: f2: 20; CHECK: lrv %r2, 524284(%r2) 21; CHECK: br %r14 22 %ptr = getelementptr i32, i32 *%src, i64 131071 23 %a = load i32 , i32 *%ptr 24 %swapped = call i32 @llvm.bswap.i32(i32 %a) 25 ret i32 %swapped 26} 27 28; Check the next word up, which needs separate address logic. 29; Other sequences besides this one would be OK. 30define i32 @f3(i32 *%src) { 31; CHECK-LABEL: f3: 32; CHECK: agfi %r2, 524288 33; CHECK: lrv %r2, 0(%r2) 34; CHECK: br %r14 35 %ptr = getelementptr i32, i32 *%src, i64 131072 36 %a = load i32 , i32 *%ptr 37 %swapped = call i32 @llvm.bswap.i32(i32 %a) 38 ret i32 %swapped 39} 40 41; Check the high end of the negative aligned LRV range. 42define i32 @f4(i32 *%src) { 43; CHECK-LABEL: f4: 44; CHECK: lrv %r2, -4(%r2) 45; CHECK: br %r14 46 %ptr = getelementptr i32, i32 *%src, i64 -1 47 %a = load i32 , i32 *%ptr 48 %swapped = call i32 @llvm.bswap.i32(i32 %a) 49 ret i32 %swapped 50} 51 52; Check the low end of the LRV range. 53define i32 @f5(i32 *%src) { 54; CHECK-LABEL: f5: 55; CHECK: lrv %r2, -524288(%r2) 56; CHECK: br %r14 57 %ptr = getelementptr i32, i32 *%src, i64 -131072 58 %a = load i32 , i32 *%ptr 59 %swapped = call i32 @llvm.bswap.i32(i32 %a) 60 ret i32 %swapped 61} 62 63; Check the next word down, which needs separate address logic. 64; Other sequences besides this one would be OK. 65define i32 @f6(i32 *%src) { 66; CHECK-LABEL: f6: 67; CHECK: agfi %r2, -524292 68; CHECK: lrv %r2, 0(%r2) 69; CHECK: br %r14 70 %ptr = getelementptr i32, i32 *%src, i64 -131073 71 %a = load i32 , i32 *%ptr 72 %swapped = call i32 @llvm.bswap.i32(i32 %a) 73 ret i32 %swapped 74} 75 76; Check that LRV allows an index. 77define i32 @f7(i64 %src, i64 %index) { 78; CHECK-LABEL: f7: 79; CHECK: lrv %r2, 524287({{%r3,%r2|%r2,%r3}}) 80; CHECK: br %r14 81 %add1 = add i64 %src, %index 82 %add2 = add i64 %add1, 524287 83 %ptr = inttoptr i64 %add2 to i32 * 84 %a = load i32 , i32 *%ptr 85 %swapped = call i32 @llvm.bswap.i32(i32 %a) 86 ret i32 %swapped 87} 88 89; Check that volatile accesses do not use LRV, which might access the 90; storage multple times. 91define i32 @f8(i32 *%src) { 92; CHECK-LABEL: f8: 93; CHECK: l [[REG:%r[0-5]]], 0(%r2) 94; CHECK: lrvr %r2, [[REG]] 95; CHECK: br %r14 96 %a = load volatile i32 , i32 *%src 97 %swapped = call i32 @llvm.bswap.i32(i32 %a) 98 ret i32 %swapped 99} 100 101; Test a case where we spill the source of at least one LRVR. We want 102; to use LRV if possible. 103define void @f9(i32 *%ptr) { 104; CHECK-LABEL: f9: 105; CHECK: lrv {{%r[0-9]+}}, 16{{[04]}}(%r15) 106; CHECK: br %r14 107 %val0 = load volatile i32 , i32 *%ptr 108 %val1 = load volatile i32 , i32 *%ptr 109 %val2 = load volatile i32 , i32 *%ptr 110 %val3 = load volatile i32 , i32 *%ptr 111 %val4 = load volatile i32 , i32 *%ptr 112 %val5 = load volatile i32 , i32 *%ptr 113 %val6 = load volatile i32 , i32 *%ptr 114 %val7 = load volatile i32 , i32 *%ptr 115 %val8 = load volatile i32 , i32 *%ptr 116 %val9 = load volatile i32 , i32 *%ptr 117 %val10 = load volatile i32 , i32 *%ptr 118 %val11 = load volatile i32 , i32 *%ptr 119 %val12 = load volatile i32 , i32 *%ptr 120 %val13 = load volatile i32 , i32 *%ptr 121 %val14 = load volatile i32 , i32 *%ptr 122 %val15 = load volatile i32 , i32 *%ptr 123 124 %swapped0 = call i32 @llvm.bswap.i32(i32 %val0) 125 %swapped1 = call i32 @llvm.bswap.i32(i32 %val1) 126 %swapped2 = call i32 @llvm.bswap.i32(i32 %val2) 127 %swapped3 = call i32 @llvm.bswap.i32(i32 %val3) 128 %swapped4 = call i32 @llvm.bswap.i32(i32 %val4) 129 %swapped5 = call i32 @llvm.bswap.i32(i32 %val5) 130 %swapped6 = call i32 @llvm.bswap.i32(i32 %val6) 131 %swapped7 = call i32 @llvm.bswap.i32(i32 %val7) 132 %swapped8 = call i32 @llvm.bswap.i32(i32 %val8) 133 %swapped9 = call i32 @llvm.bswap.i32(i32 %val9) 134 %swapped10 = call i32 @llvm.bswap.i32(i32 %val10) 135 %swapped11 = call i32 @llvm.bswap.i32(i32 %val11) 136 %swapped12 = call i32 @llvm.bswap.i32(i32 %val12) 137 %swapped13 = call i32 @llvm.bswap.i32(i32 %val13) 138 %swapped14 = call i32 @llvm.bswap.i32(i32 %val14) 139 %swapped15 = call i32 @llvm.bswap.i32(i32 %val15) 140 141 store volatile i32 %val0, i32 *%ptr 142 store volatile i32 %val1, i32 *%ptr 143 store volatile i32 %val2, i32 *%ptr 144 store volatile i32 %val3, i32 *%ptr 145 store volatile i32 %val4, i32 *%ptr 146 store volatile i32 %val5, i32 *%ptr 147 store volatile i32 %val6, i32 *%ptr 148 store volatile i32 %val7, i32 *%ptr 149 store volatile i32 %val8, i32 *%ptr 150 store volatile i32 %val9, i32 *%ptr 151 store volatile i32 %val10, i32 *%ptr 152 store volatile i32 %val11, i32 *%ptr 153 store volatile i32 %val12, i32 *%ptr 154 store volatile i32 %val13, i32 *%ptr 155 store volatile i32 %val14, i32 *%ptr 156 store volatile i32 %val15, i32 *%ptr 157 158 store volatile i32 %swapped0, i32 *%ptr 159 store volatile i32 %swapped1, i32 *%ptr 160 store volatile i32 %swapped2, i32 *%ptr 161 store volatile i32 %swapped3, i32 *%ptr 162 store volatile i32 %swapped4, i32 *%ptr 163 store volatile i32 %swapped5, i32 *%ptr 164 store volatile i32 %swapped6, i32 *%ptr 165 store volatile i32 %swapped7, i32 *%ptr 166 store volatile i32 %swapped8, i32 *%ptr 167 store volatile i32 %swapped9, i32 *%ptr 168 store volatile i32 %swapped10, i32 *%ptr 169 store volatile i32 %swapped11, i32 *%ptr 170 store volatile i32 %swapped12, i32 *%ptr 171 store volatile i32 %swapped13, i32 *%ptr 172 store volatile i32 %swapped14, i32 *%ptr 173 store volatile i32 %swapped15, i32 *%ptr 174 175 ret void 176} 177