• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; Test 64-bit compare and swap.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check CSG without a displacement.
6define i64 @f1(i64 %cmp, i64 %swap, i64 *%src) {
7; CHECK-LABEL: f1:
8; CHECK: csg %r2, %r3, 0(%r4)
9; CHECK: br %r14
10  %pairval = cmpxchg i64 *%src, i64 %cmp, i64 %swap seq_cst seq_cst
11  %val = extractvalue { i64, i1 } %pairval, 0
12  ret i64 %val
13}
14
15; Check the high end of the aligned CSG range.
16define i64 @f2(i64 %cmp, i64 %swap, i64 *%src) {
17; CHECK-LABEL: f2:
18; CHECK: csg %r2, %r3, 524280(%r4)
19; CHECK: br %r14
20  %ptr = getelementptr i64, i64 *%src, i64 65535
21  %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
22  %val = extractvalue { i64, i1 } %pairval, 0
23  ret i64 %val
24}
25
26; Check the next doubleword up, which needs separate address logic.
27; Other sequences besides this one would be OK.
28define i64 @f3(i64 %cmp, i64 %swap, i64 *%src) {
29; CHECK-LABEL: f3:
30; CHECK: agfi %r4, 524288
31; CHECK: csg %r2, %r3, 0(%r4)
32; CHECK: br %r14
33  %ptr = getelementptr i64, i64 *%src, i64 65536
34  %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
35  %val = extractvalue { i64, i1 } %pairval, 0
36  ret i64 %val
37}
38
39; Check the high end of the negative aligned CSG range.
40define i64 @f4(i64 %cmp, i64 %swap, i64 *%src) {
41; CHECK-LABEL: f4:
42; CHECK: csg %r2, %r3, -8(%r4)
43; CHECK: br %r14
44  %ptr = getelementptr i64, i64 *%src, i64 -1
45  %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
46  %val = extractvalue { i64, i1 } %pairval, 0
47  ret i64 %val
48}
49
50; Check the low end of the CSG range.
51define i64 @f5(i64 %cmp, i64 %swap, i64 *%src) {
52; CHECK-LABEL: f5:
53; CHECK: csg %r2, %r3, -524288(%r4)
54; CHECK: br %r14
55  %ptr = getelementptr i64, i64 *%src, i64 -65536
56  %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
57  %val = extractvalue { i64, i1 } %pairval, 0
58  ret i64 %val
59}
60
61; Check the next doubleword down, which needs separate address logic.
62; Other sequences besides this one would be OK.
63define i64 @f6(i64 %cmp, i64 %swap, i64 *%src) {
64; CHECK-LABEL: f6:
65; CHECK: agfi %r4, -524296
66; CHECK: csg %r2, %r3, 0(%r4)
67; CHECK: br %r14
68  %ptr = getelementptr i64, i64 *%src, i64 -65537
69  %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
70  %val = extractvalue { i64, i1 } %pairval, 0
71  ret i64 %val
72}
73
74; Check that CSG does not allow an index.
75define i64 @f7(i64 %cmp, i64 %swap, i64 %src, i64 %index) {
76; CHECK-LABEL: f7:
77; CHECK: agr %r4, %r5
78; CHECK: csg %r2, %r3, 0(%r4)
79; CHECK: br %r14
80  %add1 = add i64 %src, %index
81  %ptr = inttoptr i64 %add1 to i64 *
82  %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
83  %val = extractvalue { i64, i1 } %pairval, 0
84  ret i64 %val
85}
86
87; Check that a constant %cmp value is loaded into a register first.
88define i64 @f8(i64 %dummy, i64 %swap, i64 *%ptr) {
89; CHECK-LABEL: f8:
90; CHECK: lghi %r2, 1001
91; CHECK: csg %r2, %r3, 0(%r4)
92; CHECK: br %r14
93  %pairval = cmpxchg i64 *%ptr, i64 1001, i64 %swap seq_cst seq_cst
94  %val = extractvalue { i64, i1 } %pairval, 0
95  ret i64 %val
96}
97
98; Check that a constant %swap value is loaded into a register first.
99define i64 @f9(i64 %cmp, i64 *%ptr) {
100; CHECK-LABEL: f9:
101; CHECK: lghi [[SWAP:%r[0-9]+]], 1002
102; CHECK: csg %r2, [[SWAP]], 0(%r3)
103; CHECK: br %r14
104  %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 1002 seq_cst seq_cst
105  %val = extractvalue { i64, i1 } %pairval, 0
106  ret i64 %val
107}
108