1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=X32 3; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefix=X32 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=X64 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefix=X64 6 7define void @test_movntss(i8* %p, <4 x float> %a) nounwind optsize ssp { 8; X32-LABEL: test_movntss: 9; X32: # BB#0: 10; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 11; X32-NEXT: movntss %xmm0, (%eax) 12; X32-NEXT: retl 13; 14; X64-LABEL: test_movntss: 15; X64: # BB#0: 16; X64-NEXT: movntss %xmm0, (%rdi) 17; X64-NEXT: retq 18 tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) nounwind 19 ret void 20} 21 22declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>) 23 24define void @test_movntsd(i8* %p, <2 x double> %a) nounwind optsize ssp { 25; X32-LABEL: test_movntsd: 26; X32: # BB#0: 27; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 28; X32-NEXT: movntsd %xmm0, (%eax) 29; X32-NEXT: retl 30; 31; X64-LABEL: test_movntsd: 32; X64: # BB#0: 33; X64-NEXT: movntsd %xmm0, (%rdi) 34; X64-NEXT: retq 35 tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) nounwind 36 ret void 37} 38 39declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>) 40