1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s 3 4define <2 x double> @test_int_x86_xop_vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { 5; CHECK-LABEL: test_int_x86_xop_vpermil2pd: 6; CHECK: # BB#0: 7; CHECK-NEXT: vpermil2pd $1, %xmm2, %xmm1, %xmm0, %xmm0 8; CHECK-NEXT: retq 9 %res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 1) ; [#uses=1] 10 ret <2 x double> %res 11} 12define <2 x double> @test_int_x86_xop_vpermil2pd_mr(<2 x double> %a0, <2 x double>* %a1, <2 x double> %a2) { 13; CHECK-LABEL: test_int_x86_xop_vpermil2pd_mr: 14; CHECK: # BB#0: 15; CHECK-NEXT: vpermil2pd $1, %xmm1, (%rdi), %xmm0, %xmm0 16; CHECK-NEXT: retq 17 %vec = load <2 x double>, <2 x double>* %a1 18 %res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %vec, <2 x double> %a2, i8 1) ; [#uses=1] 19 ret <2 x double> %res 20} 21define <2 x double> @test_int_x86_xop_vpermil2pd_rm(<2 x double> %a0, <2 x double> %a1, <2 x double>* %a2) { 22; CHECK-LABEL: test_int_x86_xop_vpermil2pd_rm: 23; CHECK: # BB#0: 24; CHECK-NEXT: vpermil2pd $1, (%rdi), %xmm1, %xmm0, %xmm0 25; CHECK-NEXT: retq 26 %vec = load <2 x double>, <2 x double>* %a2 27 %res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %vec, i8 1) ; [#uses=1] 28 ret <2 x double> %res 29} 30declare <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone 31 32define <4 x double> @test_int_x86_xop_vpermil2pd_256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) { 33; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256: 34; CHECK: # BB#0: 35; CHECK-NEXT: vpermil2pd $2, %ymm2, %ymm1, %ymm0, %ymm0 36; CHECK-NEXT: retq 37 %res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2, i8 2) ; 38 ret <4 x double> %res 39} 40define <4 x double> @test_int_x86_xop_vpermil2pd_256_mr(<4 x double> %a0, <4 x double>* %a1, <4 x double> %a2) { 41; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256_mr: 42; CHECK: # BB#0: 43; CHECK-NEXT: vpermil2pd $2, %ymm1, (%rdi), %ymm0, %ymm0 44; CHECK-NEXT: retq 45 %vec = load <4 x double>, <4 x double>* %a1 46 %res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %vec, <4 x double> %a2, i8 2) ; 47 ret <4 x double> %res 48} 49define <4 x double> @test_int_x86_xop_vpermil2pd_256_rm(<4 x double> %a0, <4 x double> %a1, <4 x double>* %a2) { 50; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256_rm: 51; CHECK: # BB#0: 52; CHECK-NEXT: vpermil2pd $2, (%rdi), %ymm1, %ymm0, %ymm0 53; CHECK-NEXT: retq 54 %vec = load <4 x double>, <4 x double>* %a2 55 %res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x double> %vec, i8 2) ; 56 ret <4 x double> %res 57} 58declare <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double>, <4 x double>, <4 x double>, i8) nounwind readnone 59 60define <4 x float> @test_int_x86_xop_vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { 61; CHECK-LABEL: test_int_x86_xop_vpermil2ps: 62; CHECK: # BB#0: 63; CHECK-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0 64; CHECK-NEXT: retq 65 %res = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 3) ; 66 ret <4 x float> %res 67} 68declare <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone 69 70define <8 x float> @test_int_x86_xop_vpermil2ps_256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { 71; CHECK-LABEL: test_int_x86_xop_vpermil2ps_256: 72; CHECK: # BB#0: 73; CHECK-NEXT: vpermil2ps $4, %ymm2, %ymm1, %ymm0, %ymm0 74; CHECK-NEXT: retq 75 %res = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2, i8 4) ; 76 ret <8 x float> %res 77} 78declare <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float>, <8 x float>, <8 x float>, i8) nounwind readnone 79 80define <16 x i8> @test_int_x86_xop_vpcomeqb(<16 x i8> %a0, <16 x i8> %a1) { 81; CHECK-LABEL: test_int_x86_xop_vpcomeqb: 82; CHECK: # BB#0: 83; CHECK-NEXT: vpcomeqb %xmm1, %xmm0, %xmm0 84; CHECK-NEXT: retq 85 %res = call <16 x i8> @llvm.x86.xop.vpcomeqb(<16 x i8> %a0, <16 x i8> %a1) ; 86 ret <16 x i8> %res 87} 88define <16 x i8> @test_int_x86_xop_vpcomeqb_mem(<16 x i8> %a0, <16 x i8>* %a1) { 89; CHECK-LABEL: test_int_x86_xop_vpcomeqb_mem: 90; CHECK: # BB#0: 91; CHECK-NEXT: vpcomeqb (%rdi), %xmm0, %xmm0 92; CHECK-NEXT: retq 93 %vec = load <16 x i8>, <16 x i8>* %a1 94 %res = call <16 x i8> @llvm.x86.xop.vpcomeqb(<16 x i8> %a0, <16 x i8> %vec) ; 95 ret <16 x i8> %res 96} 97declare <16 x i8> @llvm.x86.xop.vpcomeqb(<16 x i8>, <16 x i8>) nounwind readnone 98 99define <8 x i16> @test_int_x86_xop_vpcomeqw(<8 x i16> %a0, <8 x i16> %a1) { 100; CHECK-LABEL: test_int_x86_xop_vpcomeqw: 101; CHECK: # BB#0: 102; CHECK-NEXT: vpcomeqw %xmm1, %xmm0, %xmm0 103; CHECK-NEXT: retq 104 %res = call <8 x i16> @llvm.x86.xop.vpcomeqw(<8 x i16> %a0, <8 x i16> %a1) ; 105 ret <8 x i16> %res 106} 107declare <8 x i16> @llvm.x86.xop.vpcomeqw(<8 x i16>, <8 x i16>) nounwind readnone 108 109define <4 x i32> @test_int_x86_xop_vpcomeqd(<4 x i32> %a0, <4 x i32> %a1) { 110; CHECK-LABEL: test_int_x86_xop_vpcomeqd: 111; CHECK: # BB#0: 112; CHECK-NEXT: vpcomeqd %xmm1, %xmm0, %xmm0 113; CHECK-NEXT: retq 114 %res = call <4 x i32> @llvm.x86.xop.vpcomeqd(<4 x i32> %a0, <4 x i32> %a1) ; 115 ret <4 x i32> %res 116} 117declare <4 x i32> @llvm.x86.xop.vpcomeqd(<4 x i32>, <4 x i32>) nounwind readnone 118 119define <2 x i64> @test_int_x86_xop_vpcomeqq(<2 x i64> %a0, <2 x i64> %a1) { 120; CHECK-LABEL: test_int_x86_xop_vpcomeqq: 121; CHECK: # BB#0: 122; CHECK-NEXT: vpcomeqq %xmm1, %xmm0, %xmm0 123; CHECK-NEXT: retq 124 %res = call <2 x i64> @llvm.x86.xop.vpcomeqq(<2 x i64> %a0, <2 x i64> %a1) ; 125 ret <2 x i64> %res 126} 127declare <2 x i64> @llvm.x86.xop.vpcomeqq(<2 x i64>, <2 x i64>) nounwind readnone 128 129define <16 x i8> @test_int_x86_xop_vpcomequb(<16 x i8> %a0, <16 x i8> %a1) { 130; CHECK-LABEL: test_int_x86_xop_vpcomequb: 131; CHECK: # BB#0: 132; CHECK-NEXT: vpcomequb %xmm1, %xmm0, %xmm0 133; CHECK-NEXT: retq 134 %res = call <16 x i8> @llvm.x86.xop.vpcomequb(<16 x i8> %a0, <16 x i8> %a1) ; 135 ret <16 x i8> %res 136} 137declare <16 x i8> @llvm.x86.xop.vpcomequb(<16 x i8>, <16 x i8>) nounwind readnone 138 139define <4 x i32> @test_int_x86_xop_vpcomequd(<4 x i32> %a0, <4 x i32> %a1) { 140; CHECK-LABEL: test_int_x86_xop_vpcomequd: 141; CHECK: # BB#0: 142; CHECK-NEXT: vpcomequd %xmm1, %xmm0, %xmm0 143; CHECK-NEXT: retq 144 %res = call <4 x i32> @llvm.x86.xop.vpcomequd(<4 x i32> %a0, <4 x i32> %a1) ; 145 ret <4 x i32> %res 146} 147declare <4 x i32> @llvm.x86.xop.vpcomequd(<4 x i32>, <4 x i32>) nounwind readnone 148 149define <2 x i64> @test_int_x86_xop_vpcomequq(<2 x i64> %a0, <2 x i64> %a1) { 150; CHECK-LABEL: test_int_x86_xop_vpcomequq: 151; CHECK: # BB#0: 152; CHECK-NEXT: vpcomequq %xmm1, %xmm0, %xmm0 153; CHECK-NEXT: retq 154 %res = call <2 x i64> @llvm.x86.xop.vpcomequq(<2 x i64> %a0, <2 x i64> %a1) ; 155 ret <2 x i64> %res 156} 157declare <2 x i64> @llvm.x86.xop.vpcomequq(<2 x i64>, <2 x i64>) nounwind readnone 158 159define <8 x i16> @test_int_x86_xop_vpcomequw(<8 x i16> %a0, <8 x i16> %a1) { 160; CHECK-LABEL: test_int_x86_xop_vpcomequw: 161; CHECK: # BB#0: 162; CHECK-NEXT: vpcomequw %xmm1, %xmm0, %xmm0 163; CHECK-NEXT: retq 164 %res = call <8 x i16> @llvm.x86.xop.vpcomequw(<8 x i16> %a0, <8 x i16> %a1) ; 165 ret <8 x i16> %res 166} 167declare <8 x i16> @llvm.x86.xop.vpcomequw(<8 x i16>, <8 x i16>) nounwind readnone 168 169define <16 x i8> @test_int_x86_xop_vpcomfalseb(<16 x i8> %a0, <16 x i8> %a1) { 170; CHECK-LABEL: test_int_x86_xop_vpcomfalseb: 171; CHECK: # BB#0: 172; CHECK-NEXT: vpcomfalseb %xmm1, %xmm0, %xmm0 173; CHECK-NEXT: retq 174 %res = call <16 x i8> @llvm.x86.xop.vpcomfalseb(<16 x i8> %a0, <16 x i8> %a1) ; 175 ret <16 x i8> %res 176} 177declare <16 x i8> @llvm.x86.xop.vpcomfalseb(<16 x i8>, <16 x i8>) nounwind readnone 178 179define <4 x i32> @test_int_x86_xop_vpcomfalsed(<4 x i32> %a0, <4 x i32> %a1) { 180; CHECK-LABEL: test_int_x86_xop_vpcomfalsed: 181; CHECK: # BB#0: 182; CHECK-NEXT: vpcomfalsed %xmm1, %xmm0, %xmm0 183; CHECK-NEXT: retq 184 %res = call <4 x i32> @llvm.x86.xop.vpcomfalsed(<4 x i32> %a0, <4 x i32> %a1) ; 185 ret <4 x i32> %res 186} 187declare <4 x i32> @llvm.x86.xop.vpcomfalsed(<4 x i32>, <4 x i32>) nounwind readnone 188 189define <2 x i64> @test_int_x86_xop_vpcomfalseq(<2 x i64> %a0, <2 x i64> %a1) { 190; CHECK-LABEL: test_int_x86_xop_vpcomfalseq: 191; CHECK: # BB#0: 192; CHECK-NEXT: vpcomfalseq %xmm1, %xmm0, %xmm0 193; CHECK-NEXT: retq 194 %res = call <2 x i64> @llvm.x86.xop.vpcomfalseq(<2 x i64> %a0, <2 x i64> %a1) ; 195 ret <2 x i64> %res 196} 197declare <2 x i64> @llvm.x86.xop.vpcomfalseq(<2 x i64>, <2 x i64>) nounwind readnone 198 199define <16 x i8> @test_int_x86_xop_vpcomfalseub(<16 x i8> %a0, <16 x i8> %a1) { 200; CHECK-LABEL: test_int_x86_xop_vpcomfalseub: 201; CHECK: # BB#0: 202; CHECK-NEXT: vpcomfalseub %xmm1, %xmm0, %xmm0 203; CHECK-NEXT: retq 204 %res = call <16 x i8> @llvm.x86.xop.vpcomfalseub(<16 x i8> %a0, <16 x i8> %a1) ; 205 ret <16 x i8> %res 206} 207declare <16 x i8> @llvm.x86.xop.vpcomfalseub(<16 x i8>, <16 x i8>) nounwind readnone 208 209define <4 x i32> @test_int_x86_xop_vpcomfalseud(<4 x i32> %a0, <4 x i32> %a1) { 210; CHECK-LABEL: test_int_x86_xop_vpcomfalseud: 211; CHECK: # BB#0: 212; CHECK-NEXT: vpcomfalseud %xmm1, %xmm0, %xmm0 213; CHECK-NEXT: retq 214 %res = call <4 x i32> @llvm.x86.xop.vpcomfalseud(<4 x i32> %a0, <4 x i32> %a1) ; 215 ret <4 x i32> %res 216} 217declare <4 x i32> @llvm.x86.xop.vpcomfalseud(<4 x i32>, <4 x i32>) nounwind readnone 218 219define <2 x i64> @test_int_x86_xop_vpcomfalseuq(<2 x i64> %a0, <2 x i64> %a1) { 220; CHECK-LABEL: test_int_x86_xop_vpcomfalseuq: 221; CHECK: # BB#0: 222; CHECK-NEXT: vpcomfalseuq %xmm1, %xmm0, %xmm0 223; CHECK-NEXT: retq 224 %res = call <2 x i64> @llvm.x86.xop.vpcomfalseuq(<2 x i64> %a0, <2 x i64> %a1) ; 225 ret <2 x i64> %res 226} 227declare <2 x i64> @llvm.x86.xop.vpcomfalseuq(<2 x i64>, <2 x i64>) nounwind readnone 228 229define <8 x i16> @test_int_x86_xop_vpcomfalseuw(<8 x i16> %a0, <8 x i16> %a1) { 230; CHECK-LABEL: test_int_x86_xop_vpcomfalseuw: 231; CHECK: # BB#0: 232; CHECK-NEXT: vpcomfalseuw %xmm1, %xmm0, %xmm0 233; CHECK-NEXT: retq 234 %res = call <8 x i16> @llvm.x86.xop.vpcomfalseuw(<8 x i16> %a0, <8 x i16> %a1) ; 235 ret <8 x i16> %res 236} 237declare <8 x i16> @llvm.x86.xop.vpcomfalseuw(<8 x i16>, <8 x i16>) nounwind readnone 238 239define <8 x i16> @test_int_x86_xop_vpcomfalsew(<8 x i16> %a0, <8 x i16> %a1) { 240; CHECK-LABEL: test_int_x86_xop_vpcomfalsew: 241; CHECK: # BB#0: 242; CHECK-NEXT: vpcomfalsew %xmm1, %xmm0, %xmm0 243; CHECK-NEXT: retq 244 %res = call <8 x i16> @llvm.x86.xop.vpcomfalsew(<8 x i16> %a0, <8 x i16> %a1) ; 245 ret <8 x i16> %res 246} 247declare <8 x i16> @llvm.x86.xop.vpcomfalsew(<8 x i16>, <8 x i16>) nounwind readnone 248 249define <16 x i8> @test_int_x86_xop_vpcomgeb(<16 x i8> %a0, <16 x i8> %a1) { 250; CHECK-LABEL: test_int_x86_xop_vpcomgeb: 251; CHECK: # BB#0: 252; CHECK-NEXT: vpcomgeb %xmm1, %xmm0, %xmm0 253; CHECK-NEXT: retq 254 %res = call <16 x i8> @llvm.x86.xop.vpcomgeb(<16 x i8> %a0, <16 x i8> %a1) ; 255 ret <16 x i8> %res 256} 257declare <16 x i8> @llvm.x86.xop.vpcomgeb(<16 x i8>, <16 x i8>) nounwind readnone 258 259define <4 x i32> @test_int_x86_xop_vpcomged(<4 x i32> %a0, <4 x i32> %a1) { 260; CHECK-LABEL: test_int_x86_xop_vpcomged: 261; CHECK: # BB#0: 262; CHECK-NEXT: vpcomged %xmm1, %xmm0, %xmm0 263; CHECK-NEXT: retq 264 %res = call <4 x i32> @llvm.x86.xop.vpcomged(<4 x i32> %a0, <4 x i32> %a1) ; 265 ret <4 x i32> %res 266} 267declare <4 x i32> @llvm.x86.xop.vpcomged(<4 x i32>, <4 x i32>) nounwind readnone 268 269define <2 x i64> @test_int_x86_xop_vpcomgeq(<2 x i64> %a0, <2 x i64> %a1) { 270; CHECK-LABEL: test_int_x86_xop_vpcomgeq: 271; CHECK: # BB#0: 272; CHECK-NEXT: vpcomgeq %xmm1, %xmm0, %xmm0 273; CHECK-NEXT: retq 274 %res = call <2 x i64> @llvm.x86.xop.vpcomgeq(<2 x i64> %a0, <2 x i64> %a1) ; 275 ret <2 x i64> %res 276} 277declare <2 x i64> @llvm.x86.xop.vpcomgeq(<2 x i64>, <2 x i64>) nounwind readnone 278 279define <16 x i8> @test_int_x86_xop_vpcomgeub(<16 x i8> %a0, <16 x i8> %a1) { 280; CHECK-LABEL: test_int_x86_xop_vpcomgeub: 281; CHECK: # BB#0: 282; CHECK-NEXT: vpcomgeub %xmm1, %xmm0, %xmm0 283; CHECK-NEXT: retq 284 %res = call <16 x i8> @llvm.x86.xop.vpcomgeub(<16 x i8> %a0, <16 x i8> %a1) ; 285 ret <16 x i8> %res 286} 287declare <16 x i8> @llvm.x86.xop.vpcomgeub(<16 x i8>, <16 x i8>) nounwind readnone 288 289define <4 x i32> @test_int_x86_xop_vpcomgeud(<4 x i32> %a0, <4 x i32> %a1) { 290; CHECK-LABEL: test_int_x86_xop_vpcomgeud: 291; CHECK: # BB#0: 292; CHECK-NEXT: vpcomgeud %xmm1, %xmm0, %xmm0 293; CHECK-NEXT: retq 294 %res = call <4 x i32> @llvm.x86.xop.vpcomgeud(<4 x i32> %a0, <4 x i32> %a1) ; 295 ret <4 x i32> %res 296} 297declare <4 x i32> @llvm.x86.xop.vpcomgeud(<4 x i32>, <4 x i32>) nounwind readnone 298 299define <2 x i64> @test_int_x86_xop_vpcomgeuq(<2 x i64> %a0, <2 x i64> %a1) { 300; CHECK-LABEL: test_int_x86_xop_vpcomgeuq: 301; CHECK: # BB#0: 302; CHECK-NEXT: vpcomgeuq %xmm1, %xmm0, %xmm0 303; CHECK-NEXT: retq 304 %res = call <2 x i64> @llvm.x86.xop.vpcomgeuq(<2 x i64> %a0, <2 x i64> %a1) ; 305 ret <2 x i64> %res 306} 307declare <2 x i64> @llvm.x86.xop.vpcomgeuq(<2 x i64>, <2 x i64>) nounwind readnone 308 309define <8 x i16> @test_int_x86_xop_vpcomgeuw(<8 x i16> %a0, <8 x i16> %a1) { 310; CHECK-LABEL: test_int_x86_xop_vpcomgeuw: 311; CHECK: # BB#0: 312; CHECK-NEXT: vpcomgeuw %xmm1, %xmm0, %xmm0 313; CHECK-NEXT: retq 314 %res = call <8 x i16> @llvm.x86.xop.vpcomgeuw(<8 x i16> %a0, <8 x i16> %a1) ; 315 ret <8 x i16> %res 316} 317declare <8 x i16> @llvm.x86.xop.vpcomgeuw(<8 x i16>, <8 x i16>) nounwind readnone 318 319define <8 x i16> @test_int_x86_xop_vpcomgew(<8 x i16> %a0, <8 x i16> %a1) { 320; CHECK-LABEL: test_int_x86_xop_vpcomgew: 321; CHECK: # BB#0: 322; CHECK-NEXT: vpcomgew %xmm1, %xmm0, %xmm0 323; CHECK-NEXT: retq 324 %res = call <8 x i16> @llvm.x86.xop.vpcomgew(<8 x i16> %a0, <8 x i16> %a1) ; 325 ret <8 x i16> %res 326} 327declare <8 x i16> @llvm.x86.xop.vpcomgew(<8 x i16>, <8 x i16>) nounwind readnone 328 329define <16 x i8> @test_int_x86_xop_vpcomgtb(<16 x i8> %a0, <16 x i8> %a1) { 330; CHECK-LABEL: test_int_x86_xop_vpcomgtb: 331; CHECK: # BB#0: 332; CHECK-NEXT: vpcomgtb %xmm1, %xmm0, %xmm0 333; CHECK-NEXT: retq 334 %res = call <16 x i8> @llvm.x86.xop.vpcomgtb(<16 x i8> %a0, <16 x i8> %a1) ; 335 ret <16 x i8> %res 336} 337declare <16 x i8> @llvm.x86.xop.vpcomgtb(<16 x i8>, <16 x i8>) nounwind readnone 338 339define <4 x i32> @test_int_x86_xop_vpcomgtd(<4 x i32> %a0, <4 x i32> %a1) { 340; CHECK-LABEL: test_int_x86_xop_vpcomgtd: 341; CHECK: # BB#0: 342; CHECK-NEXT: vpcomgtd %xmm1, %xmm0, %xmm0 343; CHECK-NEXT: retq 344 %res = call <4 x i32> @llvm.x86.xop.vpcomgtd(<4 x i32> %a0, <4 x i32> %a1) ; 345 ret <4 x i32> %res 346} 347declare <4 x i32> @llvm.x86.xop.vpcomgtd(<4 x i32>, <4 x i32>) nounwind readnone 348 349define <2 x i64> @test_int_x86_xop_vpcomgtq(<2 x i64> %a0, <2 x i64> %a1) { 350; CHECK-LABEL: test_int_x86_xop_vpcomgtq: 351; CHECK: # BB#0: 352; CHECK-NEXT: vpcomgtq %xmm1, %xmm0, %xmm0 353; CHECK-NEXT: retq 354 %res = call <2 x i64> @llvm.x86.xop.vpcomgtq(<2 x i64> %a0, <2 x i64> %a1) ; 355 ret <2 x i64> %res 356} 357declare <2 x i64> @llvm.x86.xop.vpcomgtq(<2 x i64>, <2 x i64>) nounwind readnone 358 359define <16 x i8> @test_int_x86_xop_vpcomgtub(<16 x i8> %a0, <16 x i8> %a1) { 360; CHECK-LABEL: test_int_x86_xop_vpcomgtub: 361; CHECK: # BB#0: 362; CHECK-NEXT: vpcomgtub %xmm1, %xmm0, %xmm0 363; CHECK-NEXT: retq 364 %res = call <16 x i8> @llvm.x86.xop.vpcomgtub(<16 x i8> %a0, <16 x i8> %a1) ; 365 ret <16 x i8> %res 366} 367declare <16 x i8> @llvm.x86.xop.vpcomgtub(<16 x i8>, <16 x i8>) nounwind readnone 368 369define <4 x i32> @test_int_x86_xop_vpcomgtud(<4 x i32> %a0, <4 x i32> %a1) { 370; CHECK-LABEL: test_int_x86_xop_vpcomgtud: 371; CHECK: # BB#0: 372; CHECK-NEXT: vpcomgtud %xmm1, %xmm0, %xmm0 373; CHECK-NEXT: retq 374 %res = call <4 x i32> @llvm.x86.xop.vpcomgtud(<4 x i32> %a0, <4 x i32> %a1) ; 375 ret <4 x i32> %res 376} 377declare <4 x i32> @llvm.x86.xop.vpcomgtud(<4 x i32>, <4 x i32>) nounwind readnone 378 379define <2 x i64> @test_int_x86_xop_vpcomgtuq(<2 x i64> %a0, <2 x i64> %a1) { 380; CHECK-LABEL: test_int_x86_xop_vpcomgtuq: 381; CHECK: # BB#0: 382; CHECK-NEXT: vpcomgtuq %xmm1, %xmm0, %xmm0 383; CHECK-NEXT: retq 384 %res = call <2 x i64> @llvm.x86.xop.vpcomgtuq(<2 x i64> %a0, <2 x i64> %a1) ; 385 ret <2 x i64> %res 386} 387declare <2 x i64> @llvm.x86.xop.vpcomgtuq(<2 x i64>, <2 x i64>) nounwind readnone 388 389define <8 x i16> @test_int_x86_xop_vpcomgtuw(<8 x i16> %a0, <8 x i16> %a1) { 390; CHECK-LABEL: test_int_x86_xop_vpcomgtuw: 391; CHECK: # BB#0: 392; CHECK-NEXT: vpcomgtuw %xmm1, %xmm0, %xmm0 393; CHECK-NEXT: retq 394 %res = call <8 x i16> @llvm.x86.xop.vpcomgtuw(<8 x i16> %a0, <8 x i16> %a1) ; 395 ret <8 x i16> %res 396} 397declare <8 x i16> @llvm.x86.xop.vpcomgtuw(<8 x i16>, <8 x i16>) nounwind readnone 398 399define <8 x i16> @test_int_x86_xop_vpcomgtw(<8 x i16> %a0, <8 x i16> %a1) { 400; CHECK-LABEL: test_int_x86_xop_vpcomgtw: 401; CHECK: # BB#0: 402; CHECK-NEXT: vpcomgtw %xmm1, %xmm0, %xmm0 403; CHECK-NEXT: retq 404 %res = call <8 x i16> @llvm.x86.xop.vpcomgtw(<8 x i16> %a0, <8 x i16> %a1) ; 405 ret <8 x i16> %res 406} 407declare <8 x i16> @llvm.x86.xop.vpcomgtw(<8 x i16>, <8 x i16>) nounwind readnone 408 409define <16 x i8> @test_int_x86_xop_vpcomleb(<16 x i8> %a0, <16 x i8> %a1) { 410; CHECK-LABEL: test_int_x86_xop_vpcomleb: 411; CHECK: # BB#0: 412; CHECK-NEXT: vpcomleb %xmm1, %xmm0, %xmm0 413; CHECK-NEXT: retq 414 %res = call <16 x i8> @llvm.x86.xop.vpcomleb(<16 x i8> %a0, <16 x i8> %a1) ; 415 ret <16 x i8> %res 416} 417declare <16 x i8> @llvm.x86.xop.vpcomleb(<16 x i8>, <16 x i8>) nounwind readnone 418 419define <4 x i32> @test_int_x86_xop_vpcomled(<4 x i32> %a0, <4 x i32> %a1) { 420; CHECK-LABEL: test_int_x86_xop_vpcomled: 421; CHECK: # BB#0: 422; CHECK-NEXT: vpcomled %xmm1, %xmm0, %xmm0 423; CHECK-NEXT: retq 424 %res = call <4 x i32> @llvm.x86.xop.vpcomled(<4 x i32> %a0, <4 x i32> %a1) ; 425 ret <4 x i32> %res 426} 427declare <4 x i32> @llvm.x86.xop.vpcomled(<4 x i32>, <4 x i32>) nounwind readnone 428 429define <2 x i64> @test_int_x86_xop_vpcomleq(<2 x i64> %a0, <2 x i64> %a1) { 430; CHECK-LABEL: test_int_x86_xop_vpcomleq: 431; CHECK: # BB#0: 432; CHECK-NEXT: vpcomleq %xmm1, %xmm0, %xmm0 433; CHECK-NEXT: retq 434 %res = call <2 x i64> @llvm.x86.xop.vpcomleq(<2 x i64> %a0, <2 x i64> %a1) ; 435 ret <2 x i64> %res 436} 437declare <2 x i64> @llvm.x86.xop.vpcomleq(<2 x i64>, <2 x i64>) nounwind readnone 438 439define <16 x i8> @test_int_x86_xop_vpcomleub(<16 x i8> %a0, <16 x i8> %a1) { 440; CHECK-LABEL: test_int_x86_xop_vpcomleub: 441; CHECK: # BB#0: 442; CHECK-NEXT: vpcomleub %xmm1, %xmm0, %xmm0 443; CHECK-NEXT: retq 444 %res = call <16 x i8> @llvm.x86.xop.vpcomleub(<16 x i8> %a0, <16 x i8> %a1) ; 445 ret <16 x i8> %res 446} 447declare <16 x i8> @llvm.x86.xop.vpcomleub(<16 x i8>, <16 x i8>) nounwind readnone 448 449define <4 x i32> @test_int_x86_xop_vpcomleud(<4 x i32> %a0, <4 x i32> %a1) { 450; CHECK-LABEL: test_int_x86_xop_vpcomleud: 451; CHECK: # BB#0: 452; CHECK-NEXT: vpcomleud %xmm1, %xmm0, %xmm0 453; CHECK-NEXT: retq 454 %res = call <4 x i32> @llvm.x86.xop.vpcomleud(<4 x i32> %a0, <4 x i32> %a1) ; 455 ret <4 x i32> %res 456} 457declare <4 x i32> @llvm.x86.xop.vpcomleud(<4 x i32>, <4 x i32>) nounwind readnone 458 459define <2 x i64> @test_int_x86_xop_vpcomleuq(<2 x i64> %a0, <2 x i64> %a1) { 460; CHECK-LABEL: test_int_x86_xop_vpcomleuq: 461; CHECK: # BB#0: 462; CHECK-NEXT: vpcomleuq %xmm1, %xmm0, %xmm0 463; CHECK-NEXT: retq 464 %res = call <2 x i64> @llvm.x86.xop.vpcomleuq(<2 x i64> %a0, <2 x i64> %a1) ; 465 ret <2 x i64> %res 466} 467declare <2 x i64> @llvm.x86.xop.vpcomleuq(<2 x i64>, <2 x i64>) nounwind readnone 468 469define <8 x i16> @test_int_x86_xop_vpcomleuw(<8 x i16> %a0, <8 x i16> %a1) { 470; CHECK-LABEL: test_int_x86_xop_vpcomleuw: 471; CHECK: # BB#0: 472; CHECK-NEXT: vpcomleuw %xmm1, %xmm0, %xmm0 473; CHECK-NEXT: retq 474 %res = call <8 x i16> @llvm.x86.xop.vpcomleuw(<8 x i16> %a0, <8 x i16> %a1) ; 475 ret <8 x i16> %res 476} 477declare <8 x i16> @llvm.x86.xop.vpcomleuw(<8 x i16>, <8 x i16>) nounwind readnone 478 479define <8 x i16> @test_int_x86_xop_vpcomlew(<8 x i16> %a0, <8 x i16> %a1) { 480; CHECK-LABEL: test_int_x86_xop_vpcomlew: 481; CHECK: # BB#0: 482; CHECK-NEXT: vpcomlew %xmm1, %xmm0, %xmm0 483; CHECK-NEXT: retq 484 %res = call <8 x i16> @llvm.x86.xop.vpcomlew(<8 x i16> %a0, <8 x i16> %a1) ; 485 ret <8 x i16> %res 486} 487declare <8 x i16> @llvm.x86.xop.vpcomlew(<8 x i16>, <8 x i16>) nounwind readnone 488 489define <16 x i8> @test_int_x86_xop_vpcomltb(<16 x i8> %a0, <16 x i8> %a1) { 490; CHECK-LABEL: test_int_x86_xop_vpcomltb: 491; CHECK: # BB#0: 492; CHECK-NEXT: vpcomltb %xmm1, %xmm0, %xmm0 493; CHECK-NEXT: retq 494 %res = call <16 x i8> @llvm.x86.xop.vpcomltb(<16 x i8> %a0, <16 x i8> %a1) ; 495 ret <16 x i8> %res 496} 497declare <16 x i8> @llvm.x86.xop.vpcomltb(<16 x i8>, <16 x i8>) nounwind readnone 498 499define <4 x i32> @test_int_x86_xop_vpcomltd(<4 x i32> %a0, <4 x i32> %a1) { 500; CHECK-LABEL: test_int_x86_xop_vpcomltd: 501; CHECK: # BB#0: 502; CHECK-NEXT: vpcomltd %xmm1, %xmm0, %xmm0 503; CHECK-NEXT: retq 504 %res = call <4 x i32> @llvm.x86.xop.vpcomltd(<4 x i32> %a0, <4 x i32> %a1) ; 505 ret <4 x i32> %res 506} 507declare <4 x i32> @llvm.x86.xop.vpcomltd(<4 x i32>, <4 x i32>) nounwind readnone 508 509define <2 x i64> @test_int_x86_xop_vpcomltq(<2 x i64> %a0, <2 x i64> %a1) { 510; CHECK-LABEL: test_int_x86_xop_vpcomltq: 511; CHECK: # BB#0: 512; CHECK-NEXT: vpcomltq %xmm1, %xmm0, %xmm0 513; CHECK-NEXT: retq 514 %res = call <2 x i64> @llvm.x86.xop.vpcomltq(<2 x i64> %a0, <2 x i64> %a1) ; 515 ret <2 x i64> %res 516} 517declare <2 x i64> @llvm.x86.xop.vpcomltq(<2 x i64>, <2 x i64>) nounwind readnone 518 519define <16 x i8> @test_int_x86_xop_vpcomltub(<16 x i8> %a0, <16 x i8> %a1) { 520; CHECK-LABEL: test_int_x86_xop_vpcomltub: 521; CHECK: # BB#0: 522; CHECK-NEXT: vpcomltub %xmm1, %xmm0, %xmm0 523; CHECK-NEXT: retq 524 %res = call <16 x i8> @llvm.x86.xop.vpcomltub(<16 x i8> %a0, <16 x i8> %a1) ; 525 ret <16 x i8> %res 526} 527declare <16 x i8> @llvm.x86.xop.vpcomltub(<16 x i8>, <16 x i8>) nounwind readnone 528 529define <4 x i32> @test_int_x86_xop_vpcomltud(<4 x i32> %a0, <4 x i32> %a1) { 530; CHECK-LABEL: test_int_x86_xop_vpcomltud: 531; CHECK: # BB#0: 532; CHECK-NEXT: vpcomltud %xmm1, %xmm0, %xmm0 533; CHECK-NEXT: retq 534 %res = call <4 x i32> @llvm.x86.xop.vpcomltud(<4 x i32> %a0, <4 x i32> %a1) ; 535 ret <4 x i32> %res 536} 537declare <4 x i32> @llvm.x86.xop.vpcomltud(<4 x i32>, <4 x i32>) nounwind readnone 538 539define <2 x i64> @test_int_x86_xop_vpcomltuq(<2 x i64> %a0, <2 x i64> %a1) { 540; CHECK-LABEL: test_int_x86_xop_vpcomltuq: 541; CHECK: # BB#0: 542; CHECK-NEXT: vpcomltuq %xmm1, %xmm0, %xmm0 543; CHECK-NEXT: retq 544 %res = call <2 x i64> @llvm.x86.xop.vpcomltuq(<2 x i64> %a0, <2 x i64> %a1) ; 545 ret <2 x i64> %res 546} 547declare <2 x i64> @llvm.x86.xop.vpcomltuq(<2 x i64>, <2 x i64>) nounwind readnone 548 549define <8 x i16> @test_int_x86_xop_vpcomltuw(<8 x i16> %a0, <8 x i16> %a1) { 550; CHECK-LABEL: test_int_x86_xop_vpcomltuw: 551; CHECK: # BB#0: 552; CHECK-NEXT: vpcomltuw %xmm1, %xmm0, %xmm0 553; CHECK-NEXT: retq 554 %res = call <8 x i16> @llvm.x86.xop.vpcomltuw(<8 x i16> %a0, <8 x i16> %a1) ; 555 ret <8 x i16> %res 556} 557declare <8 x i16> @llvm.x86.xop.vpcomltuw(<8 x i16>, <8 x i16>) nounwind readnone 558 559define <8 x i16> @test_int_x86_xop_vpcomltw(<8 x i16> %a0, <8 x i16> %a1) { 560; CHECK-LABEL: test_int_x86_xop_vpcomltw: 561; CHECK: # BB#0: 562; CHECK-NEXT: vpcomltw %xmm1, %xmm0, %xmm0 563; CHECK-NEXT: retq 564 %res = call <8 x i16> @llvm.x86.xop.vpcomltw(<8 x i16> %a0, <8 x i16> %a1) ; 565 ret <8 x i16> %res 566} 567declare <8 x i16> @llvm.x86.xop.vpcomltw(<8 x i16>, <8 x i16>) nounwind readnone 568 569define <16 x i8> @test_int_x86_xop_vpcomneb(<16 x i8> %a0, <16 x i8> %a1) { 570; CHECK-LABEL: test_int_x86_xop_vpcomneb: 571; CHECK: # BB#0: 572; CHECK-NEXT: vpcomneqb %xmm1, %xmm0, %xmm0 573; CHECK-NEXT: retq 574 %res = call <16 x i8> @llvm.x86.xop.vpcomneb(<16 x i8> %a0, <16 x i8> %a1) ; 575 ret <16 x i8> %res 576} 577declare <16 x i8> @llvm.x86.xop.vpcomneb(<16 x i8>, <16 x i8>) nounwind readnone 578 579define <4 x i32> @test_int_x86_xop_vpcomned(<4 x i32> %a0, <4 x i32> %a1) { 580; CHECK-LABEL: test_int_x86_xop_vpcomned: 581; CHECK: # BB#0: 582; CHECK-NEXT: vpcomneqd %xmm1, %xmm0, %xmm0 583; CHECK-NEXT: retq 584 %res = call <4 x i32> @llvm.x86.xop.vpcomned(<4 x i32> %a0, <4 x i32> %a1) ; 585 ret <4 x i32> %res 586} 587declare <4 x i32> @llvm.x86.xop.vpcomned(<4 x i32>, <4 x i32>) nounwind readnone 588 589define <2 x i64> @test_int_x86_xop_vpcomneq(<2 x i64> %a0, <2 x i64> %a1) { 590; CHECK-LABEL: test_int_x86_xop_vpcomneq: 591; CHECK: # BB#0: 592; CHECK-NEXT: vpcomneqq %xmm1, %xmm0, %xmm0 593; CHECK-NEXT: retq 594 %res = call <2 x i64> @llvm.x86.xop.vpcomneq(<2 x i64> %a0, <2 x i64> %a1) ; 595 ret <2 x i64> %res 596} 597declare <2 x i64> @llvm.x86.xop.vpcomneq(<2 x i64>, <2 x i64>) nounwind readnone 598 599define <16 x i8> @test_int_x86_xop_vpcomneub(<16 x i8> %a0, <16 x i8> %a1) { 600; CHECK-LABEL: test_int_x86_xop_vpcomneub: 601; CHECK: # BB#0: 602; CHECK-NEXT: vpcomnequb %xmm1, %xmm0, %xmm0 603; CHECK-NEXT: retq 604 %res = call <16 x i8> @llvm.x86.xop.vpcomneub(<16 x i8> %a0, <16 x i8> %a1) ; 605 ret <16 x i8> %res 606} 607declare <16 x i8> @llvm.x86.xop.vpcomneub(<16 x i8>, <16 x i8>) nounwind readnone 608 609define <4 x i32> @test_int_x86_xop_vpcomneud(<4 x i32> %a0, <4 x i32> %a1) { 610; CHECK-LABEL: test_int_x86_xop_vpcomneud: 611; CHECK: # BB#0: 612; CHECK-NEXT: vpcomnequd %xmm1, %xmm0, %xmm0 613; CHECK-NEXT: retq 614 %res = call <4 x i32> @llvm.x86.xop.vpcomneud(<4 x i32> %a0, <4 x i32> %a1) ; 615 ret <4 x i32> %res 616} 617declare <4 x i32> @llvm.x86.xop.vpcomneud(<4 x i32>, <4 x i32>) nounwind readnone 618 619define <2 x i64> @test_int_x86_xop_vpcomneuq(<2 x i64> %a0, <2 x i64> %a1) { 620; CHECK-LABEL: test_int_x86_xop_vpcomneuq: 621; CHECK: # BB#0: 622; CHECK-NEXT: vpcomnequq %xmm1, %xmm0, %xmm0 623; CHECK-NEXT: retq 624 %res = call <2 x i64> @llvm.x86.xop.vpcomneuq(<2 x i64> %a0, <2 x i64> %a1) ; 625 ret <2 x i64> %res 626} 627declare <2 x i64> @llvm.x86.xop.vpcomneuq(<2 x i64>, <2 x i64>) nounwind readnone 628 629define <8 x i16> @test_int_x86_xop_vpcomneuw(<8 x i16> %a0, <8 x i16> %a1) { 630; CHECK-LABEL: test_int_x86_xop_vpcomneuw: 631; CHECK: # BB#0: 632; CHECK-NEXT: vpcomnequw %xmm1, %xmm0, %xmm0 633; CHECK-NEXT: retq 634 %res = call <8 x i16> @llvm.x86.xop.vpcomneuw(<8 x i16> %a0, <8 x i16> %a1) ; 635 ret <8 x i16> %res 636} 637declare <8 x i16> @llvm.x86.xop.vpcomneuw(<8 x i16>, <8 x i16>) nounwind readnone 638 639define <8 x i16> @test_int_x86_xop_vpcomnew(<8 x i16> %a0, <8 x i16> %a1) { 640; CHECK-LABEL: test_int_x86_xop_vpcomnew: 641; CHECK: # BB#0: 642; CHECK-NEXT: vpcomneqw %xmm1, %xmm0, %xmm0 643; CHECK-NEXT: retq 644 %res = call <8 x i16> @llvm.x86.xop.vpcomnew(<8 x i16> %a0, <8 x i16> %a1) ; 645 ret <8 x i16> %res 646} 647declare <8 x i16> @llvm.x86.xop.vpcomnew(<8 x i16>, <8 x i16>) nounwind readnone 648 649define <16 x i8> @test_int_x86_xop_vpcomtrueb(<16 x i8> %a0, <16 x i8> %a1) { 650; CHECK-LABEL: test_int_x86_xop_vpcomtrueb: 651; CHECK: # BB#0: 652; CHECK-NEXT: vpcomtrueb %xmm1, %xmm0, %xmm0 653; CHECK-NEXT: retq 654 %res = call <16 x i8> @llvm.x86.xop.vpcomtrueb(<16 x i8> %a0, <16 x i8> %a1) ; 655 ret <16 x i8> %res 656} 657declare <16 x i8> @llvm.x86.xop.vpcomtrueb(<16 x i8>, <16 x i8>) nounwind readnone 658 659define <4 x i32> @test_int_x86_xop_vpcomtrued(<4 x i32> %a0, <4 x i32> %a1) { 660; CHECK-LABEL: test_int_x86_xop_vpcomtrued: 661; CHECK: # BB#0: 662; CHECK-NEXT: vpcomtrued %xmm1, %xmm0, %xmm0 663; CHECK-NEXT: retq 664 %res = call <4 x i32> @llvm.x86.xop.vpcomtrued(<4 x i32> %a0, <4 x i32> %a1) ; 665 ret <4 x i32> %res 666} 667declare <4 x i32> @llvm.x86.xop.vpcomtrued(<4 x i32>, <4 x i32>) nounwind readnone 668 669define <2 x i64> @test_int_x86_xop_vpcomtrueq(<2 x i64> %a0, <2 x i64> %a1) { 670; CHECK-LABEL: test_int_x86_xop_vpcomtrueq: 671; CHECK: # BB#0: 672; CHECK-NEXT: vpcomtrueq %xmm1, %xmm0, %xmm0 673; CHECK-NEXT: retq 674 %res = call <2 x i64> @llvm.x86.xop.vpcomtrueq(<2 x i64> %a0, <2 x i64> %a1) ; 675 ret <2 x i64> %res 676} 677declare <2 x i64> @llvm.x86.xop.vpcomtrueq(<2 x i64>, <2 x i64>) nounwind readnone 678 679define <16 x i8> @test_int_x86_xop_vpcomtrueub(<16 x i8> %a0, <16 x i8> %a1) { 680; CHECK-LABEL: test_int_x86_xop_vpcomtrueub: 681; CHECK: # BB#0: 682; CHECK-NEXT: vpcomtrueub %xmm1, %xmm0, %xmm0 683; CHECK-NEXT: retq 684 %res = call <16 x i8> @llvm.x86.xop.vpcomtrueub(<16 x i8> %a0, <16 x i8> %a1) ; 685 ret <16 x i8> %res 686} 687declare <16 x i8> @llvm.x86.xop.vpcomtrueub(<16 x i8>, <16 x i8>) nounwind readnone 688 689define <4 x i32> @test_int_x86_xop_vpcomtrueud(<4 x i32> %a0, <4 x i32> %a1) { 690; CHECK-LABEL: test_int_x86_xop_vpcomtrueud: 691; CHECK: # BB#0: 692; CHECK-NEXT: vpcomtrueud %xmm1, %xmm0, %xmm0 693; CHECK-NEXT: retq 694 %res = call <4 x i32> @llvm.x86.xop.vpcomtrueud(<4 x i32> %a0, <4 x i32> %a1) ; 695 ret <4 x i32> %res 696} 697declare <4 x i32> @llvm.x86.xop.vpcomtrueud(<4 x i32>, <4 x i32>) nounwind readnone 698 699define <2 x i64> @test_int_x86_xop_vpcomtrueuq(<2 x i64> %a0, <2 x i64> %a1) { 700; CHECK-LABEL: test_int_x86_xop_vpcomtrueuq: 701; CHECK: # BB#0: 702; CHECK-NEXT: vpcomtrueuq %xmm1, %xmm0, %xmm0 703; CHECK-NEXT: retq 704 %res = call <2 x i64> @llvm.x86.xop.vpcomtrueuq(<2 x i64> %a0, <2 x i64> %a1) ; 705 ret <2 x i64> %res 706} 707declare <2 x i64> @llvm.x86.xop.vpcomtrueuq(<2 x i64>, <2 x i64>) nounwind readnone 708 709define <8 x i16> @test_int_x86_xop_vpcomtrueuw(<8 x i16> %a0, <8 x i16> %a1) { 710; CHECK-LABEL: test_int_x86_xop_vpcomtrueuw: 711; CHECK: # BB#0: 712; CHECK-NEXT: vpcomtrueuw %xmm1, %xmm0, %xmm0 713; CHECK-NEXT: retq 714 %res = call <8 x i16> @llvm.x86.xop.vpcomtrueuw(<8 x i16> %a0, <8 x i16> %a1) ; 715 ret <8 x i16> %res 716} 717declare <8 x i16> @llvm.x86.xop.vpcomtrueuw(<8 x i16>, <8 x i16>) nounwind readnone 718 719define <8 x i16> @test_int_x86_xop_vpcomtruew(<8 x i16> %a0, <8 x i16> %a1) { 720; CHECK-LABEL: test_int_x86_xop_vpcomtruew: 721; CHECK: # BB#0: 722; CHECK-NEXT: vpcomtruew %xmm1, %xmm0, %xmm0 723; CHECK-NEXT: retq 724 %res = call <8 x i16> @llvm.x86.xop.vpcomtruew(<8 x i16> %a0, <8 x i16> %a1) ; 725 ret <8 x i16> %res 726} 727declare <8 x i16> @llvm.x86.xop.vpcomtruew(<8 x i16>, <8 x i16>) nounwind readnone 728