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1; RUN: opt < %s -instcombine -S | FileCheck %s
2
3define i32 @abs_abs_x01(i32 %x) {
4  %cmp = icmp sgt i32 %x, -1
5  %sub = sub nsw i32 0, %x
6  %cond = select i1 %cmp, i32 %x, i32 %sub
7  %cmp1 = icmp sgt i32 %cond, -1
8  %sub16 = sub nsw i32 0, %cond
9  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
10  ret i32 %cond18
11; CHECK-LABEL: @abs_abs_x01(
12; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
13; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
14; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
15; CHECK-NEXT: ret i32 [[SEL]]
16}
17
18define i32 @abs_abs_x02(i32 %x) {
19  %cmp = icmp sgt i32 %x, 0
20  %sub = sub nsw i32 0, %x
21  %cond = select i1 %cmp, i32 %x, i32 %sub
22  %cmp1 = icmp sgt i32 %cond, -1
23  %sub16 = sub nsw i32 0, %cond
24  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
25  ret i32 %cond18
26; CHECK-LABEL: @abs_abs_x02(
27; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
28; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
29; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
30; CHECK-NEXT: ret i32 [[SEL]]
31}
32
33define i32 @abs_abs_x03(i32 %x) {
34  %cmp = icmp slt i32 %x, 0
35  %sub = sub nsw i32 0, %x
36  %cond = select i1 %cmp, i32 %sub, i32 %x
37  %cmp1 = icmp sgt i32 %cond, -1
38  %sub16 = sub nsw i32 0, %cond
39  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
40  ret i32 %cond18
41; CHECK-LABEL: @abs_abs_x03(
42; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
43; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
44; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
45; CHECK-NEXT: ret i32 [[SEL]]
46}
47
48define i32 @abs_abs_x04(i32 %x) {
49  %cmp = icmp slt i32 %x, 1
50  %sub = sub nsw i32 0, %x
51  %cond = select i1 %cmp, i32 %sub, i32 %x
52  %cmp1 = icmp sgt i32 %cond, -1
53  %sub16 = sub nsw i32 0, %cond
54  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
55  ret i32 %cond18
56; CHECK-LABEL: @abs_abs_x04(
57; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
58; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
59; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
60; CHECK-NEXT: ret i32 [[SEL]]
61}
62
63define i32 @abs_abs_x05(i32 %x) {
64  %cmp = icmp sgt i32 %x, -1
65  %sub = sub nsw i32 0, %x
66  %cond = select i1 %cmp, i32 %x, i32 %sub
67  %cmp1 = icmp sgt i32 %cond, 0
68  %sub16 = sub nsw i32 0, %cond
69  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
70  ret i32 %cond18
71; CHECK-LABEL: @abs_abs_x05(
72; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
73; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
74; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
75; CHECK-NEXT: ret i32 [[SEL]]
76}
77
78define i32 @abs_abs_x06(i32 %x) {
79  %cmp = icmp sgt i32 %x, 0
80  %sub = sub nsw i32 0, %x
81  %cond = select i1 %cmp, i32 %x, i32 %sub
82  %cmp1 = icmp sgt i32 %cond, 0
83  %sub16 = sub nsw i32 0, %cond
84  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
85  ret i32 %cond18
86; CHECK-LABEL: @abs_abs_x06(
87; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
88; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
89; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
90; CHECK-NEXT: ret i32 [[SEL]]
91}
92
93define i32 @abs_abs_x07(i32 %x) {
94  %cmp = icmp slt i32 %x, 0
95  %sub = sub nsw i32 0, %x
96  %cond = select i1 %cmp, i32 %sub, i32 %x
97  %cmp1 = icmp sgt i32 %cond, 0
98  %sub16 = sub nsw i32 0, %cond
99  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
100  ret i32 %cond18
101; CHECK-LABEL: @abs_abs_x07(
102; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
103; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
104; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
105; CHECK-NEXT: ret i32 [[SEL]]
106}
107
108define i32 @abs_abs_x08(i32 %x) {
109  %cmp = icmp slt i32 %x, 1
110  %sub = sub nsw i32 0, %x
111  %cond = select i1 %cmp, i32 %sub, i32 %x
112  %cmp1 = icmp sgt i32 %cond, 0
113  %sub16 = sub nsw i32 0, %cond
114  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
115  ret i32 %cond18
116; CHECK-LABEL: @abs_abs_x08(
117; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
118; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
119; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
120; CHECK-NEXT: ret i32 [[SEL]]
121}
122
123define i32 @abs_abs_x09(i32 %x) {
124  %cmp = icmp sgt i32 %x, -1
125  %sub = sub nsw i32 0, %x
126  %cond = select i1 %cmp, i32 %x, i32 %sub
127  %cmp1 = icmp slt i32 %cond, 0
128  %sub9 = sub nsw i32 0, %cond
129  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
130  ret i32 %cond18
131; CHECK-LABEL: @abs_abs_x09(
132; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
133; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
134; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
135; CHECK-NEXT: ret i32 [[SEL]]
136}
137
138define i32 @abs_abs_x10(i32 %x) {
139  %cmp = icmp sgt i32 %x, 0
140  %sub = sub nsw i32 0, %x
141  %cond = select i1 %cmp, i32 %x, i32 %sub
142  %cmp1 = icmp slt i32 %cond, 0
143  %sub9 = sub nsw i32 0, %cond
144  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
145  ret i32 %cond18
146; CHECK-LABEL: @abs_abs_x10(
147; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
148; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
149; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
150; CHECK-NEXT: ret i32 [[SEL]]
151}
152
153define i32 @abs_abs_x11(i32 %x) {
154  %cmp = icmp slt i32 %x, 0
155  %sub = sub nsw i32 0, %x
156  %cond = select i1 %cmp, i32 %sub, i32 %x
157  %cmp1 = icmp slt i32 %cond, 0
158  %sub9 = sub nsw i32 0, %cond
159  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
160  ret i32 %cond18
161; CHECK-LABEL: @abs_abs_x11(
162; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
163; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
164; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
165; CHECK-NEXT: ret i32 [[SEL]]
166}
167
168define i32 @abs_abs_x12(i32 %x) {
169  %cmp = icmp slt i32 %x, 1
170  %sub = sub nsw i32 0, %x
171  %cond = select i1 %cmp, i32 %sub, i32 %x
172  %cmp1 = icmp slt i32 %cond, 0
173  %sub9 = sub nsw i32 0, %cond
174  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
175  ret i32 %cond18
176; CHECK-LABEL: @abs_abs_x12(
177; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
178; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
179; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
180; CHECK-NEXT: ret i32 [[SEL]]
181}
182
183define i32 @abs_abs_x13(i32 %x) {
184  %cmp = icmp sgt i32 %x, -1
185  %sub = sub nsw i32 0, %x
186  %cond = select i1 %cmp, i32 %x, i32 %sub
187  %cmp1 = icmp slt i32 %cond, 1
188  %sub9 = sub nsw i32 0, %cond
189  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
190  ret i32 %cond18
191; CHECK-LABEL: @abs_abs_x13(
192; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
193; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
194; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
195; CHECK-NEXT: ret i32 [[SEL]]
196}
197
198define i32 @abs_abs_x14(i32 %x) {
199  %cmp = icmp sgt i32 %x, 0
200  %sub = sub nsw i32 0, %x
201  %cond = select i1 %cmp, i32 %x, i32 %sub
202  %cmp1 = icmp slt i32 %cond, 1
203  %sub9 = sub nsw i32 0, %cond
204  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
205  ret i32 %cond18
206; CHECK-LABEL: @abs_abs_x14(
207; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
208; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
209; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
210; CHECK-NEXT: ret i32 [[SEL]]
211}
212
213define i32 @abs_abs_x15(i32 %x) {
214  %cmp = icmp slt i32 %x, 0
215  %sub = sub nsw i32 0, %x
216  %cond = select i1 %cmp, i32 %sub, i32 %x
217  %cmp1 = icmp slt i32 %cond, 1
218  %sub9 = sub nsw i32 0, %cond
219  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
220  ret i32 %cond18
221; CHECK-LABEL: @abs_abs_x15(
222; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
223; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
224; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
225; CHECK-NEXT: ret i32 [[SEL]]
226}
227
228define i32 @abs_abs_x16(i32 %x) {
229  %cmp = icmp slt i32 %x, 1
230  %sub = sub nsw i32 0, %x
231  %cond = select i1 %cmp, i32 %sub, i32 %x
232  %cmp1 = icmp slt i32 %cond, 1
233  %sub9 = sub nsw i32 0, %cond
234  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
235  ret i32 %cond18
236; CHECK-LABEL: @abs_abs_x16(
237; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
238; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
239; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
240; CHECK-NEXT: ret i32 [[SEL]]
241}
242
243define i32 @nabs_nabs_x01(i32 %x) {
244  %cmp = icmp sgt i32 %x, -1
245  %sub = sub nsw i32 0, %x
246  %cond = select i1 %cmp, i32 %sub, i32 %x
247  %cmp1 = icmp sgt i32 %cond, -1
248  %sub9 = sub nsw i32 0, %cond
249  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
250  ret i32 %cond18
251; CHECK-LABEL: @nabs_nabs_x01(
252; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
253; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
254; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
255; CHECK-NEXT: ret i32 [[SEL]]
256}
257
258define i32 @nabs_nabs_x02(i32 %x) {
259  %cmp = icmp sgt i32 %x, 0
260  %sub = sub nsw i32 0, %x
261  %cond = select i1 %cmp, i32 %sub, i32 %x
262  %cmp1 = icmp sgt i32 %cond, -1
263  %sub9 = sub nsw i32 0, %cond
264  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
265  ret i32 %cond18
266; CHECK-LABEL: @nabs_nabs_x02(
267; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
268; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
269; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
270; CHECK-NEXT: ret i32 [[SEL]]
271}
272
273define i32 @nabs_nabs_x03(i32 %x) {
274  %cmp = icmp slt i32 %x, 0
275  %sub = sub nsw i32 0, %x
276  %cond = select i1 %cmp, i32 %x, i32 %sub
277  %cmp1 = icmp sgt i32 %cond, -1
278  %sub9 = sub nsw i32 0, %cond
279  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
280  ret i32 %cond18
281; CHECK-LABEL: @nabs_nabs_x03(
282; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
283; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
284; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
285; CHECK-NEXT: ret i32 [[SEL]]
286}
287
288define i32 @nabs_nabs_x04(i32 %x) {
289  %cmp = icmp slt i32 %x, 1
290  %sub = sub nsw i32 0, %x
291  %cond = select i1 %cmp, i32 %x, i32 %sub
292  %cmp1 = icmp sgt i32 %cond, -1
293  %sub9 = sub nsw i32 0, %cond
294  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
295  ret i32 %cond18
296; CHECK-LABEL: @nabs_nabs_x04(
297; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
298; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
299; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
300; CHECK-NEXT: ret i32 [[SEL]]
301}
302
303define i32 @nabs_nabs_x05(i32 %x) {
304  %cmp = icmp sgt i32 %x, -1
305  %sub = sub nsw i32 0, %x
306  %cond = select i1 %cmp, i32 %sub, i32 %x
307  %cmp1 = icmp sgt i32 %cond, 0
308  %sub9 = sub nsw i32 0, %cond
309  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
310  ret i32 %cond18
311; CHECK-LABEL: @nabs_nabs_x05(
312; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
313; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
314; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
315; CHECK-NEXT: ret i32 [[SEL]]
316}
317
318define i32 @nabs_nabs_x06(i32 %x) {
319  %cmp = icmp sgt i32 %x, 0
320  %sub = sub nsw i32 0, %x
321  %cond = select i1 %cmp, i32 %sub, i32 %x
322  %cmp1 = icmp sgt i32 %cond, 0
323  %sub9 = sub nsw i32 0, %cond
324  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
325  ret i32 %cond18
326; CHECK-LABEL: @nabs_nabs_x06(
327; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
328; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
329; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
330; CHECK-NEXT: ret i32 [[SEL]]
331}
332
333define i32 @nabs_nabs_x07(i32 %x) {
334  %cmp = icmp slt i32 %x, 0
335  %sub = sub nsw i32 0, %x
336  %cond = select i1 %cmp, i32 %x, i32 %sub
337  %cmp1 = icmp sgt i32 %cond, 0
338  %sub9 = sub nsw i32 0, %cond
339  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
340  ret i32 %cond18
341; CHECK-LABEL: @nabs_nabs_x07(
342; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
343; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
344; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
345; CHECK-NEXT: ret i32 [[SEL]]
346}
347
348define i32 @nabs_nabs_x08(i32 %x) {
349  %cmp = icmp slt i32 %x, 1
350  %sub = sub nsw i32 0, %x
351  %cond = select i1 %cmp, i32 %x, i32 %sub
352  %cmp1 = icmp sgt i32 %cond, 0
353  %sub9 = sub nsw i32 0, %cond
354  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
355  ret i32 %cond18
356; CHECK-LABEL: @nabs_nabs_x08(
357; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
358; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
359; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
360; CHECK-NEXT: ret i32 [[SEL]]
361}
362
363define i32 @nabs_nabs_x09(i32 %x) {
364  %cmp = icmp sgt i32 %x, -1
365  %sub = sub nsw i32 0, %x
366  %cond = select i1 %cmp, i32 %sub, i32 %x
367  %cmp1 = icmp slt i32 %cond, 0
368  %sub16 = sub nsw i32 0, %cond
369  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
370  ret i32 %cond18
371; CHECK-LABEL: @nabs_nabs_x09(
372; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
373; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
374; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
375; CHECK-NEXT: ret i32 [[SEL]]
376}
377
378define i32 @nabs_nabs_x10(i32 %x) {
379  %cmp = icmp sgt i32 %x, 0
380  %sub = sub nsw i32 0, %x
381  %cond = select i1 %cmp, i32 %sub, i32 %x
382  %cmp1 = icmp slt i32 %cond, 0
383  %sub16 = sub nsw i32 0, %cond
384  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
385  ret i32 %cond18
386; CHECK-LABEL: @nabs_nabs_x10(
387; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
388; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
389; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
390; CHECK-NEXT: ret i32 [[SEL]]
391}
392
393define i32 @nabs_nabs_x11(i32 %x) {
394  %cmp = icmp slt i32 %x, 0
395  %sub = sub nsw i32 0, %x
396  %cond = select i1 %cmp, i32 %x, i32 %sub
397  %cmp1 = icmp slt i32 %cond, 0
398  %sub16 = sub nsw i32 0, %cond
399  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
400  ret i32 %cond18
401; CHECK-LABEL: @nabs_nabs_x11(
402; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
403; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
404; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
405; CHECK-NEXT: ret i32 [[SEL]]
406}
407
408define i32 @nabs_nabs_x12(i32 %x) {
409  %cmp = icmp slt i32 %x, 1
410  %sub = sub nsw i32 0, %x
411  %cond = select i1 %cmp, i32 %x, i32 %sub
412  %cmp1 = icmp slt i32 %cond, 0
413  %sub16 = sub nsw i32 0, %cond
414  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
415  ret i32 %cond18
416; CHECK-LABEL: @nabs_nabs_x12(
417; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
418; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
419; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
420; CHECK-NEXT: ret i32 [[SEL]]
421}
422
423define i32 @nabs_nabs_x13(i32 %x) {
424  %cmp = icmp sgt i32 %x, -1
425  %sub = sub nsw i32 0, %x
426  %cond = select i1 %cmp, i32 %sub, i32 %x
427  %cmp1 = icmp slt i32 %cond, 1
428  %sub16 = sub nsw i32 0, %cond
429  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
430  ret i32 %cond18
431; CHECK-LABEL: @nabs_nabs_x13(
432; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
433; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
434; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
435; CHECK-NEXT: ret i32 [[SEL]]
436}
437
438define i32 @nabs_nabs_x14(i32 %x) {
439  %cmp = icmp sgt i32 %x, 0
440  %sub = sub nsw i32 0, %x
441  %cond = select i1 %cmp, i32 %sub, i32 %x
442  %cmp1 = icmp slt i32 %cond, 1
443  %sub16 = sub nsw i32 0, %cond
444  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
445  ret i32 %cond18
446; CHECK-LABEL: @nabs_nabs_x14(
447; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
448; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
449; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
450; CHECK-NEXT: ret i32 [[SEL]]
451}
452
453define i32 @nabs_nabs_x15(i32 %x) {
454  %cmp = icmp slt i32 %x, 0
455  %sub = sub nsw i32 0, %x
456  %cond = select i1 %cmp, i32 %x, i32 %sub
457  %cmp1 = icmp slt i32 %cond, 1
458  %sub16 = sub nsw i32 0, %cond
459  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
460  ret i32 %cond18
461; CHECK-LABEL: @nabs_nabs_x15(
462; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
463; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
464; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
465; CHECK-NEXT: ret i32 [[SEL]]
466}
467
468define i32 @nabs_nabs_x16(i32 %x) {
469  %cmp = icmp slt i32 %x, 1
470  %sub = sub nsw i32 0, %x
471  %cond = select i1 %cmp, i32 %x, i32 %sub
472  %cmp1 = icmp slt i32 %cond, 1
473  %sub16 = sub nsw i32 0, %cond
474  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
475  ret i32 %cond18
476; CHECK-LABEL: @nabs_nabs_x16(
477; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
478; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
479; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
480; CHECK-NEXT: ret i32 [[SEL]]
481}
482
483define i32 @abs_nabs_x01(i32 %x) {
484  %cmp = icmp sgt i32 %x, -1
485  %sub = sub nsw i32 0, %x
486  %cond = select i1 %cmp, i32 %sub, i32 %x
487  %cmp1 = icmp sgt i32 %cond, -1
488  %sub16 = sub nsw i32 0, %cond
489  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
490  ret i32 %cond18
491; CHECK-LABEL: @abs_nabs_x01(
492; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
493; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
494; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
495; CHECK-NEXT: ret i32 [[SEL]]
496}
497
498define i32 @abs_nabs_x02(i32 %x) {
499  %cmp = icmp sgt i32 %x, 0
500  %sub = sub nsw i32 0, %x
501  %cond = select i1 %cmp, i32 %sub, i32 %x
502  %cmp1 = icmp sgt i32 %cond, -1
503  %sub16 = sub nsw i32 0, %cond
504  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
505  ret i32 %cond18
506; CHECK-LABEL: @abs_nabs_x02(
507; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
508; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
509; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
510; CHECK-NEXT: ret i32 [[SEL]]
511}
512
513define i32 @abs_nabs_x03(i32 %x) {
514  %cmp = icmp slt i32 %x, 0
515  %sub = sub nsw i32 0, %x
516  %cond = select i1 %cmp, i32 %x, i32 %sub
517  %cmp1 = icmp sgt i32 %cond, -1
518  %sub16 = sub nsw i32 0, %cond
519  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
520  ret i32 %cond18
521; CHECK-LABEL: @abs_nabs_x03(
522; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
523; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
524; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
525; CHECK-NEXT: ret i32 [[SEL]]
526}
527
528define i32 @abs_nabs_x04(i32 %x) {
529  %cmp = icmp slt i32 %x, 1
530  %sub = sub nsw i32 0, %x
531  %cond = select i1 %cmp, i32 %x, i32 %sub
532  %cmp1 = icmp sgt i32 %cond, -1
533  %sub16 = sub nsw i32 0, %cond
534  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
535  ret i32 %cond18
536; CHECK-LABEL: @abs_nabs_x04(
537; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
538; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
539; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
540; CHECK-NEXT: ret i32 [[SEL]]
541}
542
543define i32 @abs_nabs_x05(i32 %x) {
544  %cmp = icmp sgt i32 %x, -1
545  %sub = sub nsw i32 0, %x
546  %cond = select i1 %cmp, i32 %sub, i32 %x
547  %cmp1 = icmp sgt i32 %cond, 0
548  %sub16 = sub nsw i32 0, %cond
549  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
550  ret i32 %cond18
551; CHECK-LABEL: @abs_nabs_x05(
552; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
553; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
554; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
555; CHECK-NEXT: ret i32 [[SEL]]
556}
557
558define i32 @abs_nabs_x06(i32 %x) {
559  %cmp = icmp sgt i32 %x, 0
560  %sub = sub nsw i32 0, %x
561  %cond = select i1 %cmp, i32 %sub, i32 %x
562  %cmp1 = icmp sgt i32 %cond, 0
563  %sub16 = sub nsw i32 0, %cond
564  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
565  ret i32 %cond18
566; CHECK-LABEL: @abs_nabs_x06(
567; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
568; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
569; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
570; CHECK-NEXT: ret i32 [[SEL]]
571}
572
573define i32 @abs_nabs_x07(i32 %x) {
574  %cmp = icmp slt i32 %x, 0
575  %sub = sub nsw i32 0, %x
576  %cond = select i1 %cmp, i32 %x, i32 %sub
577  %cmp1 = icmp sgt i32 %cond, 0
578  %sub16 = sub nsw i32 0, %cond
579  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
580  ret i32 %cond18
581; CHECK-LABEL: @abs_nabs_x07(
582; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
583; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
584; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
585; CHECK-NEXT: ret i32 [[SEL]]
586}
587
588define i32 @abs_nabs_x08(i32 %x) {
589  %cmp = icmp slt i32 %x, 1
590  %sub = sub nsw i32 0, %x
591  %cond = select i1 %cmp, i32 %x, i32 %sub
592  %cmp1 = icmp sgt i32 %cond, 0
593  %sub16 = sub nsw i32 0, %cond
594  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
595  ret i32 %cond18
596; CHECK-LABEL: @abs_nabs_x08(
597; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
598; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
599; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
600; CHECK-NEXT: ret i32 [[SEL]]
601}
602
603define i32 @abs_nabs_x09(i32 %x) {
604  %cmp = icmp sgt i32 %x, -1
605  %sub = sub nsw i32 0, %x
606  %cond = select i1 %cmp, i32 %sub, i32 %x
607  %cmp1 = icmp slt i32 %cond, 0
608  %sub9 = sub nsw i32 0, %cond
609  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
610  ret i32 %cond18
611; CHECK-LABEL: @abs_nabs_x09(
612; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
613; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
614; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
615; CHECK-NEXT: ret i32 [[SEL]]
616}
617
618define i32 @abs_nabs_x10(i32 %x) {
619  %cmp = icmp sgt i32 %x, 0
620  %sub = sub nsw i32 0, %x
621  %cond = select i1 %cmp, i32 %sub, i32 %x
622  %cmp1 = icmp slt i32 %cond, 0
623  %sub9 = sub nsw i32 0, %cond
624  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
625  ret i32 %cond18
626; CHECK-LABEL: @abs_nabs_x10(
627; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
628; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
629; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
630; CHECK-NEXT: ret i32 [[SEL]]
631}
632
633define i32 @abs_nabs_x11(i32 %x) {
634  %cmp = icmp slt i32 %x, 0
635  %sub = sub nsw i32 0, %x
636  %cond = select i1 %cmp, i32 %x, i32 %sub
637  %cmp1 = icmp slt i32 %cond, 0
638  %sub9 = sub nsw i32 0, %cond
639  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
640  ret i32 %cond18
641; CHECK-LABEL: @abs_nabs_x11(
642; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
643; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
644; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
645; CHECK-NEXT: ret i32 [[SEL]]
646}
647
648define i32 @abs_nabs_x12(i32 %x) {
649  %cmp = icmp slt i32 %x, 1
650  %sub = sub nsw i32 0, %x
651  %cond = select i1 %cmp, i32 %x, i32 %sub
652  %cmp1 = icmp slt i32 %cond, 0
653  %sub9 = sub nsw i32 0, %cond
654  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
655  ret i32 %cond18
656; CHECK-LABEL: @abs_nabs_x12(
657; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
658; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
659; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
660; CHECK-NEXT: ret i32 [[SEL]]
661}
662
663define i32 @abs_nabs_x13(i32 %x) {
664  %cmp = icmp sgt i32 %x, -1
665  %sub = sub nsw i32 0, %x
666  %cond = select i1 %cmp, i32 %sub, i32 %x
667  %cmp1 = icmp slt i32 %cond, 1
668  %sub9 = sub nsw i32 0, %cond
669  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
670  ret i32 %cond18
671; CHECK-LABEL: @abs_nabs_x13(
672; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
673; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
674; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
675; CHECK-NEXT: ret i32 [[SEL]]
676}
677
678define i32 @abs_nabs_x14(i32 %x) {
679  %cmp = icmp sgt i32 %x, 0
680  %sub = sub nsw i32 0, %x
681  %cond = select i1 %cmp, i32 %sub, i32 %x
682  %cmp1 = icmp slt i32 %cond, 1
683  %sub9 = sub nsw i32 0, %cond
684  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
685  ret i32 %cond18
686; CHECK-LABEL: @abs_nabs_x14(
687; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
688; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
689; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
690; CHECK-NEXT: ret i32 [[SEL]]
691}
692
693define i32 @abs_nabs_x15(i32 %x) {
694  %cmp = icmp slt i32 %x, 0
695  %sub = sub nsw i32 0, %x
696  %cond = select i1 %cmp, i32 %x, i32 %sub
697  %cmp1 = icmp slt i32 %cond, 1
698  %sub9 = sub nsw i32 0, %cond
699  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
700  ret i32 %cond18
701; CHECK-LABEL: @abs_nabs_x15(
702; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
703; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
704; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
705; CHECK-NEXT: ret i32 [[SEL]]
706}
707
708define i32 @abs_nabs_x16(i32 %x) {
709  %cmp = icmp slt i32 %x, 1
710  %sub = sub nsw i32 0, %x
711  %cond = select i1 %cmp, i32 %x, i32 %sub
712  %cmp1 = icmp slt i32 %cond, 1
713  %sub9 = sub nsw i32 0, %cond
714  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
715  ret i32 %cond18
716; CHECK-LABEL: @abs_nabs_x16(
717; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
718; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
719; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
720; CHECK-NEXT: ret i32 [[SEL]]
721}
722
723define i32 @nabs_abs_x01(i32 %x) {
724  %cmp = icmp sgt i32 %x, -1
725  %sub = sub nsw i32 0, %x
726  %cond = select i1 %cmp, i32 %x, i32 %sub
727  %cmp1 = icmp sgt i32 %cond, -1
728  %sub9 = sub nsw i32 0, %cond
729  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
730  ret i32 %cond18
731; CHECK-LABEL: @nabs_abs_x01(
732; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
733; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
734; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
735; CHECK-NEXT: ret i32 [[SEL]]
736}
737
738define i32 @nabs_abs_x02(i32 %x) {
739  %cmp = icmp sgt i32 %x, 0
740  %sub = sub nsw i32 0, %x
741  %cond = select i1 %cmp, i32 %x, i32 %sub
742  %cmp1 = icmp sgt i32 %cond, -1
743  %sub9 = sub nsw i32 0, %cond
744  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
745  ret i32 %cond18
746; CHECK-LABEL: @nabs_abs_x02(
747; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
748; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
749; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
750; CHECK-NEXT: ret i32 [[SEL]]
751}
752
753define i32 @nabs_abs_x03(i32 %x) {
754  %cmp = icmp slt i32 %x, 0
755  %sub = sub nsw i32 0, %x
756  %cond = select i1 %cmp, i32 %sub, i32 %x
757  %cmp1 = icmp sgt i32 %cond, -1
758  %sub9 = sub nsw i32 0, %cond
759  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
760  ret i32 %cond18
761; CHECK-LABEL: @nabs_abs_x03(
762; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
763; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
764; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
765; CHECK-NEXT: ret i32 [[SEL]]
766}
767
768define i32 @nabs_abs_x04(i32 %x) {
769  %cmp = icmp slt i32 %x, 1
770  %sub = sub nsw i32 0, %x
771  %cond = select i1 %cmp, i32 %sub, i32 %x
772  %cmp1 = icmp sgt i32 %cond, -1
773  %sub9 = sub nsw i32 0, %cond
774  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
775  ret i32 %cond18
776; CHECK-LABEL: @nabs_abs_x04(
777; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
778; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
779; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
780; CHECK-NEXT: ret i32 [[SEL]]
781}
782
783define i32 @nabs_abs_x05(i32 %x) {
784  %cmp = icmp sgt i32 %x, -1
785  %sub = sub nsw i32 0, %x
786  %cond = select i1 %cmp, i32 %x, i32 %sub
787  %cmp1 = icmp sgt i32 %cond, 0
788  %sub9 = sub nsw i32 0, %cond
789  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
790  ret i32 %cond18
791; CHECK-LABEL: @nabs_abs_x05(
792; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
793; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
794; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
795; CHECK-NEXT: ret i32 [[SEL]]
796}
797
798define i32 @nabs_abs_x06(i32 %x) {
799  %cmp = icmp sgt i32 %x, 0
800  %sub = sub nsw i32 0, %x
801  %cond = select i1 %cmp, i32 %x, i32 %sub
802  %cmp1 = icmp sgt i32 %cond, 0
803  %sub9 = sub nsw i32 0, %cond
804  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
805  ret i32 %cond18
806; CHECK-LABEL: @nabs_abs_x06(
807; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
808; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
809; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
810; CHECK-NEXT: ret i32 [[SEL]]
811}
812
813define i32 @nabs_abs_x07(i32 %x) {
814  %cmp = icmp slt i32 %x, 0
815  %sub = sub nsw i32 0, %x
816  %cond = select i1 %cmp, i32 %sub, i32 %x
817  %cmp1 = icmp sgt i32 %cond, 0
818  %sub9 = sub nsw i32 0, %cond
819  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
820  ret i32 %cond18
821; CHECK-LABEL: @nabs_abs_x07(
822; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
823; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
824; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
825; CHECK-NEXT: ret i32 [[SEL]]
826}
827
828define i32 @nabs_abs_x08(i32 %x) {
829  %cmp = icmp slt i32 %x, 1
830  %sub = sub nsw i32 0, %x
831  %cond = select i1 %cmp, i32 %sub, i32 %x
832  %cmp1 = icmp sgt i32 %cond, 0
833  %sub9 = sub nsw i32 0, %cond
834  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
835  ret i32 %cond18
836; CHECK-LABEL: @nabs_abs_x08(
837; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
838; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
839; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
840; CHECK-NEXT: ret i32 [[SEL]]
841}
842
843define i32 @nabs_abs_x09(i32 %x) {
844  %cmp = icmp sgt i32 %x, -1
845  %sub = sub nsw i32 0, %x
846  %cond = select i1 %cmp, i32 %x, i32 %sub
847  %cmp1 = icmp slt i32 %cond, 0
848  %sub16 = sub nsw i32 0, %cond
849  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
850  ret i32 %cond18
851; CHECK-LABEL: @nabs_abs_x09(
852; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
853; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
854; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
855; CHECK-NEXT: ret i32 [[SEL]]
856}
857
858define i32 @nabs_abs_x10(i32 %x) {
859  %cmp = icmp sgt i32 %x, 0
860  %sub = sub nsw i32 0, %x
861  %cond = select i1 %cmp, i32 %x, i32 %sub
862  %cmp1 = icmp slt i32 %cond, 0
863  %sub16 = sub nsw i32 0, %cond
864  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
865  ret i32 %cond18
866; CHECK-LABEL: @nabs_abs_x10(
867; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
868; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
869; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
870; CHECK-NEXT: ret i32 [[SEL]]
871}
872
873define i32 @nabs_abs_x11(i32 %x) {
874  %cmp = icmp slt i32 %x, 0
875  %sub = sub nsw i32 0, %x
876  %cond = select i1 %cmp, i32 %sub, i32 %x
877  %cmp1 = icmp slt i32 %cond, 0
878  %sub16 = sub nsw i32 0, %cond
879  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
880  ret i32 %cond18
881; CHECK-LABEL: @nabs_abs_x11(
882; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
883; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
884; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
885; CHECK-NEXT: ret i32 [[SEL]]
886}
887
888define i32 @nabs_abs_x12(i32 %x) {
889  %cmp = icmp slt i32 %x, 1
890  %sub = sub nsw i32 0, %x
891  %cond = select i1 %cmp, i32 %sub, i32 %x
892  %cmp1 = icmp slt i32 %cond, 0
893  %sub16 = sub nsw i32 0, %cond
894  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
895  ret i32 %cond18
896; CHECK-LABEL: @nabs_abs_x12(
897; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
898; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
899; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
900; CHECK-NEXT: ret i32 [[SEL]]
901}
902
903define i32 @nabs_abs_x13(i32 %x) {
904  %cmp = icmp sgt i32 %x, -1
905  %sub = sub nsw i32 0, %x
906  %cond = select i1 %cmp, i32 %x, i32 %sub
907  %cmp1 = icmp slt i32 %cond, 1
908  %sub16 = sub nsw i32 0, %cond
909  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
910  ret i32 %cond18
911; CHECK-LABEL: @nabs_abs_x13(
912; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
913; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
914; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
915; CHECK-NEXT: ret i32 [[SEL]]
916}
917
918define i32 @nabs_abs_x14(i32 %x) {
919  %cmp = icmp sgt i32 %x, 0
920  %sub = sub nsw i32 0, %x
921  %cond = select i1 %cmp, i32 %x, i32 %sub
922  %cmp1 = icmp slt i32 %cond, 1
923  %sub16 = sub nsw i32 0, %cond
924  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
925  ret i32 %cond18
926; CHECK-LABEL: @nabs_abs_x14(
927; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
928; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
929; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
930; CHECK-NEXT: ret i32 [[SEL]]
931}
932
933define i32 @nabs_abs_x15(i32 %x) {
934  %cmp = icmp slt i32 %x, 0
935  %sub = sub nsw i32 0, %x
936  %cond = select i1 %cmp, i32 %sub, i32 %x
937  %cmp1 = icmp slt i32 %cond, 1
938  %sub16 = sub nsw i32 0, %cond
939  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
940  ret i32 %cond18
941; CHECK-LABEL: @nabs_abs_x15(
942; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
943; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
944; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
945; CHECK-NEXT: ret i32 [[SEL]]
946}
947
948define i32 @nabs_abs_x16(i32 %x) {
949  %cmp = icmp slt i32 %x, 1
950  %sub = sub nsw i32 0, %x
951  %cond = select i1 %cmp, i32 %sub, i32 %x
952  %cmp1 = icmp slt i32 %cond, 1
953  %sub16 = sub nsw i32 0, %cond
954  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
955  ret i32 %cond18
956; CHECK-LABEL: @nabs_abs_x16(
957; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
958; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
959; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
960; CHECK-NEXT: ret i32 [[SEL]]
961}