• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; RUN: opt -S -instcombine < %s | FileCheck %s
2target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
3target triple = "powerpc64-unknown-linux-gnu"
4
5declare <4 x i32> @llvm.ppc.altivec.lvx(i8*) #1
6
7define <4 x i32> @test1(<4 x i32>* %h) #0 {
8entry:
9  %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
10  %hv = bitcast <4 x i32>* %h1 to i8*
11  %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
12
13; CHECK-LABEL: @test1
14; CHECK: @llvm.ppc.altivec.lvx
15; CHECK: ret <4 x i32>
16
17  %v0 = load <4 x i32>, <4 x i32>* %h, align 8
18  %a = add <4 x i32> %v0, %vl
19  ret <4 x i32> %a
20}
21
22define <4 x i32> @test1a(<4 x i32>* align 16 %h) #0 {
23entry:
24  %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
25  %hv = bitcast <4 x i32>* %h1 to i8*
26  %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
27
28; CHECK-LABEL: @test1a
29; CHECK-NOT: @llvm.ppc.altivec.lvx
30; CHECK: ret <4 x i32>
31
32  %v0 = load <4 x i32>, <4 x i32>* %h, align 8
33  %a = add <4 x i32> %v0, %vl
34  ret <4 x i32> %a
35}
36
37declare void @llvm.ppc.altivec.stvx(<4 x i32>, i8*) #0
38
39define <4 x i32> @test2(<4 x i32>* %h, <4 x i32> %d) #0 {
40entry:
41  %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
42  %hv = bitcast <4 x i32>* %h1 to i8*
43  call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
44
45  %v0 = load <4 x i32>, <4 x i32>* %h, align 8
46  ret <4 x i32> %v0
47
48; CHECK-LABEL: @test2
49; CHECK: @llvm.ppc.altivec.stvx
50; CHECK: ret <4 x i32>
51}
52
53define <4 x i32> @test2a(<4 x i32>* align 16 %h, <4 x i32> %d) #0 {
54entry:
55  %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
56  %hv = bitcast <4 x i32>* %h1 to i8*
57  call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
58
59  %v0 = load <4 x i32>, <4 x i32>* %h, align 8
60  ret <4 x i32> %v0
61
62; CHECK-LABEL: @test2
63; CHECK-NOT: @llvm.ppc.altivec.stvx
64; CHECK: ret <4 x i32>
65}
66
67declare <4 x i32> @llvm.ppc.altivec.lvxl(i8*) #1
68
69define <4 x i32> @test1l(<4 x i32>* %h) #0 {
70entry:
71  %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
72  %hv = bitcast <4 x i32>* %h1 to i8*
73  %vl = call <4 x i32> @llvm.ppc.altivec.lvxl(i8* %hv)
74
75; CHECK-LABEL: @test1l
76; CHECK: @llvm.ppc.altivec.lvxl
77; CHECK: ret <4 x i32>
78
79  %v0 = load <4 x i32>, <4 x i32>* %h, align 8
80  %a = add <4 x i32> %v0, %vl
81  ret <4 x i32> %a
82}
83
84define <4 x i32> @test1la(<4 x i32>* align 16 %h) #0 {
85entry:
86  %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
87  %hv = bitcast <4 x i32>* %h1 to i8*
88  %vl = call <4 x i32> @llvm.ppc.altivec.lvxl(i8* %hv)
89
90; CHECK-LABEL: @test1la
91; CHECK-NOT: @llvm.ppc.altivec.lvxl
92; CHECK: ret <4 x i32>
93
94  %v0 = load <4 x i32>, <4 x i32>* %h, align 8
95  %a = add <4 x i32> %v0, %vl
96  ret <4 x i32> %a
97}
98
99declare void @llvm.ppc.altivec.stvxl(<4 x i32>, i8*) #0
100
101define <4 x i32> @test2l(<4 x i32>* %h, <4 x i32> %d) #0 {
102entry:
103  %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
104  %hv = bitcast <4 x i32>* %h1 to i8*
105  call void @llvm.ppc.altivec.stvxl(<4 x i32> %d, i8* %hv)
106
107  %v0 = load <4 x i32>, <4 x i32>* %h, align 8
108  ret <4 x i32> %v0
109
110; CHECK-LABEL: @test2l
111; CHECK: @llvm.ppc.altivec.stvxl
112; CHECK: ret <4 x i32>
113}
114
115define <4 x i32> @test2la(<4 x i32>* align 16 %h, <4 x i32> %d) #0 {
116entry:
117  %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
118  %hv = bitcast <4 x i32>* %h1 to i8*
119  call void @llvm.ppc.altivec.stvxl(<4 x i32> %d, i8* %hv)
120
121  %v0 = load <4 x i32>, <4 x i32>* %h, align 8
122  ret <4 x i32> %v0
123
124; CHECK-LABEL: @test2l
125; CHECK-NOT: @llvm.ppc.altivec.stvxl
126; CHECK: ret <4 x i32>
127}
128
129attributes #0 = { nounwind }
130attributes #1 = { nounwind readonly }
131
132