1; RUN: opt < %s -instcombine -S | FileCheck %s 2 3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" 4 5declare i32 @llvm.ctpop.i32(i32) 6declare i32 @llvm.ctlz.i32(i32, i1) 7declare i32 @llvm.cttz.i32(i32, i1) 8 9define i64 @test1(i32 %x) { 10 %t = call i32 @llvm.ctpop.i32(i32 %x) 11 %s = sext i32 %t to i64 12 ret i64 %s 13 14; CHECK-LABEL: @test1( 15; CHECK: zext i32 %t 16} 17 18define i64 @test2(i32 %x) { 19 %t = call i32 @llvm.ctlz.i32(i32 %x, i1 true) 20 %s = sext i32 %t to i64 21 ret i64 %s 22 23; CHECK-LABEL: @test2( 24; CHECK: zext i32 %t 25} 26 27define i64 @test3(i32 %x) { 28 %t = call i32 @llvm.cttz.i32(i32 %x, i1 true) 29 %s = sext i32 %t to i64 30 ret i64 %s 31 32; CHECK-LABEL: @test3( 33; CHECK: zext i32 %t 34} 35 36define i64 @test4(i32 %x) { 37 %t = udiv i32 %x, 3 38 %s = sext i32 %t to i64 39 ret i64 %s 40 41; CHECK-LABEL: @test4( 42; CHECK: zext i32 %t 43} 44 45define i64 @test5(i32 %x) { 46 %t = urem i32 %x, 30000 47 %s = sext i32 %t to i64 48 ret i64 %s 49; CHECK-LABEL: @test5( 50; CHECK: zext i32 %t 51} 52 53define i64 @test6(i32 %x) { 54 %u = lshr i32 %x, 3 55 %t = mul i32 %u, 3 56 %s = sext i32 %t to i64 57 ret i64 %s 58; CHECK-LABEL: @test6( 59; CHECK: zext i32 %t 60} 61 62define i64 @test7(i32 %x) { 63 %t = and i32 %x, 511 64 %u = sub i32 20000, %t 65 %s = sext i32 %u to i64 66 ret i64 %s 67; CHECK-LABEL: @test7( 68; CHECK: zext i32 %u to i64 69} 70 71define i32 @test8(i8 %a, i32 %f, i1 %p, i32* %z) { 72 %d = lshr i32 %f, 24 73 %e = select i1 %p, i32 %d, i32 0 74 %s = trunc i32 %e to i16 75 %n = sext i16 %s to i32 76 ret i32 %n 77; CHECK-LABEL: @test8( 78; CHECK: %d = lshr i32 %f, 24 79; CHECK: %n = select i1 %p, i32 %d, i32 0 80; CHECK: ret i32 %n 81} 82 83; rdar://6013816 84define i16 @test9(i16 %t, i1 %cond) nounwind { 85entry: 86 br i1 %cond, label %T, label %F 87T: 88 %t2 = sext i16 %t to i32 89 br label %F 90 91F: 92 %V = phi i32 [%t2, %T], [42, %entry] 93 %W = trunc i32 %V to i16 94 ret i16 %W 95; CHECK-LABEL: @test9( 96; CHECK: T: 97; CHECK-NEXT: br label %F 98; CHECK: F: 99; CHECK-NEXT: phi i16 100; CHECK-NEXT: ret i16 101} 102 103; PR2638 104define i32 @test10(i32 %i) nounwind { 105entry: 106 %tmp12 = trunc i32 %i to i8 107 %tmp16 = shl i8 %tmp12, 6 108 %a = ashr i8 %tmp16, 6 109 %b = sext i8 %a to i32 110 ret i32 %b 111; CHECK-LABEL: @test10( 112; CHECK: shl i32 %i, 30 113; CHECK-NEXT: ashr exact i32 114; CHECK-NEXT: ret i32 115} 116 117define void @test11(<2 x i16> %srcA, <2 x i16> %srcB, <2 x i16>* %dst) { 118 %cmp = icmp eq <2 x i16> %srcB, %srcA 119 %sext = sext <2 x i1> %cmp to <2 x i16> 120 %tmask = ashr <2 x i16> %sext, <i16 15, i16 15> 121 store <2 x i16> %tmask, <2 x i16>* %dst 122 ret void 123; CHECK-LABEL: @test11( 124; CHECK-NEXT: icmp eq 125; CHECK-NEXT: sext <2 x i1> 126; CHECK-NEXT: store <2 x i16> 127; CHECK-NEXT: ret 128} 129 130define i64 @test12(i32 %x) nounwind { 131 %shr = lshr i32 %x, 1 132 %sub = sub nsw i32 0, %shr 133 %conv = sext i32 %sub to i64 134 ret i64 %conv 135; CHECK-LABEL: @test12( 136; CHECK: sext 137; CHECK: ret 138} 139 140define i32 @test13(i32 %x) nounwind { 141 %and = and i32 %x, 8 142 %cmp = icmp eq i32 %and, 0 143 %ext = sext i1 %cmp to i32 144 ret i32 %ext 145; CHECK-LABEL: @test13( 146; CHECK-NEXT: %and = lshr i32 %x, 3 147; CHECK-NEXT: %1 = and i32 %and, 1 148; CHECK-NEXT: %sext = add nsw i32 %1, -1 149; CHECK-NEXT: ret i32 %sext 150} 151 152define i32 @test14(i16 %x) nounwind { 153 %and = and i16 %x, 16 154 %cmp = icmp ne i16 %and, 16 155 %ext = sext i1 %cmp to i32 156 ret i32 %ext 157; CHECK-LABEL: @test14( 158; CHECK-NEXT: %and = lshr i16 %x, 4 159; CHECK-NEXT: %1 = and i16 %and, 1 160; CHECK-NEXT: %sext = add nsw i16 %1, -1 161; CHECK-NEXT: %ext = sext i16 %sext to i32 162; CHECK-NEXT: ret i32 %ext 163} 164 165define i32 @test15(i32 %x) nounwind { 166 %and = and i32 %x, 16 167 %cmp = icmp ne i32 %and, 0 168 %ext = sext i1 %cmp to i32 169 ret i32 %ext 170; CHECK-LABEL: @test15( 171; CHECK-NEXT: %1 = shl i32 %x, 27 172; CHECK-NEXT: %sext = ashr i32 %1, 31 173; CHECK-NEXT: ret i32 %sext 174} 175 176define i32 @test16(i16 %x) nounwind { 177 %and = and i16 %x, 8 178 %cmp = icmp eq i16 %and, 8 179 %ext = sext i1 %cmp to i32 180 ret i32 %ext 181; CHECK-LABEL: @test16( 182; CHECK-NEXT: %1 = shl i16 %x, 12 183; CHECK-NEXT: %sext = ashr i16 %1, 15 184; CHECK-NEXT: %ext = sext i16 %sext to i32 185; CHECK-NEXT: ret i32 %ext 186} 187 188define i32 @test17(i1 %x) nounwind { 189 %c1 = sext i1 %x to i32 190 %c2 = sub i32 0, %c1 191 ret i32 %c2 192; CHECK-LABEL: @test17( 193; CHECK-NEXT: [[TEST17:%.*]] = zext i1 %x to i32 194; CHECK-NEXT: ret i32 [[TEST17]] 195} 196