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1; RUN: opt -mtriple=amdgcn-amd-amdhsa -basicaa -load-store-vectorizer -S -o - %s | FileCheck %s
2
3target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
4
5; CHECK-LABEL: @merge_v2i32_v2i32(
6; CHECK: load <4 x i32>
7; CHECK: store <4 x i32> zeroinitializer
8define void @merge_v2i32_v2i32(<2 x i32> addrspace(1)* nocapture %a, <2 x i32> addrspace(1)* nocapture readonly %b) #0 {
9entry:
10  %a.1 = getelementptr inbounds <2 x i32>, <2 x i32> addrspace(1)* %a, i64 1
11  %b.1 = getelementptr inbounds <2 x i32>, <2 x i32> addrspace(1)* %b, i64 1
12
13  %ld.c = load <2 x i32>, <2 x i32> addrspace(1)* %b, align 4
14  %ld.c.idx.1 = load <2 x i32>, <2 x i32> addrspace(1)* %b.1, align 4
15
16  store <2 x i32> zeroinitializer, <2 x i32> addrspace(1)* %a, align 4
17  store <2 x i32> zeroinitializer, <2 x i32> addrspace(1)* %a.1, align 4
18
19  ret void
20}
21
22; CHECK-LABEL: @merge_v1i32_v1i32(
23; CHECK: load <2 x i32>
24; CHECK: store <2 x i32> zeroinitializer
25define void @merge_v1i32_v1i32(<1 x i32> addrspace(1)* nocapture %a, <1 x i32> addrspace(1)* nocapture readonly %b) #0 {
26entry:
27  %a.1 = getelementptr inbounds <1 x i32>, <1 x i32> addrspace(1)* %a, i64 1
28  %b.1 = getelementptr inbounds <1 x i32>, <1 x i32> addrspace(1)* %b, i64 1
29
30  %ld.c = load <1 x i32>, <1 x i32> addrspace(1)* %b, align 4
31  %ld.c.idx.1 = load <1 x i32>, <1 x i32> addrspace(1)* %b.1, align 4
32
33  store <1 x i32> zeroinitializer, <1 x i32> addrspace(1)* %a, align 4
34  store <1 x i32> zeroinitializer, <1 x i32> addrspace(1)* %a.1, align 4
35
36  ret void
37}
38
39; CHECK-LABEL: @no_merge_v3i32_v3i32(
40; CHECK: load <3 x i32>
41; CHECK: load <3 x i32>
42; CHECK: store <3 x i32> zeroinitializer
43; CHECK: store <3 x i32> zeroinitializer
44define void @no_merge_v3i32_v3i32(<3 x i32> addrspace(1)* nocapture %a, <3 x i32> addrspace(1)* nocapture readonly %b) #0 {
45entry:
46  %a.1 = getelementptr inbounds <3 x i32>, <3 x i32> addrspace(1)* %a, i64 1
47  %b.1 = getelementptr inbounds <3 x i32>, <3 x i32> addrspace(1)* %b, i64 1
48
49  %ld.c = load <3 x i32>, <3 x i32> addrspace(1)* %b, align 4
50  %ld.c.idx.1 = load <3 x i32>, <3 x i32> addrspace(1)* %b.1, align 4
51
52  store <3 x i32> zeroinitializer, <3 x i32> addrspace(1)* %a, align 4
53  store <3 x i32> zeroinitializer, <3 x i32> addrspace(1)* %a.1, align 4
54
55  ret void
56}
57
58; CHECK-LABEL: @merge_v2i16_v2i16(
59; CHECK: load <4 x i16>
60; CHECK: store <4 x i16> zeroinitializer
61define void @merge_v2i16_v2i16(<2 x i16> addrspace(1)* nocapture %a, <2 x i16> addrspace(1)* nocapture readonly %b) #0 {
62entry:
63  %a.1 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %a, i64 1
64  %b.1 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %b, i64 1
65
66  %ld.c = load <2 x i16>, <2 x i16> addrspace(1)* %b, align 4
67  %ld.c.idx.1 = load <2 x i16>, <2 x i16> addrspace(1)* %b.1, align 4
68
69  store <2 x i16> zeroinitializer, <2 x i16> addrspace(1)* %a, align 4
70  store <2 x i16> zeroinitializer, <2 x i16> addrspace(1)* %a.1, align 4
71
72  ret void
73}
74
75; Ideally this would be merged
76; CHECK-LABEL: @merge_load_i32_v2i16(
77; CHECK: load i32,
78; CHECK: load <2 x i16>
79define void @merge_load_i32_v2i16(i32 addrspace(1)* nocapture %a) #0 {
80entry:
81  %a.1 = getelementptr inbounds i32, i32 addrspace(1)* %a, i32 1
82  %a.1.cast = bitcast i32 addrspace(1)* %a.1 to <2 x i16> addrspace(1)*
83
84  %ld.0 = load i32, i32 addrspace(1)* %a
85  %ld.1 = load <2 x i16>, <2 x i16> addrspace(1)* %a.1.cast
86
87  ret void
88}
89
90attributes #0 = { nounwind }
91attributes #1 = { nounwind readnone }
92