1Mesa 20.2.1 Release Notes / 2020-10-14 2====================================== 3 4Mesa 20.2.1 is a bug fix release which fixes bugs found since the 20.2.0 release. 5 6Mesa 20.2.1 implements the OpenGL 4.6 API, but the version reported by 7glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / 8glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. 9Some drivers don't support all the features required in OpenGL 4.6. OpenGL 104.6 is **only** available if requested at context creation. 11Compatibility contexts may report a lower version depending on each driver. 12 13Mesa 20.2.1 implements the Vulkan 1.2 API, but the version reported by 14the apiVersion property of the VkPhysicalDeviceProperties struct 15depends on the particular driver being used. 16 17SHA256 checksum 18--------------- 19 20:: 21 22 d1a46d9a3f291bc0e0374600bdcb59844fa3eafaa50398e472a36fc65fd0244a mesa-20.2.1.tar.xz 23 24 25New features 26------------ 27 28- None 29 30 31Bug fixes 32--------- 33 34- RADV ACO - ground line corruption in Path of Exile with Vulkan renderer 35- Graphics corruption in Super Mega Baseball 2 with RADV on Navi 36- Running Amber test leads to VK_DEVICE_LOST 37- omx/tizonia build broken with latest mesa git 38- [hsw][bisected][regression] gpu hangs on dEQP-VK.subgroups.(shuffle|quad) tests 39- TGL B0 Stepping gpu hangs on many dEQP-VK.subgroups.quad nonconst tests 40- [spirv-fuzz] Shader generates a wrong image 41 42 43Changes 44------- 45 46Alyssa Rosenzweig (2): 47 48- pan/bi: Handle vector moves 49- pan/bi: Fix simple txl test 50 51Anuj Phogat (1): 52 53- intel/gen9: Enable MSC RAW Hazard Avoidance 54 55Bas Nieuwenhuizen (3): 56 57- radv,radeonsi: Disable compression on interop depth images 58- radv: Use atomics to read query results. 59- radv: Fix mipmap extent adjustment on GFX9+. 60 61Christian Gmeiner (1): 62 63- etnaviv: simplify linear stride implementation 64 65Connor Abbott (1): 66 67- nir/lower_io_arrays: Fix xfb_offset bug 68 69Danylo Piliaiev (1): 70 71- intel/fs: Disable sample mask predication for scratch stores 72 73Dylan Baker (12): 74 75- docs: add release notes for 20.2.0 76- docs: Add sh256 sums for 20.2.0 77- .pick_status.json: Update to 291cfb1e41513008a5be08be95399373a7de206d 78- meson/anv: Use variable that checks for --build-id 79- .pick_status.json: Update to 7dbb1f7462433940951ce6c3fa22f6368aeafd50 80- .pick_status.json: Update to e3b814d5e9e414839d5e4de3a76bb2899cbb7249 81- .pick_status.json: Update to b32a8f83dce3b8789f2e8790ab41b8a63c9bedc6 82- .pick_status.json: Mark b23013db0aa6845d661c2da5d4003615b064e01f as denominated 83- .pick_status.json: Mark 4790811d78011d45830d9543ad6e7401391cfb15 as denominated 84- glsl/xxd.py: fix imports 85- .pick_status.json: Update to e1efc534e6c452e3e606d663864896a654acc185 86- retab ac_surface.h so that backports apply 87 88Eric Engestrom (1): 89 90- radv: add missing u_atomic.h include 91 92Erik Faye-Lund (1): 93 94- st/mesa: use roundf instead of floorf for lod-bias rounding 95 96Jason Ekstrand (6): 97 98- nir/liveness: Consider if uses in nir_ssa_defs_interfere 99- nir/cf: Better handle intra-block splits 100- intel/fs: NoMask initialize the address register for shuffles 101- nir/opt_load_store_vectorize: Use bit sizes when checking mask compatibility 102- intel/fs: Don't use NoDDClk/NoDDClr for split SHUFFLEs 103- intel/nir: Don't try to emit vector load_scratch instructions 104 105Jose Maria Casanova Crespo (3): 106 107- vc4: Avoid negative scissor caused by no intersection 108- nir/algebraic: optimize iand/ior of (n)eq zero when umax/umin not available 109- vc4: Enable lower_umax and lower_umin 110 111Lionel Landwerlin (1): 112 113- intel/perf: fix crash when no perf queries are supported 114 115Lucas Stach (1): 116 117- etnaviv: stop leaking the dummy texure descriptor BO 118 119Marek Olšák (4): 120 121- radeonsi: fix indirect dispatches with variable block sizes 122- radeonsi: Fix dead lock with aux_context_lock in si_screen_clear_buffer. 123- gallium/u_threaded_context: fix use-after-free in transfer_unmap 124- ac/surface: fix valgrind warnings in DCC retile tile lookups 125 126Nanley Chery (3): 127 128- blorp: Ensure aligned HIZ_CCS_WT partial clears 129- iris: Fix a fast-clear skipping optimization 130- anv: Enable multi-layer aux-map init for HIZ+CCS 131 132Philipp Zabel (1): 133 134- meson: fix power8 option 135 136Pierre-Eric Pelloux-Prayer (3): 137 138- gallium/vl: do not call transfer_unmap if transfer is NULL 139- gallium/vl: add chroma_format arg to vl_video_buffer functions 140- omx/tizonia: fix build 141 142Rhys Perry (4): 143 144- spirv: add and use a generator id enum 145- android: fix SPIR-V -> NIR build 146- scons: fix SPIR-V -> NIR build 147- spirv: replace discard with demote for incorrect HLSL->SPIR-V translations 148 149Samuel Pitoiset (1): 150 151- aco: implement missing nir_op_unpack_half_2x16_split_{x,y}_flush_to_zero 152 153Timothy Arceri (1): 154 155- glsl: don't duplicate state vars as uniforms in the NIR linker 156 157Vinson Lee (2): 158 159- gallium/dri2: Move image->texture assignment after image NULL check. 160- freedreno: Move rsc NULL check to before rsc dereferences. 161