1{ 2 "enums": { 3 "ArrayMode": { 4 "entries": [ 5 {"name": "ARRAY_LINEAR_GENERAL", "value": 0}, 6 {"name": "ARRAY_LINEAR_ALIGNED", "value": 1}, 7 {"name": "ARRAY_1D_TILED_THIN1", "value": 2}, 8 {"name": "ARRAY_1D_TILED_THICK", "value": 3}, 9 {"name": "ARRAY_2D_TILED_THIN1", "value": 4}, 10 {"name": "ARRAY_PRT_TILED_THIN1", "value": 5}, 11 {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6}, 12 {"name": "ARRAY_2D_TILED_THICK", "value": 7}, 13 {"name": "ARRAY_2D_TILED_XTHICK", "value": 8}, 14 {"name": "ARRAY_PRT_TILED_THICK", "value": 9}, 15 {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10}, 16 {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11}, 17 {"name": "ARRAY_3D_TILED_THIN1", "value": 12}, 18 {"name": "ARRAY_3D_TILED_THICK", "value": 13}, 19 {"name": "ARRAY_3D_TILED_XTHICK", "value": 14}, 20 {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15} 21 ] 22 }, 23 "BUF_DATA_FORMAT": { 24 "entries": [ 25 {"name": "BUF_DATA_FORMAT_INVALID", "value": 0}, 26 {"name": "BUF_DATA_FORMAT_8", "value": 1}, 27 {"name": "BUF_DATA_FORMAT_16", "value": 2}, 28 {"name": "BUF_DATA_FORMAT_8_8", "value": 3}, 29 {"name": "BUF_DATA_FORMAT_32", "value": 4}, 30 {"name": "BUF_DATA_FORMAT_16_16", "value": 5}, 31 {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6}, 32 {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7}, 33 {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8}, 34 {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9}, 35 {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10}, 36 {"name": "BUF_DATA_FORMAT_32_32", "value": 11}, 37 {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12}, 38 {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13}, 39 {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14}, 40 {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15} 41 ] 42 }, 43 "BUF_NUM_FORMAT": { 44 "entries": [ 45 {"name": "BUF_NUM_FORMAT_UNORM", "value": 0}, 46 {"name": "BUF_NUM_FORMAT_SNORM", "value": 1}, 47 {"name": "BUF_NUM_FORMAT_USCALED", "value": 2}, 48 {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3}, 49 {"name": "BUF_NUM_FORMAT_UINT", "value": 4}, 50 {"name": "BUF_NUM_FORMAT_SINT", "value": 5}, 51 {"name": "BUF_NUM_FORMAT_SNORM_OGL", "value": 6}, 52 {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7} 53 ] 54 }, 55 "BankHeight": { 56 "entries": [ 57 {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0}, 58 {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1}, 59 {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2}, 60 {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3} 61 ] 62 }, 63 "BankWidth": { 64 "entries": [ 65 {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0}, 66 {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1}, 67 {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2}, 68 {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3} 69 ] 70 }, 71 "BlendOp": { 72 "entries": [ 73 {"name": "BLEND_ZERO", "value": 0}, 74 {"name": "BLEND_ONE", "value": 1}, 75 {"name": "BLEND_SRC_COLOR", "value": 2}, 76 {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3}, 77 {"name": "BLEND_SRC_ALPHA", "value": 4}, 78 {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5}, 79 {"name": "BLEND_DST_ALPHA", "value": 6}, 80 {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7}, 81 {"name": "BLEND_DST_COLOR", "value": 8}, 82 {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9}, 83 {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10}, 84 {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11}, 85 {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12}, 86 {"name": "BLEND_CONSTANT_COLOR", "value": 13}, 87 {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14}, 88 {"name": "BLEND_SRC1_COLOR", "value": 15}, 89 {"name": "BLEND_INV_SRC1_COLOR", "value": 16}, 90 {"name": "BLEND_SRC1_ALPHA", "value": 17}, 91 {"name": "BLEND_INV_SRC1_ALPHA", "value": 18}, 92 {"name": "BLEND_CONSTANT_ALPHA", "value": 19}, 93 {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20} 94 ] 95 }, 96 "BlendOpt": { 97 "entries": [ 98 {"name": "FORCE_OPT_AUTO", "value": 0}, 99 {"name": "FORCE_OPT_DISABLE", "value": 1}, 100 {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2}, 101 {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3}, 102 {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4}, 103 {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5}, 104 {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6}, 105 {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7} 106 ] 107 }, 108 "CBMode": { 109 "entries": [ 110 {"name": "CB_DISABLE", "value": 0}, 111 {"name": "CB_NORMAL", "value": 1}, 112 {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2}, 113 {"name": "CB_RESOLVE", "value": 3}, 114 {"name": "CB_DECOMPRESS", "value": 4}, 115 {"name": "CB_FMASK_DECOMPRESS", "value": 5} 116 ] 117 }, 118 "CBPerfClearFilterSel": { 119 "entries": [ 120 {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0}, 121 {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1} 122 ] 123 }, 124 "CBPerfOpFilterSel": { 125 "entries": [ 126 {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0}, 127 {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1}, 128 {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2}, 129 {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3}, 130 {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4}, 131 {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5} 132 ] 133 }, 134 "CLIP_RULE": { 135 "entries": [ 136 {"name": "OUT", "value": 1}, 137 {"name": "IN_0", "value": 2}, 138 {"name": "IN_1", "value": 4}, 139 {"name": "IN_10", "value": 8}, 140 {"name": "IN_2", "value": 16}, 141 {"name": "IN_20", "value": 32}, 142 {"name": "IN_21", "value": 64}, 143 {"name": "IN_210", "value": 128}, 144 {"name": "IN_3", "value": 256}, 145 {"name": "IN_30", "value": 512}, 146 {"name": "IN_31", "value": 1024}, 147 {"name": "IN_310", "value": 2048}, 148 {"name": "IN_32", "value": 4096}, 149 {"name": "IN_320", "value": 8192}, 150 {"name": "IN_321", "value": 16384}, 151 {"name": "IN_3210", "value": 32768} 152 ] 153 }, 154 "CP_PERFMON_ENABLE_MODE": { 155 "entries": [ 156 {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0}, 157 {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1}, 158 {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2}, 159 {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3} 160 ] 161 }, 162 "CP_PERFMON_STATE": { 163 "entries": [ 164 {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0}, 165 {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1}, 166 {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2}, 167 {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3}, 168 {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4}, 169 {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5} 170 ] 171 }, 172 "ColorFormat": { 173 "entries": [ 174 {"name": "COLOR_INVALID", "value": 0}, 175 {"name": "COLOR_8", "value": 1}, 176 {"name": "COLOR_16", "value": 2}, 177 {"name": "COLOR_8_8", "value": 3}, 178 {"name": "COLOR_32", "value": 4}, 179 {"name": "COLOR_16_16", "value": 5}, 180 {"name": "COLOR_10_11_11", "value": 6}, 181 {"name": "COLOR_11_11_10", "value": 7}, 182 {"name": "COLOR_10_10_10_2", "value": 8}, 183 {"name": "COLOR_2_10_10_10", "value": 9}, 184 {"name": "COLOR_8_8_8_8", "value": 10}, 185 {"name": "COLOR_32_32", "value": 11}, 186 {"name": "COLOR_16_16_16_16", "value": 12}, 187 {"name": "COLOR_RESERVED_13", "value": 13}, 188 {"name": "COLOR_32_32_32_32", "value": 14}, 189 {"name": "COLOR_RESERVED_15", "value": 15}, 190 {"name": "COLOR_5_6_5", "value": 16}, 191 {"name": "COLOR_1_5_5_5", "value": 17}, 192 {"name": "COLOR_5_5_5_1", "value": 18}, 193 {"name": "COLOR_4_4_4_4", "value": 19}, 194 {"name": "COLOR_8_24", "value": 20}, 195 {"name": "COLOR_24_8", "value": 21}, 196 {"name": "COLOR_X24_8_32_FLOAT", "value": 22}, 197 {"name": "COLOR_RESERVED_23", "value": 23} 198 ] 199 }, 200 "CombFunc": { 201 "entries": [ 202 {"name": "COMB_DST_PLUS_SRC", "value": 0}, 203 {"name": "COMB_SRC_MINUS_DST", "value": 1}, 204 {"name": "COMB_MIN_DST_SRC", "value": 2}, 205 {"name": "COMB_MAX_DST_SRC", "value": 3}, 206 {"name": "COMB_DST_MINUS_SRC", "value": 4} 207 ] 208 }, 209 "CompareFrag": { 210 "entries": [ 211 {"name": "FRAG_NEVER", "value": 0}, 212 {"name": "FRAG_LESS", "value": 1}, 213 {"name": "FRAG_EQUAL", "value": 2}, 214 {"name": "FRAG_LEQUAL", "value": 3}, 215 {"name": "FRAG_GREATER", "value": 4}, 216 {"name": "FRAG_NOTEQUAL", "value": 5}, 217 {"name": "FRAG_GEQUAL", "value": 6}, 218 {"name": "FRAG_ALWAYS", "value": 7} 219 ] 220 }, 221 "ConservativeZExport": { 222 "entries": [ 223 {"name": "EXPORT_ANY_Z", "value": 0}, 224 {"name": "EXPORT_LESS_THAN_Z", "value": 1}, 225 {"name": "EXPORT_GREATER_THAN_Z", "value": 2}, 226 {"name": "EXPORT_RESERVED", "value": 3} 227 ] 228 }, 229 "DbPSLControl": { 230 "entries": [ 231 {"name": "PSLC_AUTO", "value": 0}, 232 {"name": "PSLC_ON_HANG_ONLY", "value": 1}, 233 {"name": "PSLC_ASAP", "value": 2}, 234 {"name": "PSLC_COUNTDOWN", "value": 3} 235 ] 236 }, 237 "EXCP_EN": { 238 "entries": [ 239 {"name": "INVALID", "value": 1}, 240 {"name": "INPUT_DENORMAL", "value": 2}, 241 {"name": "DIVIDE_BY_ZERO", "value": 4}, 242 {"name": "OVERFLOW", "value": 8}, 243 {"name": "UNDERFLOW", "value": 16}, 244 {"name": "INEXACT", "value": 32}, 245 {"name": "INT_DIVIDE_BY_ZERO", "value": 64}, 246 {"name": "ADDRESS_WATCH", "value": 128}, 247 {"name": "MEMORY_VIOLATION", "value": 256} 248 ] 249 }, 250 "FLOAT_MODE": { 251 "entries": [ 252 {"name": "FP_32_DENORMS", "value": 48}, 253 {"name": "FP_64_DENORMS", "value": 192}, 254 {"name": "FP_ALL_DENORMS", "value": 240} 255 ] 256 }, 257 "ForceControl": { 258 "entries": [ 259 {"name": "FORCE_OFF", "value": 0}, 260 {"name": "FORCE_ENABLE", "value": 1}, 261 {"name": "FORCE_DISABLE", "value": 2}, 262 {"name": "FORCE_RESERVED", "value": 3} 263 ] 264 }, 265 "IMG_DATA_FORMAT": { 266 "entries": [ 267 {"name": "IMG_DATA_FORMAT_INVALID", "value": 0}, 268 {"name": "IMG_DATA_FORMAT_8", "value": 1}, 269 {"name": "IMG_DATA_FORMAT_16", "value": 2}, 270 {"name": "IMG_DATA_FORMAT_8_8", "value": 3}, 271 {"name": "IMG_DATA_FORMAT_32", "value": 4}, 272 {"name": "IMG_DATA_FORMAT_16_16", "value": 5}, 273 {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6}, 274 {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7}, 275 {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8}, 276 {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9}, 277 {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10}, 278 {"name": "IMG_DATA_FORMAT_32_32", "value": 11}, 279 {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12}, 280 {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13}, 281 {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14}, 282 {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15}, 283 {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16}, 284 {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17}, 285 {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18}, 286 {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19}, 287 {"name": "IMG_DATA_FORMAT_8_24", "value": 20}, 288 {"name": "IMG_DATA_FORMAT_24_8", "value": 21}, 289 {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22}, 290 {"name": "IMG_DATA_FORMAT_RESERVED_23", "value": 23}, 291 {"name": "IMG_DATA_FORMAT_RESERVED_24", "value": 24}, 292 {"name": "IMG_DATA_FORMAT_RESERVED_25", "value": 25}, 293 {"name": "IMG_DATA_FORMAT_RESERVED_26", "value": 26}, 294 {"name": "IMG_DATA_FORMAT_RESERVED_27", "value": 27}, 295 {"name": "IMG_DATA_FORMAT_RESERVED_28", "value": 28}, 296 {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29}, 297 {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30}, 298 {"name": "IMG_DATA_FORMAT_RESERVED_31", "value": 31}, 299 {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32}, 300 {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33}, 301 {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34}, 302 {"name": "IMG_DATA_FORMAT_BC1", "value": 35}, 303 {"name": "IMG_DATA_FORMAT_BC2", "value": 36}, 304 {"name": "IMG_DATA_FORMAT_BC3", "value": 37}, 305 {"name": "IMG_DATA_FORMAT_BC4", "value": 38}, 306 {"name": "IMG_DATA_FORMAT_BC5", "value": 39}, 307 {"name": "IMG_DATA_FORMAT_BC6", "value": 40}, 308 {"name": "IMG_DATA_FORMAT_BC7", "value": 41}, 309 {"name": "IMG_DATA_FORMAT_RESERVED_42", "value": 42}, 310 {"name": "IMG_DATA_FORMAT_RESERVED_43", "value": 43}, 311 {"name": "IMG_DATA_FORMAT_FMASK8_S2_F1", "value": 44}, 312 {"name": "IMG_DATA_FORMAT_FMASK8_S4_F1", "value": 45}, 313 {"name": "IMG_DATA_FORMAT_FMASK8_S8_F1", "value": 46}, 314 {"name": "IMG_DATA_FORMAT_FMASK8_S2_F2", "value": 47}, 315 {"name": "IMG_DATA_FORMAT_FMASK8_S4_F2", "value": 48}, 316 {"name": "IMG_DATA_FORMAT_FMASK8_S4_F4", "value": 49}, 317 {"name": "IMG_DATA_FORMAT_FMASK16_S16_F1", "value": 50}, 318 {"name": "IMG_DATA_FORMAT_FMASK16_S8_F2", "value": 51}, 319 {"name": "IMG_DATA_FORMAT_FMASK32_S16_F2", "value": 52}, 320 {"name": "IMG_DATA_FORMAT_FMASK32_S8_F4", "value": 53}, 321 {"name": "IMG_DATA_FORMAT_FMASK32_S8_F8", "value": 54}, 322 {"name": "IMG_DATA_FORMAT_FMASK64_S16_F4", "value": 55}, 323 {"name": "IMG_DATA_FORMAT_FMASK64_S16_F8", "value": 56}, 324 {"name": "IMG_DATA_FORMAT_4_4", "value": 57}, 325 {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58}, 326 {"name": "IMG_DATA_FORMAT_1", "value": 59}, 327 {"name": "IMG_DATA_FORMAT_1_REVERSED", "value": 60}, 328 {"name": "IMG_DATA_FORMAT_32_AS_8", "value": 61}, 329 {"name": "IMG_DATA_FORMAT_32_AS_8_8", "value": 62}, 330 {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63} 331 ] 332 }, 333 "IMG_NUM_FORMAT": { 334 "entries": [ 335 {"name": "IMG_NUM_FORMAT_UNORM", "value": 0}, 336 {"name": "IMG_NUM_FORMAT_SNORM", "value": 1}, 337 {"name": "IMG_NUM_FORMAT_USCALED", "value": 2}, 338 {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3}, 339 {"name": "IMG_NUM_FORMAT_UINT", "value": 4}, 340 {"name": "IMG_NUM_FORMAT_SINT", "value": 5}, 341 {"name": "IMG_NUM_FORMAT_SNORM_OGL", "value": 6}, 342 {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7}, 343 {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8}, 344 {"name": "IMG_NUM_FORMAT_SRGB", "value": 9}, 345 {"name": "IMG_NUM_FORMAT_UBNORM", "value": 10}, 346 {"name": "IMG_NUM_FORMAT_UBNORM_OGL", "value": 11}, 347 {"name": "IMG_NUM_FORMAT_UBINT", "value": 12}, 348 {"name": "IMG_NUM_FORMAT_UBSCALED", "value": 13}, 349 {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14}, 350 {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15} 351 ] 352 }, 353 "MacroTileAspect": { 354 "entries": [ 355 {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0}, 356 {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1}, 357 {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2}, 358 {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3} 359 ] 360 }, 361 "MicroTileMode": { 362 "entries": [ 363 {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0}, 364 {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1}, 365 {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2}, 366 {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3}, 367 {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4} 368 ] 369 }, 370 "NumBanks": { 371 "entries": [ 372 {"name": "ADDR_SURF_2_BANK", "value": 0}, 373 {"name": "ADDR_SURF_4_BANK", "value": 1}, 374 {"name": "ADDR_SURF_8_BANK", "value": 2}, 375 {"name": "ADDR_SURF_16_BANK", "value": 3} 376 ] 377 }, 378 "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE": { 379 "entries": [ 380 {"name": "X_DRAW_POINTS", "value": 0}, 381 {"name": "X_DRAW_LINES", "value": 1}, 382 {"name": "X_DRAW_TRIANGLES", "value": 2} 383 ] 384 }, 385 "PA_SU_SC_MODE_CNTL__POLY_MODE": { 386 "entries": [ 387 {"name": "X_DISABLE_POLY_MODE", "value": 0}, 388 {"name": "X_DUAL_MODE", "value": 1} 389 ] 390 }, 391 "PA_SU_VTX_CNTL__ROUND_MODE": { 392 "entries": [ 393 {"name": "X_TRUNCATE", "value": 0}, 394 {"name": "X_ROUND", "value": 1}, 395 {"name": "X_ROUND_TO_EVEN", "value": 2}, 396 {"name": "X_ROUND_TO_ODD", "value": 3} 397 ] 398 }, 399 "PipeConfig": { 400 "entries": [ 401 {"name": "ADDR_SURF_P2", "value": 0}, 402 {"name": "ADDR_SURF_P2_RESERVED0", "value": 1}, 403 {"name": "ADDR_SURF_P2_RESERVED1", "value": 2}, 404 {"name": "ADDR_SURF_P2_RESERVED2", "value": 3}, 405 {"name": "ADDR_SURF_P4_8x16", "value": 4}, 406 {"name": "ADDR_SURF_P4_16x16", "value": 5}, 407 {"name": "ADDR_SURF_P4_16x32", "value": 6}, 408 {"name": "ADDR_SURF_P4_32x32", "value": 7}, 409 {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8}, 410 {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9}, 411 {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10}, 412 {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11}, 413 {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12}, 414 {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13}, 415 {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14}, 416 {"name": "ADDR_SURF_P8_RESERVED0", "value": 15}, 417 {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16}, 418 {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17} 419 ] 420 }, 421 "PkrMap": { 422 "entries": [ 423 {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0}, 424 {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1}, 425 {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2}, 426 {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3} 427 ] 428 }, 429 "PkrXsel": { 430 "entries": [ 431 {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0}, 432 {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1}, 433 {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2}, 434 {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3} 435 ] 436 }, 437 "PkrXsel2": { 438 "entries": [ 439 {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0}, 440 {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1}, 441 {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2}, 442 {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3} 443 ] 444 }, 445 "PkrYsel": { 446 "entries": [ 447 {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0}, 448 {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1}, 449 {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2}, 450 {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3} 451 ] 452 }, 453 "QUANT_MODE": { 454 "entries": [ 455 {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0}, 456 {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1}, 457 {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2}, 458 {"name": "X_16_8_FIXED_POINT_1_2", "value": 3}, 459 {"name": "X_16_8_FIXED_POINT_1", "value": 4}, 460 {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5}, 461 {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6}, 462 {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7} 463 ] 464 }, 465 "ROP3": { 466 "entries": [ 467 {"name": "ROP3_CLEAR", "value": 0}, 468 {"name": "X_0X05", "value": 5}, 469 {"name": "X_0X0A", "value": 10}, 470 {"name": "X_0X0F", "value": 15}, 471 {"name": "ROP3_NOR", "value": 17}, 472 {"name": "ROP3_AND_INVERTED", "value": 34}, 473 {"name": "ROP3_COPY_INVERTED", "value": 51}, 474 {"name": "ROP3_AND_REVERSE", "value": 68}, 475 {"name": "X_0X50", "value": 80}, 476 {"name": "ROP3_INVERT", "value": 85}, 477 {"name": "X_0X5A", "value": 90}, 478 {"name": "X_0X5F", "value": 95}, 479 {"name": "ROP3_XOR", "value": 102}, 480 {"name": "ROP3_NAND", "value": 119}, 481 {"name": "ROP3_AND", "value": 136}, 482 {"name": "ROP3_EQUIVALENT", "value": 153}, 483 {"name": "X_0XA0", "value": 160}, 484 {"name": "X_0XA5", "value": 165}, 485 {"name": "ROP3_NO_OP", "value": 170}, 486 {"name": "X_0XAF", "value": 175}, 487 {"name": "ROP3_OR_INVERTED", "value": 187}, 488 {"name": "ROP3_COPY", "value": 204}, 489 {"name": "ROP3_OR_REVERSE", "value": 221}, 490 {"name": "ROP3_OR", "value": 238}, 491 {"name": "X_0XF0", "value": 240}, 492 {"name": "X_0XF5", "value": 245}, 493 {"name": "X_0XFA", "value": 250}, 494 {"name": "ROP3_SET", "value": 255} 495 ] 496 }, 497 "RbMap": { 498 "entries": [ 499 {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0}, 500 {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1}, 501 {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2}, 502 {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3} 503 ] 504 }, 505 "RbXsel": { 506 "entries": [ 507 {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0}, 508 {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1} 509 ] 510 }, 511 "RbXsel2": { 512 "entries": [ 513 {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0}, 514 {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1}, 515 {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2}, 516 {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3} 517 ] 518 }, 519 "RbYsel": { 520 "entries": [ 521 {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0}, 522 {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1} 523 ] 524 }, 525 "SPI_PNT_SPRITE_OVERRIDE": { 526 "entries": [ 527 {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0}, 528 {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1}, 529 {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2}, 530 {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3}, 531 {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4} 532 ] 533 }, 534 "SPI_SHADER_EX_FORMAT": { 535 "entries": [ 536 {"name": "SPI_SHADER_ZERO", "value": 0}, 537 {"name": "SPI_SHADER_32_R", "value": 1}, 538 {"name": "SPI_SHADER_32_GR", "value": 2}, 539 {"name": "SPI_SHADER_32_AR", "value": 3}, 540 {"name": "SPI_SHADER_FP16_ABGR", "value": 4}, 541 {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5}, 542 {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6}, 543 {"name": "SPI_SHADER_UINT16_ABGR", "value": 7}, 544 {"name": "SPI_SHADER_SINT16_ABGR", "value": 8}, 545 {"name": "SPI_SHADER_32_ABGR", "value": 9} 546 ] 547 }, 548 "SPI_SHADER_FORMAT": { 549 "entries": [ 550 {"name": "SPI_SHADER_NONE", "value": 0}, 551 {"name": "SPI_SHADER_1COMP", "value": 1}, 552 {"name": "SPI_SHADER_2COMP", "value": 2}, 553 {"name": "SPI_SHADER_4COMPRESS", "value": 3}, 554 {"name": "SPI_SHADER_4COMP", "value": 4} 555 ] 556 }, 557 "SPM_PERFMON_STATE": { 558 "entries": [ 559 {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0}, 560 {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1}, 561 {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2}, 562 {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3}, 563 {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4}, 564 {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5} 565 ] 566 }, 567 "SQ_IMG_FILTER_TYPE": { 568 "entries": [ 569 {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0}, 570 {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1}, 571 {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2} 572 ] 573 }, 574 "SQ_RSRC_BUF_TYPE": { 575 "entries": [ 576 {"name": "SQ_RSRC_BUF", "value": 0}, 577 {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1}, 578 {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2}, 579 {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3} 580 ] 581 }, 582 "SQ_RSRC_IMG_TYPE": { 583 "entries": [ 584 {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0}, 585 {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1}, 586 {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2}, 587 {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3}, 588 {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4}, 589 {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5}, 590 {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6}, 591 {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7}, 592 {"name": "SQ_RSRC_IMG_1D", "value": 8}, 593 {"name": "SQ_RSRC_IMG_2D", "value": 9}, 594 {"name": "SQ_RSRC_IMG_3D", "value": 10}, 595 {"name": "SQ_RSRC_IMG_CUBE", "value": 11}, 596 {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12}, 597 {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13}, 598 {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14}, 599 {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15} 600 ] 601 }, 602 "SQ_SEL_XYZW01": { 603 "entries": [ 604 {"name": "SQ_SEL_0", "value": 0}, 605 {"name": "SQ_SEL_1", "value": 1}, 606 {"name": "SQ_SEL_RESERVED_0", "value": 2}, 607 {"name": "SQ_SEL_RESERVED_1", "value": 3}, 608 {"name": "SQ_SEL_X", "value": 4}, 609 {"name": "SQ_SEL_Y", "value": 5}, 610 {"name": "SQ_SEL_Z", "value": 6}, 611 {"name": "SQ_SEL_W", "value": 7} 612 ] 613 }, 614 "SQ_TEX_BORDER_COLOR": { 615 "entries": [ 616 {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0}, 617 {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1}, 618 {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2}, 619 {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3} 620 ] 621 }, 622 "SQ_TEX_CLAMP": { 623 "entries": [ 624 {"name": "SQ_TEX_WRAP", "value": 0}, 625 {"name": "SQ_TEX_MIRROR", "value": 1}, 626 {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2}, 627 {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3}, 628 {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4}, 629 {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5}, 630 {"name": "SQ_TEX_CLAMP_BORDER", "value": 6}, 631 {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7} 632 ] 633 }, 634 "SQ_TEX_DEPTH_COMPARE": { 635 "entries": [ 636 {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0}, 637 {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1}, 638 {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2}, 639 {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3}, 640 {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4}, 641 {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5}, 642 {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6}, 643 {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7} 644 ] 645 }, 646 "SQ_TEX_MIP_FILTER": { 647 "entries": [ 648 {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0}, 649 {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1}, 650 {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2} 651 ] 652 }, 653 "SQ_TEX_XY_FILTER": { 654 "entries": [ 655 {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0}, 656 {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1}, 657 {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2}, 658 {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3} 659 ] 660 }, 661 "SQ_TEX_Z_FILTER": { 662 "entries": [ 663 {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0}, 664 {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1}, 665 {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2} 666 ] 667 }, 668 "ScMap": { 669 "entries": [ 670 {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0}, 671 {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1}, 672 {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2}, 673 {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3} 674 ] 675 }, 676 "ScXsel": { 677 "entries": [ 678 {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0}, 679 {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1}, 680 {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2}, 681 {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3} 682 ] 683 }, 684 "ScYsel": { 685 "entries": [ 686 {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0}, 687 {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1}, 688 {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2}, 689 {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3} 690 ] 691 }, 692 "SeMap": { 693 "entries": [ 694 {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0}, 695 {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1}, 696 {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2}, 697 {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3} 698 ] 699 }, 700 "SePairMap": { 701 "entries": [ 702 {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0}, 703 {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1}, 704 {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2}, 705 {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3} 706 ] 707 }, 708 "SePairXsel": { 709 "entries": [ 710 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0}, 711 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1}, 712 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2}, 713 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3} 714 ] 715 }, 716 "SePairYsel": { 717 "entries": [ 718 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0}, 719 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1}, 720 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2}, 721 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3} 722 ] 723 }, 724 "SeXsel": { 725 "entries": [ 726 {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0}, 727 {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1}, 728 {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2}, 729 {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3} 730 ] 731 }, 732 "SeYsel": { 733 "entries": [ 734 {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0}, 735 {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1}, 736 {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2}, 737 {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3} 738 ] 739 }, 740 "StencilFormat": { 741 "entries": [ 742 {"name": "STENCIL_INVALID", "value": 0}, 743 {"name": "STENCIL_8", "value": 1} 744 ] 745 }, 746 "StencilOp": { 747 "entries": [ 748 {"name": "STENCIL_KEEP", "value": 0}, 749 {"name": "STENCIL_ZERO", "value": 1}, 750 {"name": "STENCIL_ONES", "value": 2}, 751 {"name": "STENCIL_REPLACE_TEST", "value": 3}, 752 {"name": "STENCIL_REPLACE_OP", "value": 4}, 753 {"name": "STENCIL_ADD_CLAMP", "value": 5}, 754 {"name": "STENCIL_SUB_CLAMP", "value": 6}, 755 {"name": "STENCIL_INVERT", "value": 7}, 756 {"name": "STENCIL_ADD_WRAP", "value": 8}, 757 {"name": "STENCIL_SUB_WRAP", "value": 9}, 758 {"name": "STENCIL_AND", "value": 10}, 759 {"name": "STENCIL_OR", "value": 11}, 760 {"name": "STENCIL_XOR", "value": 12}, 761 {"name": "STENCIL_NAND", "value": 13}, 762 {"name": "STENCIL_NOR", "value": 14}, 763 {"name": "STENCIL_XNOR", "value": 15} 764 ] 765 }, 766 "SurfaceEndian": { 767 "entries": [ 768 {"name": "ENDIAN_NONE", "value": 0}, 769 {"name": "ENDIAN_8IN16", "value": 1}, 770 {"name": "ENDIAN_8IN32", "value": 2}, 771 {"name": "ENDIAN_8IN64", "value": 3} 772 ] 773 }, 774 "SurfaceNumber": { 775 "entries": [ 776 {"name": "NUMBER_UNORM", "value": 0}, 777 {"name": "NUMBER_SNORM", "value": 1}, 778 {"name": "NUMBER_USCALED", "value": 2}, 779 {"name": "NUMBER_SSCALED", "value": 3}, 780 {"name": "NUMBER_UINT", "value": 4}, 781 {"name": "NUMBER_SINT", "value": 5}, 782 {"name": "NUMBER_SRGB", "value": 6}, 783 {"name": "NUMBER_FLOAT", "value": 7} 784 ] 785 }, 786 "SurfaceSwap": { 787 "entries": [ 788 {"name": "SWAP_STD", "value": 0}, 789 {"name": "SWAP_ALT", "value": 1}, 790 {"name": "SWAP_STD_REV", "value": 2}, 791 {"name": "SWAP_ALT_REV", "value": 3} 792 ] 793 }, 794 "TileSplit": { 795 "entries": [ 796 {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0}, 797 {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1}, 798 {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2}, 799 {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3}, 800 {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4}, 801 {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5}, 802 {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6} 803 ] 804 }, 805 "VGT_DI_MAJOR_MODE_SELECT": { 806 "entries": [ 807 {"name": "DI_MAJOR_MODE_0", "value": 0}, 808 {"name": "DI_MAJOR_MODE_1", "value": 1} 809 ] 810 }, 811 "VGT_DI_PRIM_TYPE": { 812 "entries": [ 813 {"name": "DI_PT_NONE", "value": 0}, 814 {"name": "DI_PT_POINTLIST", "value": 1}, 815 {"name": "DI_PT_LINELIST", "value": 2}, 816 {"name": "DI_PT_LINESTRIP", "value": 3}, 817 {"name": "DI_PT_TRILIST", "value": 4}, 818 {"name": "DI_PT_TRIFAN", "value": 5}, 819 {"name": "DI_PT_TRISTRIP", "value": 6}, 820 {"name": "DI_PT_UNUSED_0", "value": 7}, 821 {"name": "DI_PT_UNUSED_1", "value": 8}, 822 {"name": "DI_PT_PATCH", "value": 9}, 823 {"name": "DI_PT_LINELIST_ADJ", "value": 10}, 824 {"name": "DI_PT_LINESTRIP_ADJ", "value": 11}, 825 {"name": "DI_PT_TRILIST_ADJ", "value": 12}, 826 {"name": "DI_PT_TRISTRIP_ADJ", "value": 13}, 827 {"name": "DI_PT_UNUSED_3", "value": 14}, 828 {"name": "DI_PT_UNUSED_4", "value": 15}, 829 {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16}, 830 {"name": "DI_PT_RECTLIST", "value": 17}, 831 {"name": "DI_PT_LINELOOP", "value": 18}, 832 {"name": "DI_PT_QUADLIST", "value": 19}, 833 {"name": "DI_PT_QUADSTRIP", "value": 20}, 834 {"name": "DI_PT_POLYGON", "value": 21}, 835 {"name": "DI_PT_2D_COPY_RECT_LIST_V0", "value": 22}, 836 {"name": "DI_PT_2D_COPY_RECT_LIST_V1", "value": 23}, 837 {"name": "DI_PT_2D_COPY_RECT_LIST_V2", "value": 24}, 838 {"name": "DI_PT_2D_COPY_RECT_LIST_V3", "value": 25}, 839 {"name": "DI_PT_2D_FILL_RECT_LIST", "value": 26}, 840 {"name": "DI_PT_2D_LINE_STRIP", "value": 27}, 841 {"name": "DI_PT_2D_TRI_STRIP", "value": 28} 842 ] 843 }, 844 "VGT_DI_SOURCE_SELECT": { 845 "entries": [ 846 {"name": "DI_SRC_SEL_DMA", "value": 0}, 847 {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1}, 848 {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2}, 849 {"name": "DI_SRC_SEL_RESERVED", "value": 3} 850 ] 851 }, 852 "VGT_DMA_BUF_TYPE": { 853 "entries": [ 854 {"name": "VGT_DMA_BUF_MEM", "value": 0}, 855 {"name": "VGT_DMA_BUF_RING", "value": 1}, 856 {"name": "VGT_DMA_BUF_SETUP", "value": 2} 857 ] 858 }, 859 "VGT_DMA_SWAP_MODE": { 860 "entries": [ 861 {"name": "VGT_DMA_SWAP_NONE", "value": 0}, 862 {"name": "VGT_DMA_SWAP_16_BIT", "value": 1}, 863 {"name": "VGT_DMA_SWAP_32_BIT", "value": 2}, 864 {"name": "VGT_DMA_SWAP_WORD", "value": 3} 865 ] 866 }, 867 "VGT_EVENT_TYPE": { 868 "entries": [ 869 {"name": "Reserved_0x00", "value": 0}, 870 {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1}, 871 {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2}, 872 {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3}, 873 {"name": "CACHE_FLUSH_TS", "value": 4}, 874 {"name": "CONTEXT_DONE", "value": 5}, 875 {"name": "CACHE_FLUSH", "value": 6}, 876 {"name": "CS_PARTIAL_FLUSH", "value": 7}, 877 {"name": "VGT_STREAMOUT_SYNC", "value": 8}, 878 {"name": "Reserved_0x09", "value": 9}, 879 {"name": "VGT_STREAMOUT_RESET", "value": 10}, 880 {"name": "END_OF_PIPE_INCR_DE", "value": 11}, 881 {"name": "END_OF_PIPE_IB_END", "value": 12}, 882 {"name": "RST_PIX_CNT", "value": 13}, 883 {"name": "Reserved_0x0E", "value": 14}, 884 {"name": "VS_PARTIAL_FLUSH", "value": 15}, 885 {"name": "PS_PARTIAL_FLUSH", "value": 16}, 886 {"name": "FLUSH_HS_OUTPUT", "value": 17}, 887 {"name": "FLUSH_LS_OUTPUT", "value": 18}, 888 {"name": "Reserved_0x13", "value": 19}, 889 {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20}, 890 {"name": "ZPASS_DONE", "value": 21}, 891 {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22}, 892 {"name": "PERFCOUNTER_START", "value": 23}, 893 {"name": "PERFCOUNTER_STOP", "value": 24}, 894 {"name": "PIPELINESTAT_START", "value": 25}, 895 {"name": "PIPELINESTAT_STOP", "value": 26}, 896 {"name": "PERFCOUNTER_SAMPLE", "value": 27}, 897 {"name": "FLUSH_ES_OUTPUT", "value": 28}, 898 {"name": "FLUSH_GS_OUTPUT", "value": 29}, 899 {"name": "SAMPLE_PIPELINESTAT", "value": 30}, 900 {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31}, 901 {"name": "SAMPLE_STREAMOUTSTATS", "value": 32}, 902 {"name": "RESET_VTX_CNT", "value": 33}, 903 {"name": "BLOCK_CONTEXT_DONE", "value": 34}, 904 {"name": "CS_CONTEXT_DONE", "value": 35}, 905 {"name": "VGT_FLUSH", "value": 36}, 906 {"name": "Reserved_0x25", "value": 37}, 907 {"name": "SQ_NON_EVENT", "value": 38}, 908 {"name": "SC_SEND_DB_VPZ", "value": 39}, 909 {"name": "BOTTOM_OF_PIPE_TS", "value": 40}, 910 {"name": "FLUSH_SX_TS", "value": 41}, 911 {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42}, 912 {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43}, 913 {"name": "FLUSH_AND_INV_DB_META", "value": 44}, 914 {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45}, 915 {"name": "FLUSH_AND_INV_CB_META", "value": 46}, 916 {"name": "CS_DONE", "value": 47}, 917 {"name": "PS_DONE", "value": 48}, 918 {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49}, 919 {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50}, 920 {"name": "THREAD_TRACE_START", "value": 51}, 921 {"name": "THREAD_TRACE_STOP", "value": 52}, 922 {"name": "THREAD_TRACE_MARKER", "value": 53}, 923 {"name": "THREAD_TRACE_FLUSH", "value": 54}, 924 {"name": "THREAD_TRACE_FINISH", "value": 55}, 925 {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56}, 926 {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57}, 927 {"name": "PIXEL_PIPE_STAT_RESET", "value": 58}, 928 {"name": "CONTEXT_SUSPEND", "value": 59} 929 ] 930 }, 931 "VGT_GS_CUT_MODE": { 932 "entries": [ 933 {"name": "GS_CUT_1024", "value": 0}, 934 {"name": "GS_CUT_512", "value": 1}, 935 {"name": "GS_CUT_256", "value": 2}, 936 {"name": "GS_CUT_128", "value": 3} 937 ] 938 }, 939 "VGT_GS_MODE_TYPE": { 940 "entries": [ 941 {"name": "GS_OFF", "value": 0}, 942 {"name": "GS_SCENARIO_A", "value": 1}, 943 {"name": "GS_SCENARIO_B", "value": 2}, 944 {"name": "GS_SCENARIO_G", "value": 3}, 945 {"name": "GS_SCENARIO_C", "value": 4}, 946 {"name": "SPRITE_EN", "value": 5} 947 ] 948 }, 949 "VGT_GS_OUTPRIM_TYPE": { 950 "entries": [ 951 {"name": "POINTLIST", "value": 0}, 952 {"name": "LINESTRIP", "value": 1}, 953 {"name": "TRISTRIP", "value": 2} 954 ] 955 }, 956 "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY": { 957 "entries": [ 958 {"name": "X_8K_DWORDS", "value": 0}, 959 {"name": "X_4K_DWORDS", "value": 1}, 960 {"name": "X_2K_DWORDS", "value": 2}, 961 {"name": "X_1K_DWORDS", "value": 3} 962 ] 963 }, 964 "VGT_INDEX_TYPE_MODE": { 965 "entries": [ 966 {"name": "VGT_INDEX_16", "value": 0}, 967 {"name": "VGT_INDEX_32", "value": 1} 968 ] 969 }, 970 "VGT_RDREQ_POLICY": { 971 "entries": [ 972 {"name": "VGT_POLICY_LRU", "value": 0}, 973 {"name": "VGT_POLICY_STREAM", "value": 1}, 974 {"name": "VGT_POLICY_BYPASS", "value": 2}, 975 {"name": "VGT_POLICY_RESERVED", "value": 3} 976 ] 977 }, 978 "VGT_STAGES_ES_EN": { 979 "entries": [ 980 {"name": "ES_STAGE_OFF", "value": 0}, 981 {"name": "ES_STAGE_DS", "value": 1}, 982 {"name": "ES_STAGE_REAL", "value": 2}, 983 {"name": "RESERVED_ES", "value": 3} 984 ] 985 }, 986 "VGT_STAGES_GS_EN": { 987 "entries": [ 988 {"name": "GS_STAGE_OFF", "value": 0}, 989 {"name": "GS_STAGE_ON", "value": 1} 990 ] 991 }, 992 "VGT_STAGES_HS_EN": { 993 "entries": [ 994 {"name": "HS_STAGE_OFF", "value": 0}, 995 {"name": "HS_STAGE_ON", "value": 1} 996 ] 997 }, 998 "VGT_STAGES_LS_EN": { 999 "entries": [ 1000 {"name": "LS_STAGE_OFF", "value": 0}, 1001 {"name": "LS_STAGE_ON", "value": 1}, 1002 {"name": "CS_STAGE_ON", "value": 2}, 1003 {"name": "RESERVED_LS", "value": 3} 1004 ] 1005 }, 1006 "VGT_STAGES_VS_EN": { 1007 "entries": [ 1008 {"name": "VS_STAGE_REAL", "value": 0}, 1009 {"name": "VS_STAGE_DS", "value": 1}, 1010 {"name": "VS_STAGE_COPY_SHADER", "value": 2}, 1011 {"name": "RESERVED_VS", "value": 3} 1012 ] 1013 }, 1014 "VGT_TESS_PARTITION": { 1015 "entries": [ 1016 {"name": "PART_INTEGER", "value": 0}, 1017 {"name": "PART_POW2", "value": 1}, 1018 {"name": "PART_FRAC_ODD", "value": 2}, 1019 {"name": "PART_FRAC_EVEN", "value": 3} 1020 ] 1021 }, 1022 "VGT_TESS_TOPOLOGY": { 1023 "entries": [ 1024 {"name": "OUTPUT_POINT", "value": 0}, 1025 {"name": "OUTPUT_LINE", "value": 1}, 1026 {"name": "OUTPUT_TRIANGLE_CW", "value": 2}, 1027 {"name": "OUTPUT_TRIANGLE_CCW", "value": 3} 1028 ] 1029 }, 1030 "VGT_TESS_TYPE": { 1031 "entries": [ 1032 {"name": "TESS_ISOLINE", "value": 0}, 1033 {"name": "TESS_TRIANGLE", "value": 1}, 1034 {"name": "TESS_QUAD", "value": 2} 1035 ] 1036 }, 1037 "ZFormat": { 1038 "entries": [ 1039 {"name": "Z_INVALID", "value": 0}, 1040 {"name": "Z_16", "value": 1}, 1041 {"name": "Z_24", "value": 2}, 1042 {"name": "Z_32_FLOAT", "value": 3} 1043 ] 1044 }, 1045 "ZLimitSumm": { 1046 "entries": [ 1047 {"name": "FORCE_SUMM_OFF", "value": 0}, 1048 {"name": "FORCE_SUMM_MINZ", "value": 1}, 1049 {"name": "FORCE_SUMM_MAXZ", "value": 2}, 1050 {"name": "FORCE_SUMM_BOTH", "value": 3} 1051 ] 1052 }, 1053 "ZOrder": { 1054 "entries": [ 1055 {"name": "LATE_Z", "value": 0}, 1056 {"name": "EARLY_Z_THEN_LATE_Z", "value": 1}, 1057 {"name": "RE_Z", "value": 2}, 1058 {"name": "EARLY_Z_THEN_RE_Z", "value": 3} 1059 ] 1060 } 1061 }, 1062 "register_mappings": [ 1063 { 1064 "chips": ["gfx7"], 1065 "map": {"at": 68, "to": "mm"}, 1066 "name": "SQ_WAVE_MODE", 1067 "type_ref": "SQ_WAVE_MODE" 1068 }, 1069 { 1070 "chips": ["gfx7"], 1071 "map": {"at": 72, "to": "mm"}, 1072 "name": "SQ_WAVE_STATUS", 1073 "type_ref": "SQ_WAVE_STATUS" 1074 }, 1075 { 1076 "chips": ["gfx7"], 1077 "map": {"at": 76, "to": "mm"}, 1078 "name": "SQ_WAVE_TRAPSTS", 1079 "type_ref": "SQ_WAVE_TRAPSTS" 1080 }, 1081 { 1082 "chips": ["gfx7"], 1083 "map": {"at": 80, "to": "mm"}, 1084 "name": "SQ_WAVE_HW_ID", 1085 "type_ref": "SQ_WAVE_HW_ID" 1086 }, 1087 { 1088 "chips": ["gfx7"], 1089 "map": {"at": 84, "to": "mm"}, 1090 "name": "SQ_WAVE_GPR_ALLOC", 1091 "type_ref": "SQ_WAVE_GPR_ALLOC" 1092 }, 1093 { 1094 "chips": ["gfx7"], 1095 "map": {"at": 88, "to": "mm"}, 1096 "name": "SQ_WAVE_LDS_ALLOC", 1097 "type_ref": "SQ_WAVE_LDS_ALLOC" 1098 }, 1099 { 1100 "chips": ["gfx7"], 1101 "map": {"at": 92, "to": "mm"}, 1102 "name": "SQ_WAVE_IB_STS", 1103 "type_ref": "SQ_WAVE_IB_STS" 1104 }, 1105 { 1106 "chips": ["gfx7"], 1107 "map": {"at": 96, "to": "mm"}, 1108 "name": "SQ_WAVE_PC_LO", 1109 "type_ref": "SQ_WAVE_PC_LO" 1110 }, 1111 { 1112 "chips": ["gfx7"], 1113 "map": {"at": 100, "to": "mm"}, 1114 "name": "SQ_WAVE_PC_HI", 1115 "type_ref": "SQ_WAVE_PC_HI" 1116 }, 1117 { 1118 "chips": ["gfx7"], 1119 "map": {"at": 104, "to": "mm"}, 1120 "name": "SQ_WAVE_INST_DW0", 1121 "type_ref": "SQ_WAVE_INST_DW0" 1122 }, 1123 { 1124 "chips": ["gfx7"], 1125 "map": {"at": 108, "to": "mm"}, 1126 "name": "SQ_WAVE_INST_DW1", 1127 "type_ref": "SQ_WAVE_INST_DW1" 1128 }, 1129 { 1130 "chips": ["gfx7"], 1131 "map": {"at": 112, "to": "mm"}, 1132 "name": "SQ_WAVE_IB_DBG0", 1133 "type_ref": "SQ_WAVE_IB_DBG0" 1134 }, 1135 { 1136 "chips": ["gfx7"], 1137 "map": {"at": 2480, "to": "mm"}, 1138 "name": "SQ_WAVE_TBA_LO", 1139 "type_ref": "SQ_WAVE_TBA_LO" 1140 }, 1141 { 1142 "chips": ["gfx7"], 1143 "map": {"at": 2484, "to": "mm"}, 1144 "name": "SQ_WAVE_TBA_HI", 1145 "type_ref": "SQ_WAVE_TBA_HI" 1146 }, 1147 { 1148 "chips": ["gfx7"], 1149 "map": {"at": 2488, "to": "mm"}, 1150 "name": "SQ_WAVE_TMA_LO", 1151 "type_ref": "SQ_WAVE_TBA_LO" 1152 }, 1153 { 1154 "chips": ["gfx7"], 1155 "map": {"at": 2492, "to": "mm"}, 1156 "name": "SQ_WAVE_TMA_HI", 1157 "type_ref": "SQ_WAVE_TBA_HI" 1158 }, 1159 { 1160 "chips": ["gfx7"], 1161 "map": {"at": 2496, "to": "mm"}, 1162 "name": "SQ_WAVE_TTMP0", 1163 "type_ref": "CP_APPEND_DATA" 1164 }, 1165 { 1166 "chips": ["gfx7"], 1167 "map": {"at": 2500, "to": "mm"}, 1168 "name": "SQ_WAVE_TTMP1", 1169 "type_ref": "CP_APPEND_DATA" 1170 }, 1171 { 1172 "chips": ["gfx7"], 1173 "map": {"at": 2504, "to": "mm"}, 1174 "name": "SQ_WAVE_TTMP2", 1175 "type_ref": "CP_APPEND_DATA" 1176 }, 1177 { 1178 "chips": ["gfx7"], 1179 "map": {"at": 2508, "to": "mm"}, 1180 "name": "SQ_WAVE_TTMP3", 1181 "type_ref": "CP_APPEND_DATA" 1182 }, 1183 { 1184 "chips": ["gfx7"], 1185 "map": {"at": 2512, "to": "mm"}, 1186 "name": "SQ_WAVE_TTMP4", 1187 "type_ref": "CP_APPEND_DATA" 1188 }, 1189 { 1190 "chips": ["gfx7"], 1191 "map": {"at": 2516, "to": "mm"}, 1192 "name": "SQ_WAVE_TTMP5", 1193 "type_ref": "CP_APPEND_DATA" 1194 }, 1195 { 1196 "chips": ["gfx7"], 1197 "map": {"at": 2520, "to": "mm"}, 1198 "name": "SQ_WAVE_TTMP6", 1199 "type_ref": "CP_APPEND_DATA" 1200 }, 1201 { 1202 "chips": ["gfx7"], 1203 "map": {"at": 2524, "to": "mm"}, 1204 "name": "SQ_WAVE_TTMP7", 1205 "type_ref": "CP_APPEND_DATA" 1206 }, 1207 { 1208 "chips": ["gfx7"], 1209 "map": {"at": 2528, "to": "mm"}, 1210 "name": "SQ_WAVE_TTMP8", 1211 "type_ref": "CP_APPEND_DATA" 1212 }, 1213 { 1214 "chips": ["gfx7"], 1215 "map": {"at": 2532, "to": "mm"}, 1216 "name": "SQ_WAVE_TTMP9", 1217 "type_ref": "CP_APPEND_DATA" 1218 }, 1219 { 1220 "chips": ["gfx7"], 1221 "map": {"at": 2536, "to": "mm"}, 1222 "name": "SQ_WAVE_TTMP10", 1223 "type_ref": "CP_APPEND_DATA" 1224 }, 1225 { 1226 "chips": ["gfx7"], 1227 "map": {"at": 2540, "to": "mm"}, 1228 "name": "SQ_WAVE_TTMP11", 1229 "type_ref": "CP_APPEND_DATA" 1230 }, 1231 { 1232 "chips": ["gfx7"], 1233 "map": {"at": 2544, "to": "mm"}, 1234 "name": "SQ_WAVE_M0", 1235 "type_ref": "SQ_WAVE_M0" 1236 }, 1237 { 1238 "chips": ["gfx7"], 1239 "map": {"at": 2552, "to": "mm"}, 1240 "name": "SQ_WAVE_EXEC_LO", 1241 "type_ref": "SQ_WAVE_EXEC_LO" 1242 }, 1243 { 1244 "chips": ["gfx7"], 1245 "map": {"at": 2556, "to": "mm"}, 1246 "name": "SQ_WAVE_EXEC_HI", 1247 "type_ref": "SQ_WAVE_EXEC_HI" 1248 }, 1249 { 1250 "chips": ["gfx7"], 1251 "map": {"at": 32776, "to": "mm"}, 1252 "name": "GRBM_STATUS2", 1253 "type_ref": "GRBM_STATUS2" 1254 }, 1255 { 1256 "chips": ["gfx7"], 1257 "map": {"at": 32784, "to": "mm"}, 1258 "name": "GRBM_STATUS", 1259 "type_ref": "GRBM_STATUS" 1260 }, 1261 { 1262 "chips": ["gfx7"], 1263 "map": {"at": 32788, "to": "mm"}, 1264 "name": "GRBM_STATUS_SE0", 1265 "type_ref": "GRBM_STATUS_SE0" 1266 }, 1267 { 1268 "chips": ["gfx7"], 1269 "map": {"at": 32792, "to": "mm"}, 1270 "name": "GRBM_STATUS_SE1", 1271 "type_ref": "GRBM_STATUS_SE0" 1272 }, 1273 { 1274 "chips": ["gfx7"], 1275 "map": {"at": 32824, "to": "mm"}, 1276 "name": "GRBM_STATUS_SE2", 1277 "type_ref": "GRBM_STATUS_SE0" 1278 }, 1279 { 1280 "chips": ["gfx7"], 1281 "map": {"at": 32828, "to": "mm"}, 1282 "name": "GRBM_STATUS_SE3", 1283 "type_ref": "GRBM_STATUS_SE0" 1284 }, 1285 { 1286 "chips": ["gfx7"], 1287 "map": {"at": 33296, "to": "mm"}, 1288 "name": "CP_CPC_STATUS", 1289 "type_ref": "CP_CPC_STATUS" 1290 }, 1291 { 1292 "chips": ["gfx7"], 1293 "map": {"at": 33300, "to": "mm"}, 1294 "name": "CP_CPC_BUSY_STAT", 1295 "type_ref": "CP_CPC_BUSY_STAT" 1296 }, 1297 { 1298 "chips": ["gfx7"], 1299 "map": {"at": 33304, "to": "mm"}, 1300 "name": "CP_CPC_STALLED_STAT1", 1301 "type_ref": "CP_CPC_STALLED_STAT1" 1302 }, 1303 { 1304 "chips": ["gfx7"], 1305 "map": {"at": 33308, "to": "mm"}, 1306 "name": "CP_CPF_STATUS", 1307 "type_ref": "CP_CPF_STATUS" 1308 }, 1309 { 1310 "chips": ["gfx7"], 1311 "map": {"at": 33312, "to": "mm"}, 1312 "name": "CP_CPF_BUSY_STAT", 1313 "type_ref": "CP_CPF_BUSY_STAT" 1314 }, 1315 { 1316 "chips": ["gfx7"], 1317 "map": {"at": 33316, "to": "mm"}, 1318 "name": "CP_CPF_STALLED_STAT1", 1319 "type_ref": "CP_CPF_STALLED_STAT1" 1320 }, 1321 { 1322 "chips": ["gfx7"], 1323 "map": {"at": 33320, "to": "mm"}, 1324 "name": "CP_CPC_MC_CNTL", 1325 "type_ref": "CP_CPC_MC_CNTL" 1326 }, 1327 { 1328 "chips": ["gfx7"], 1329 "map": {"at": 33324, "to": "mm"}, 1330 "name": "CP_CPC_GRBM_FREE_COUNT", 1331 "type_ref": "CP_CPC_GRBM_FREE_COUNT" 1332 }, 1333 { 1334 "chips": ["gfx7"], 1335 "map": {"at": 33344, "to": "mm"}, 1336 "name": "CP_CPC_SCRATCH_INDEX", 1337 "type_ref": "CP_CPC_SCRATCH_INDEX" 1338 }, 1339 { 1340 "chips": ["gfx7"], 1341 "map": {"at": 33348, "to": "mm"}, 1342 "name": "CP_CPC_SCRATCH_DATA", 1343 "type_ref": "CP_CPC_SCRATCH_DATA" 1344 }, 1345 { 1346 "chips": ["gfx7"], 1347 "map": {"at": 33436, "to": "mm"}, 1348 "name": "CP_CPC_HALT_HYST_COUNT", 1349 "type_ref": "CP_CPC_HALT_HYST_COUNT" 1350 }, 1351 { 1352 "chips": ["gfx7"], 1353 "map": {"at": 36352, "to": "mm"}, 1354 "name": "SQ_THREAD_TRACE_BASE", 1355 "type_ref": "SQ_THREAD_TRACE_BASE" 1356 }, 1357 { 1358 "chips": ["gfx7"], 1359 "map": {"at": 36356, "to": "mm"}, 1360 "name": "SQ_THREAD_TRACE_SIZE", 1361 "type_ref": "SQ_THREAD_TRACE_SIZE" 1362 }, 1363 { 1364 "chips": ["gfx7"], 1365 "map": {"at": 36360, "to": "mm"}, 1366 "name": "SQ_THREAD_TRACE_MASK", 1367 "type_ref": "SQ_THREAD_TRACE_MASK" 1368 }, 1369 { 1370 "chips": ["gfx7"], 1371 "map": {"at": 36364, "to": "mm"}, 1372 "name": "SQ_THREAD_TRACE_TOKEN_MASK", 1373 "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK" 1374 }, 1375 { 1376 "chips": ["gfx7"], 1377 "map": {"at": 36368, "to": "mm"}, 1378 "name": "SQ_THREAD_TRACE_PERF_MASK", 1379 "type_ref": "SQ_PERFCOUNTER_MASK" 1380 }, 1381 { 1382 "chips": ["gfx7"], 1383 "map": {"at": 36372, "to": "mm"}, 1384 "name": "SQ_THREAD_TRACE_BASE2", 1385 "type_ref": "SQ_THREAD_TRACE_BASE2" 1386 }, 1387 { 1388 "chips": ["gfx7"], 1389 "map": {"at": 36376, "to": "mm"}, 1390 "name": "SQ_THREAD_TRACE_TOKEN_MASK2", 1391 "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK2" 1392 }, 1393 { 1394 "chips": ["gfx7"], 1395 "map": {"at": 36400, "to": "mm"}, 1396 "name": "SQ_THREAD_TRACE_WPTR", 1397 "type_ref": "SQ_THREAD_TRACE_WPTR" 1398 }, 1399 { 1400 "chips": ["gfx7"], 1401 "map": {"at": 36404, "to": "mm"}, 1402 "name": "SQ_THREAD_TRACE_STATUS", 1403 "type_ref": "SQ_THREAD_TRACE_STATUS" 1404 }, 1405 { 1406 "chips": ["gfx7"], 1407 "map": {"at": 36408, "to": "mm"}, 1408 "name": "SQ_THREAD_TRACE_MODE", 1409 "type_ref": "SQ_THREAD_TRACE_MODE" 1410 }, 1411 { 1412 "chips": ["gfx7"], 1413 "map": {"at": 36412, "to": "mm"}, 1414 "name": "SQ_THREAD_TRACE_CTRL", 1415 "type_ref": "SQ_THREAD_TRACE_CTRL" 1416 }, 1417 { 1418 "chips": ["gfx7"], 1419 "map": {"at": 36416, "to": "mm"}, 1420 "name": "SQ_THREAD_TRACE_CNTR", 1421 "type_ref": "SQ_THREAD_TRACE_CNTR" 1422 }, 1423 { 1424 "chips": ["gfx7"], 1425 "map": {"at": 36424, "to": "mm"}, 1426 "name": "SQ_THREAD_TRACE_HIWATER", 1427 "type_ref": "SQ_THREAD_TRACE_HIWATER" 1428 }, 1429 { 1430 "chips": ["gfx7"], 1431 "map": {"at": 36608, "to": "mm"}, 1432 "name": "SQ_BUF_RSRC_WORD0", 1433 "type_ref": "SQ_BUF_RSRC_WORD0" 1434 }, 1435 { 1436 "chips": ["gfx7"], 1437 "map": {"at": 36612, "to": "mm"}, 1438 "name": "SQ_BUF_RSRC_WORD1", 1439 "type_ref": "SQ_BUF_RSRC_WORD1" 1440 }, 1441 { 1442 "chips": ["gfx7"], 1443 "map": {"at": 36616, "to": "mm"}, 1444 "name": "SQ_BUF_RSRC_WORD2", 1445 "type_ref": "SQ_BUF_RSRC_WORD2" 1446 }, 1447 { 1448 "chips": ["gfx7"], 1449 "map": {"at": 36620, "to": "mm"}, 1450 "name": "SQ_BUF_RSRC_WORD3", 1451 "type_ref": "SQ_BUF_RSRC_WORD3" 1452 }, 1453 { 1454 "chips": ["gfx7"], 1455 "map": {"at": 36624, "to": "mm"}, 1456 "name": "SQ_IMG_RSRC_WORD0", 1457 "type_ref": "SQ_BUF_RSRC_WORD0" 1458 }, 1459 { 1460 "chips": ["gfx7"], 1461 "map": {"at": 36628, "to": "mm"}, 1462 "name": "SQ_IMG_RSRC_WORD1", 1463 "type_ref": "SQ_IMG_RSRC_WORD1" 1464 }, 1465 { 1466 "chips": ["gfx7"], 1467 "map": {"at": 36632, "to": "mm"}, 1468 "name": "SQ_IMG_RSRC_WORD2", 1469 "type_ref": "SQ_IMG_RSRC_WORD2" 1470 }, 1471 { 1472 "chips": ["gfx7"], 1473 "map": {"at": 36636, "to": "mm"}, 1474 "name": "SQ_IMG_RSRC_WORD3", 1475 "type_ref": "SQ_IMG_RSRC_WORD3" 1476 }, 1477 { 1478 "chips": ["gfx7"], 1479 "map": {"at": 36640, "to": "mm"}, 1480 "name": "SQ_IMG_RSRC_WORD4", 1481 "type_ref": "SQ_IMG_RSRC_WORD4" 1482 }, 1483 { 1484 "chips": ["gfx7"], 1485 "map": {"at": 36644, "to": "mm"}, 1486 "name": "SQ_IMG_RSRC_WORD5", 1487 "type_ref": "SQ_IMG_RSRC_WORD5" 1488 }, 1489 { 1490 "chips": ["gfx7"], 1491 "map": {"at": 36648, "to": "mm"}, 1492 "name": "SQ_IMG_RSRC_WORD6", 1493 "type_ref": "SQ_IMG_RSRC_WORD6" 1494 }, 1495 { 1496 "chips": ["gfx7"], 1497 "map": {"at": 36652, "to": "mm"}, 1498 "name": "SQ_IMG_RSRC_WORD7", 1499 "type_ref": "SQ_IMG_RSRC_WORD7" 1500 }, 1501 { 1502 "chips": ["gfx7"], 1503 "map": {"at": 36656, "to": "mm"}, 1504 "name": "SQ_IMG_SAMP_WORD0", 1505 "type_ref": "SQ_IMG_SAMP_WORD0" 1506 }, 1507 { 1508 "chips": ["gfx7"], 1509 "map": {"at": 36660, "to": "mm"}, 1510 "name": "SQ_IMG_SAMP_WORD1", 1511 "type_ref": "SQ_IMG_SAMP_WORD1" 1512 }, 1513 { 1514 "chips": ["gfx7"], 1515 "map": {"at": 36664, "to": "mm"}, 1516 "name": "SQ_IMG_SAMP_WORD2", 1517 "type_ref": "SQ_IMG_SAMP_WORD2" 1518 }, 1519 { 1520 "chips": ["gfx7"], 1521 "map": {"at": 36668, "to": "mm"}, 1522 "name": "SQ_IMG_SAMP_WORD3", 1523 "type_ref": "SQ_IMG_SAMP_WORD3" 1524 }, 1525 { 1526 "chips": ["gfx7"], 1527 "map": {"at": 37120, "to": "mm"}, 1528 "name": "SPI_CONFIG_CNTL", 1529 "type_ref": "SPI_CONFIG_CNTL" 1530 }, 1531 { 1532 "chips": ["gfx7"], 1533 "map": {"at": 39160, "to": "mm"}, 1534 "name": "GB_ADDR_CONFIG", 1535 "type_ref": "GB_ADDR_CONFIG" 1536 }, 1537 { 1538 "chips": ["gfx7"], 1539 "map": {"at": 39184, "to": "mm"}, 1540 "name": "GB_TILE_MODE0", 1541 "type_ref": "GB_TILE_MODE0" 1542 }, 1543 { 1544 "chips": ["gfx7"], 1545 "map": {"at": 39188, "to": "mm"}, 1546 "name": "GB_TILE_MODE1", 1547 "type_ref": "GB_TILE_MODE0" 1548 }, 1549 { 1550 "chips": ["gfx7"], 1551 "map": {"at": 39192, "to": "mm"}, 1552 "name": "GB_TILE_MODE2", 1553 "type_ref": "GB_TILE_MODE0" 1554 }, 1555 { 1556 "chips": ["gfx7"], 1557 "map": {"at": 39196, "to": "mm"}, 1558 "name": "GB_TILE_MODE3", 1559 "type_ref": "GB_TILE_MODE0" 1560 }, 1561 { 1562 "chips": ["gfx7"], 1563 "map": {"at": 39200, "to": "mm"}, 1564 "name": "GB_TILE_MODE4", 1565 "type_ref": "GB_TILE_MODE0" 1566 }, 1567 { 1568 "chips": ["gfx7"], 1569 "map": {"at": 39204, "to": "mm"}, 1570 "name": "GB_TILE_MODE5", 1571 "type_ref": "GB_TILE_MODE0" 1572 }, 1573 { 1574 "chips": ["gfx7"], 1575 "map": {"at": 39208, "to": "mm"}, 1576 "name": "GB_TILE_MODE6", 1577 "type_ref": "GB_TILE_MODE0" 1578 }, 1579 { 1580 "chips": ["gfx7"], 1581 "map": {"at": 39212, "to": "mm"}, 1582 "name": "GB_TILE_MODE7", 1583 "type_ref": "GB_TILE_MODE0" 1584 }, 1585 { 1586 "chips": ["gfx7"], 1587 "map": {"at": 39216, "to": "mm"}, 1588 "name": "GB_TILE_MODE8", 1589 "type_ref": "GB_TILE_MODE0" 1590 }, 1591 { 1592 "chips": ["gfx7"], 1593 "map": {"at": 39220, "to": "mm"}, 1594 "name": "GB_TILE_MODE9", 1595 "type_ref": "GB_TILE_MODE0" 1596 }, 1597 { 1598 "chips": ["gfx7"], 1599 "map": {"at": 39224, "to": "mm"}, 1600 "name": "GB_TILE_MODE10", 1601 "type_ref": "GB_TILE_MODE0" 1602 }, 1603 { 1604 "chips": ["gfx7"], 1605 "map": {"at": 39228, "to": "mm"}, 1606 "name": "GB_TILE_MODE11", 1607 "type_ref": "GB_TILE_MODE0" 1608 }, 1609 { 1610 "chips": ["gfx7"], 1611 "map": {"at": 39232, "to": "mm"}, 1612 "name": "GB_TILE_MODE12", 1613 "type_ref": "GB_TILE_MODE0" 1614 }, 1615 { 1616 "chips": ["gfx7"], 1617 "map": {"at": 39236, "to": "mm"}, 1618 "name": "GB_TILE_MODE13", 1619 "type_ref": "GB_TILE_MODE0" 1620 }, 1621 { 1622 "chips": ["gfx7"], 1623 "map": {"at": 39240, "to": "mm"}, 1624 "name": "GB_TILE_MODE14", 1625 "type_ref": "GB_TILE_MODE0" 1626 }, 1627 { 1628 "chips": ["gfx7"], 1629 "map": {"at": 39244, "to": "mm"}, 1630 "name": "GB_TILE_MODE15", 1631 "type_ref": "GB_TILE_MODE0" 1632 }, 1633 { 1634 "chips": ["gfx7"], 1635 "map": {"at": 39248, "to": "mm"}, 1636 "name": "GB_TILE_MODE16", 1637 "type_ref": "GB_TILE_MODE0" 1638 }, 1639 { 1640 "chips": ["gfx7"], 1641 "map": {"at": 39252, "to": "mm"}, 1642 "name": "GB_TILE_MODE17", 1643 "type_ref": "GB_TILE_MODE0" 1644 }, 1645 { 1646 "chips": ["gfx7"], 1647 "map": {"at": 39256, "to": "mm"}, 1648 "name": "GB_TILE_MODE18", 1649 "type_ref": "GB_TILE_MODE0" 1650 }, 1651 { 1652 "chips": ["gfx7"], 1653 "map": {"at": 39260, "to": "mm"}, 1654 "name": "GB_TILE_MODE19", 1655 "type_ref": "GB_TILE_MODE0" 1656 }, 1657 { 1658 "chips": ["gfx7"], 1659 "map": {"at": 39264, "to": "mm"}, 1660 "name": "GB_TILE_MODE20", 1661 "type_ref": "GB_TILE_MODE0" 1662 }, 1663 { 1664 "chips": ["gfx7"], 1665 "map": {"at": 39268, "to": "mm"}, 1666 "name": "GB_TILE_MODE21", 1667 "type_ref": "GB_TILE_MODE0" 1668 }, 1669 { 1670 "chips": ["gfx7"], 1671 "map": {"at": 39272, "to": "mm"}, 1672 "name": "GB_TILE_MODE22", 1673 "type_ref": "GB_TILE_MODE0" 1674 }, 1675 { 1676 "chips": ["gfx7"], 1677 "map": {"at": 39276, "to": "mm"}, 1678 "name": "GB_TILE_MODE23", 1679 "type_ref": "GB_TILE_MODE0" 1680 }, 1681 { 1682 "chips": ["gfx7"], 1683 "map": {"at": 39280, "to": "mm"}, 1684 "name": "GB_TILE_MODE24", 1685 "type_ref": "GB_TILE_MODE0" 1686 }, 1687 { 1688 "chips": ["gfx7"], 1689 "map": {"at": 39284, "to": "mm"}, 1690 "name": "GB_TILE_MODE25", 1691 "type_ref": "GB_TILE_MODE0" 1692 }, 1693 { 1694 "chips": ["gfx7"], 1695 "map": {"at": 39288, "to": "mm"}, 1696 "name": "GB_TILE_MODE26", 1697 "type_ref": "GB_TILE_MODE0" 1698 }, 1699 { 1700 "chips": ["gfx7"], 1701 "map": {"at": 39292, "to": "mm"}, 1702 "name": "GB_TILE_MODE27", 1703 "type_ref": "GB_TILE_MODE0" 1704 }, 1705 { 1706 "chips": ["gfx7"], 1707 "map": {"at": 39296, "to": "mm"}, 1708 "name": "GB_TILE_MODE28", 1709 "type_ref": "GB_TILE_MODE0" 1710 }, 1711 { 1712 "chips": ["gfx7"], 1713 "map": {"at": 39300, "to": "mm"}, 1714 "name": "GB_TILE_MODE29", 1715 "type_ref": "GB_TILE_MODE0" 1716 }, 1717 { 1718 "chips": ["gfx7"], 1719 "map": {"at": 39304, "to": "mm"}, 1720 "name": "GB_TILE_MODE30", 1721 "type_ref": "GB_TILE_MODE0" 1722 }, 1723 { 1724 "chips": ["gfx7"], 1725 "map": {"at": 39308, "to": "mm"}, 1726 "name": "GB_TILE_MODE31", 1727 "type_ref": "GB_TILE_MODE0" 1728 }, 1729 { 1730 "chips": ["gfx7"], 1731 "map": {"at": 39312, "to": "mm"}, 1732 "name": "GB_MACROTILE_MODE0", 1733 "type_ref": "GB_MACROTILE_MODE0" 1734 }, 1735 { 1736 "chips": ["gfx7"], 1737 "map": {"at": 39316, "to": "mm"}, 1738 "name": "GB_MACROTILE_MODE1", 1739 "type_ref": "GB_MACROTILE_MODE0" 1740 }, 1741 { 1742 "chips": ["gfx7"], 1743 "map": {"at": 39320, "to": "mm"}, 1744 "name": "GB_MACROTILE_MODE2", 1745 "type_ref": "GB_MACROTILE_MODE0" 1746 }, 1747 { 1748 "chips": ["gfx7"], 1749 "map": {"at": 39324, "to": "mm"}, 1750 "name": "GB_MACROTILE_MODE3", 1751 "type_ref": "GB_MACROTILE_MODE0" 1752 }, 1753 { 1754 "chips": ["gfx7"], 1755 "map": {"at": 39328, "to": "mm"}, 1756 "name": "GB_MACROTILE_MODE4", 1757 "type_ref": "GB_MACROTILE_MODE0" 1758 }, 1759 { 1760 "chips": ["gfx7"], 1761 "map": {"at": 39332, "to": "mm"}, 1762 "name": "GB_MACROTILE_MODE5", 1763 "type_ref": "GB_MACROTILE_MODE0" 1764 }, 1765 { 1766 "chips": ["gfx7"], 1767 "map": {"at": 39336, "to": "mm"}, 1768 "name": "GB_MACROTILE_MODE6", 1769 "type_ref": "GB_MACROTILE_MODE0" 1770 }, 1771 { 1772 "chips": ["gfx7"], 1773 "map": {"at": 39340, "to": "mm"}, 1774 "name": "GB_MACROTILE_MODE7", 1775 "type_ref": "GB_MACROTILE_MODE0" 1776 }, 1777 { 1778 "chips": ["gfx7"], 1779 "map": {"at": 39344, "to": "mm"}, 1780 "name": "GB_MACROTILE_MODE8", 1781 "type_ref": "GB_MACROTILE_MODE0" 1782 }, 1783 { 1784 "chips": ["gfx7"], 1785 "map": {"at": 39348, "to": "mm"}, 1786 "name": "GB_MACROTILE_MODE9", 1787 "type_ref": "GB_MACROTILE_MODE0" 1788 }, 1789 { 1790 "chips": ["gfx7"], 1791 "map": {"at": 39352, "to": "mm"}, 1792 "name": "GB_MACROTILE_MODE10", 1793 "type_ref": "GB_MACROTILE_MODE0" 1794 }, 1795 { 1796 "chips": ["gfx7"], 1797 "map": {"at": 39356, "to": "mm"}, 1798 "name": "GB_MACROTILE_MODE11", 1799 "type_ref": "GB_MACROTILE_MODE0" 1800 }, 1801 { 1802 "chips": ["gfx7"], 1803 "map": {"at": 39360, "to": "mm"}, 1804 "name": "GB_MACROTILE_MODE12", 1805 "type_ref": "GB_MACROTILE_MODE0" 1806 }, 1807 { 1808 "chips": ["gfx7"], 1809 "map": {"at": 39364, "to": "mm"}, 1810 "name": "GB_MACROTILE_MODE13", 1811 "type_ref": "GB_MACROTILE_MODE0" 1812 }, 1813 { 1814 "chips": ["gfx7"], 1815 "map": {"at": 39368, "to": "mm"}, 1816 "name": "GB_MACROTILE_MODE14", 1817 "type_ref": "GB_MACROTILE_MODE0" 1818 }, 1819 { 1820 "chips": ["gfx7"], 1821 "map": {"at": 39372, "to": "mm"}, 1822 "name": "GB_MACROTILE_MODE15", 1823 "type_ref": "GB_MACROTILE_MODE0" 1824 }, 1825 { 1826 "chips": ["gfx7"], 1827 "map": {"at": 45056, "to": "mm"}, 1828 "name": "SPI_SHADER_TBA_LO_PS", 1829 "type_ref": "SPI_SHADER_TBA_LO_PS" 1830 }, 1831 { 1832 "chips": ["gfx7"], 1833 "map": {"at": 45060, "to": "mm"}, 1834 "name": "SPI_SHADER_TBA_HI_PS", 1835 "type_ref": "SPI_SHADER_TBA_HI_PS" 1836 }, 1837 { 1838 "chips": ["gfx7"], 1839 "map": {"at": 45064, "to": "mm"}, 1840 "name": "SPI_SHADER_TMA_LO_PS", 1841 "type_ref": "SPI_SHADER_TBA_LO_PS" 1842 }, 1843 { 1844 "chips": ["gfx7"], 1845 "map": {"at": 45068, "to": "mm"}, 1846 "name": "SPI_SHADER_TMA_HI_PS", 1847 "type_ref": "SPI_SHADER_TBA_HI_PS" 1848 }, 1849 { 1850 "chips": ["gfx7"], 1851 "map": {"at": 45084, "to": "mm"}, 1852 "name": "SPI_SHADER_PGM_RSRC3_PS", 1853 "type_ref": "SPI_SHADER_PGM_RSRC3_PS" 1854 }, 1855 { 1856 "chips": ["gfx7"], 1857 "map": {"at": 45088, "to": "mm"}, 1858 "name": "SPI_SHADER_PGM_LO_PS", 1859 "type_ref": "SPI_SHADER_TBA_LO_PS" 1860 }, 1861 { 1862 "chips": ["gfx7"], 1863 "map": {"at": 45092, "to": "mm"}, 1864 "name": "SPI_SHADER_PGM_HI_PS", 1865 "type_ref": "SPI_SHADER_TBA_HI_PS" 1866 }, 1867 { 1868 "chips": ["gfx7"], 1869 "map": {"at": 45096, "to": "mm"}, 1870 "name": "SPI_SHADER_PGM_RSRC1_PS", 1871 "type_ref": "SPI_SHADER_PGM_RSRC1_PS" 1872 }, 1873 { 1874 "chips": ["gfx7"], 1875 "map": {"at": 45100, "to": "mm"}, 1876 "name": "SPI_SHADER_PGM_RSRC2_PS", 1877 "type_ref": "SPI_SHADER_PGM_RSRC2_PS" 1878 }, 1879 { 1880 "chips": ["gfx7"], 1881 "map": {"at": 45104, "to": "mm"}, 1882 "name": "SPI_SHADER_USER_DATA_PS_0", 1883 "type_ref": "CP_APPEND_DATA" 1884 }, 1885 { 1886 "chips": ["gfx7"], 1887 "map": {"at": 45108, "to": "mm"}, 1888 "name": "SPI_SHADER_USER_DATA_PS_1", 1889 "type_ref": "CP_APPEND_DATA" 1890 }, 1891 { 1892 "chips": ["gfx7"], 1893 "map": {"at": 45112, "to": "mm"}, 1894 "name": "SPI_SHADER_USER_DATA_PS_2", 1895 "type_ref": "CP_APPEND_DATA" 1896 }, 1897 { 1898 "chips": ["gfx7"], 1899 "map": {"at": 45116, "to": "mm"}, 1900 "name": "SPI_SHADER_USER_DATA_PS_3", 1901 "type_ref": "CP_APPEND_DATA" 1902 }, 1903 { 1904 "chips": ["gfx7"], 1905 "map": {"at": 45120, "to": "mm"}, 1906 "name": "SPI_SHADER_USER_DATA_PS_4", 1907 "type_ref": "CP_APPEND_DATA" 1908 }, 1909 { 1910 "chips": ["gfx7"], 1911 "map": {"at": 45124, "to": "mm"}, 1912 "name": "SPI_SHADER_USER_DATA_PS_5", 1913 "type_ref": "CP_APPEND_DATA" 1914 }, 1915 { 1916 "chips": ["gfx7"], 1917 "map": {"at": 45128, "to": "mm"}, 1918 "name": "SPI_SHADER_USER_DATA_PS_6", 1919 "type_ref": "CP_APPEND_DATA" 1920 }, 1921 { 1922 "chips": ["gfx7"], 1923 "map": {"at": 45132, "to": "mm"}, 1924 "name": "SPI_SHADER_USER_DATA_PS_7", 1925 "type_ref": "CP_APPEND_DATA" 1926 }, 1927 { 1928 "chips": ["gfx7"], 1929 "map": {"at": 45136, "to": "mm"}, 1930 "name": "SPI_SHADER_USER_DATA_PS_8", 1931 "type_ref": "CP_APPEND_DATA" 1932 }, 1933 { 1934 "chips": ["gfx7"], 1935 "map": {"at": 45140, "to": "mm"}, 1936 "name": "SPI_SHADER_USER_DATA_PS_9", 1937 "type_ref": "CP_APPEND_DATA" 1938 }, 1939 { 1940 "chips": ["gfx7"], 1941 "map": {"at": 45144, "to": "mm"}, 1942 "name": "SPI_SHADER_USER_DATA_PS_10", 1943 "type_ref": "CP_APPEND_DATA" 1944 }, 1945 { 1946 "chips": ["gfx7"], 1947 "map": {"at": 45148, "to": "mm"}, 1948 "name": "SPI_SHADER_USER_DATA_PS_11", 1949 "type_ref": "CP_APPEND_DATA" 1950 }, 1951 { 1952 "chips": ["gfx7"], 1953 "map": {"at": 45152, "to": "mm"}, 1954 "name": "SPI_SHADER_USER_DATA_PS_12", 1955 "type_ref": "CP_APPEND_DATA" 1956 }, 1957 { 1958 "chips": ["gfx7"], 1959 "map": {"at": 45156, "to": "mm"}, 1960 "name": "SPI_SHADER_USER_DATA_PS_13", 1961 "type_ref": "CP_APPEND_DATA" 1962 }, 1963 { 1964 "chips": ["gfx7"], 1965 "map": {"at": 45160, "to": "mm"}, 1966 "name": "SPI_SHADER_USER_DATA_PS_14", 1967 "type_ref": "CP_APPEND_DATA" 1968 }, 1969 { 1970 "chips": ["gfx7"], 1971 "map": {"at": 45164, "to": "mm"}, 1972 "name": "SPI_SHADER_USER_DATA_PS_15", 1973 "type_ref": "CP_APPEND_DATA" 1974 }, 1975 { 1976 "chips": ["gfx7"], 1977 "map": {"at": 45312, "to": "mm"}, 1978 "name": "SPI_SHADER_TBA_LO_VS", 1979 "type_ref": "SPI_SHADER_TBA_LO_PS" 1980 }, 1981 { 1982 "chips": ["gfx7"], 1983 "map": {"at": 45316, "to": "mm"}, 1984 "name": "SPI_SHADER_TBA_HI_VS", 1985 "type_ref": "SPI_SHADER_TBA_HI_PS" 1986 }, 1987 { 1988 "chips": ["gfx7"], 1989 "map": {"at": 45320, "to": "mm"}, 1990 "name": "SPI_SHADER_TMA_LO_VS", 1991 "type_ref": "SPI_SHADER_TBA_LO_PS" 1992 }, 1993 { 1994 "chips": ["gfx7"], 1995 "map": {"at": 45324, "to": "mm"}, 1996 "name": "SPI_SHADER_TMA_HI_VS", 1997 "type_ref": "SPI_SHADER_TBA_HI_PS" 1998 }, 1999 { 2000 "chips": ["gfx7"], 2001 "map": {"at": 45336, "to": "mm"}, 2002 "name": "SPI_SHADER_PGM_RSRC3_VS", 2003 "type_ref": "SPI_SHADER_PGM_RSRC3_PS" 2004 }, 2005 { 2006 "chips": ["gfx7"], 2007 "map": {"at": 45340, "to": "mm"}, 2008 "name": "SPI_SHADER_LATE_ALLOC_VS", 2009 "type_ref": "SPI_SHADER_LATE_ALLOC_VS" 2010 }, 2011 { 2012 "chips": ["gfx7"], 2013 "map": {"at": 45344, "to": "mm"}, 2014 "name": "SPI_SHADER_PGM_LO_VS", 2015 "type_ref": "SPI_SHADER_TBA_LO_PS" 2016 }, 2017 { 2018 "chips": ["gfx7"], 2019 "map": {"at": 45348, "to": "mm"}, 2020 "name": "SPI_SHADER_PGM_HI_VS", 2021 "type_ref": "SPI_SHADER_TBA_HI_PS" 2022 }, 2023 { 2024 "chips": ["gfx7"], 2025 "map": {"at": 45352, "to": "mm"}, 2026 "name": "SPI_SHADER_PGM_RSRC1_VS", 2027 "type_ref": "SPI_SHADER_PGM_RSRC1_VS" 2028 }, 2029 { 2030 "chips": ["gfx7"], 2031 "map": {"at": 45356, "to": "mm"}, 2032 "name": "SPI_SHADER_PGM_RSRC2_VS", 2033 "type_ref": "SPI_SHADER_PGM_RSRC2_VS" 2034 }, 2035 { 2036 "chips": ["gfx7"], 2037 "map": {"at": 45360, "to": "mm"}, 2038 "name": "SPI_SHADER_USER_DATA_VS_0", 2039 "type_ref": "CP_APPEND_DATA" 2040 }, 2041 { 2042 "chips": ["gfx7"], 2043 "map": {"at": 45364, "to": "mm"}, 2044 "name": "SPI_SHADER_USER_DATA_VS_1", 2045 "type_ref": "CP_APPEND_DATA" 2046 }, 2047 { 2048 "chips": ["gfx7"], 2049 "map": {"at": 45368, "to": "mm"}, 2050 "name": "SPI_SHADER_USER_DATA_VS_2", 2051 "type_ref": "CP_APPEND_DATA" 2052 }, 2053 { 2054 "chips": ["gfx7"], 2055 "map": {"at": 45372, "to": "mm"}, 2056 "name": "SPI_SHADER_USER_DATA_VS_3", 2057 "type_ref": "CP_APPEND_DATA" 2058 }, 2059 { 2060 "chips": ["gfx7"], 2061 "map": {"at": 45376, "to": "mm"}, 2062 "name": "SPI_SHADER_USER_DATA_VS_4", 2063 "type_ref": "CP_APPEND_DATA" 2064 }, 2065 { 2066 "chips": ["gfx7"], 2067 "map": {"at": 45380, "to": "mm"}, 2068 "name": "SPI_SHADER_USER_DATA_VS_5", 2069 "type_ref": "CP_APPEND_DATA" 2070 }, 2071 { 2072 "chips": ["gfx7"], 2073 "map": {"at": 45384, "to": "mm"}, 2074 "name": "SPI_SHADER_USER_DATA_VS_6", 2075 "type_ref": "CP_APPEND_DATA" 2076 }, 2077 { 2078 "chips": ["gfx7"], 2079 "map": {"at": 45388, "to": "mm"}, 2080 "name": "SPI_SHADER_USER_DATA_VS_7", 2081 "type_ref": "CP_APPEND_DATA" 2082 }, 2083 { 2084 "chips": ["gfx7"], 2085 "map": {"at": 45392, "to": "mm"}, 2086 "name": "SPI_SHADER_USER_DATA_VS_8", 2087 "type_ref": "CP_APPEND_DATA" 2088 }, 2089 { 2090 "chips": ["gfx7"], 2091 "map": {"at": 45396, "to": "mm"}, 2092 "name": "SPI_SHADER_USER_DATA_VS_9", 2093 "type_ref": "CP_APPEND_DATA" 2094 }, 2095 { 2096 "chips": ["gfx7"], 2097 "map": {"at": 45400, "to": "mm"}, 2098 "name": "SPI_SHADER_USER_DATA_VS_10", 2099 "type_ref": "CP_APPEND_DATA" 2100 }, 2101 { 2102 "chips": ["gfx7"], 2103 "map": {"at": 45404, "to": "mm"}, 2104 "name": "SPI_SHADER_USER_DATA_VS_11", 2105 "type_ref": "CP_APPEND_DATA" 2106 }, 2107 { 2108 "chips": ["gfx7"], 2109 "map": {"at": 45408, "to": "mm"}, 2110 "name": "SPI_SHADER_USER_DATA_VS_12", 2111 "type_ref": "CP_APPEND_DATA" 2112 }, 2113 { 2114 "chips": ["gfx7"], 2115 "map": {"at": 45412, "to": "mm"}, 2116 "name": "SPI_SHADER_USER_DATA_VS_13", 2117 "type_ref": "CP_APPEND_DATA" 2118 }, 2119 { 2120 "chips": ["gfx7"], 2121 "map": {"at": 45416, "to": "mm"}, 2122 "name": "SPI_SHADER_USER_DATA_VS_14", 2123 "type_ref": "CP_APPEND_DATA" 2124 }, 2125 { 2126 "chips": ["gfx7"], 2127 "map": {"at": 45420, "to": "mm"}, 2128 "name": "SPI_SHADER_USER_DATA_VS_15", 2129 "type_ref": "CP_APPEND_DATA" 2130 }, 2131 { 2132 "chips": ["gfx7"], 2133 "map": {"at": 45552, "to": "mm"}, 2134 "name": "SPI_SHADER_PGM_RSRC2_ES_VS", 2135 "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS" 2136 }, 2137 { 2138 "chips": ["gfx7"], 2139 "map": {"at": 45556, "to": "mm"}, 2140 "name": "SPI_SHADER_PGM_RSRC2_LS_VS", 2141 "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS" 2142 }, 2143 { 2144 "chips": ["gfx7"], 2145 "map": {"at": 45568, "to": "mm"}, 2146 "name": "SPI_SHADER_TBA_LO_GS", 2147 "type_ref": "SPI_SHADER_TBA_LO_PS" 2148 }, 2149 { 2150 "chips": ["gfx7"], 2151 "map": {"at": 45572, "to": "mm"}, 2152 "name": "SPI_SHADER_TBA_HI_GS", 2153 "type_ref": "SPI_SHADER_TBA_HI_PS" 2154 }, 2155 { 2156 "chips": ["gfx7"], 2157 "map": {"at": 45576, "to": "mm"}, 2158 "name": "SPI_SHADER_TMA_LO_GS", 2159 "type_ref": "SPI_SHADER_TBA_LO_PS" 2160 }, 2161 { 2162 "chips": ["gfx7"], 2163 "map": {"at": 45580, "to": "mm"}, 2164 "name": "SPI_SHADER_TMA_HI_GS", 2165 "type_ref": "SPI_SHADER_TBA_HI_PS" 2166 }, 2167 { 2168 "chips": ["gfx7"], 2169 "map": {"at": 45596, "to": "mm"}, 2170 "name": "SPI_SHADER_PGM_RSRC3_GS", 2171 "type_ref": "SPI_SHADER_PGM_RSRC3_PS" 2172 }, 2173 { 2174 "chips": ["gfx7"], 2175 "map": {"at": 45600, "to": "mm"}, 2176 "name": "SPI_SHADER_PGM_LO_GS", 2177 "type_ref": "SPI_SHADER_TBA_LO_PS" 2178 }, 2179 { 2180 "chips": ["gfx7"], 2181 "map": {"at": 45604, "to": "mm"}, 2182 "name": "SPI_SHADER_PGM_HI_GS", 2183 "type_ref": "SPI_SHADER_TBA_HI_PS" 2184 }, 2185 { 2186 "chips": ["gfx7"], 2187 "map": {"at": 45608, "to": "mm"}, 2188 "name": "SPI_SHADER_PGM_RSRC1_GS", 2189 "type_ref": "SPI_SHADER_PGM_RSRC1_GS" 2190 }, 2191 { 2192 "chips": ["gfx7"], 2193 "map": {"at": 45612, "to": "mm"}, 2194 "name": "SPI_SHADER_PGM_RSRC2_GS", 2195 "type_ref": "SPI_SHADER_PGM_RSRC2_GS" 2196 }, 2197 { 2198 "chips": ["gfx7"], 2199 "map": {"at": 45616, "to": "mm"}, 2200 "name": "SPI_SHADER_USER_DATA_GS_0", 2201 "type_ref": "CP_APPEND_DATA" 2202 }, 2203 { 2204 "chips": ["gfx7"], 2205 "map": {"at": 45620, "to": "mm"}, 2206 "name": "SPI_SHADER_USER_DATA_GS_1", 2207 "type_ref": "CP_APPEND_DATA" 2208 }, 2209 { 2210 "chips": ["gfx7"], 2211 "map": {"at": 45624, "to": "mm"}, 2212 "name": "SPI_SHADER_USER_DATA_GS_2", 2213 "type_ref": "CP_APPEND_DATA" 2214 }, 2215 { 2216 "chips": ["gfx7"], 2217 "map": {"at": 45628, "to": "mm"}, 2218 "name": "SPI_SHADER_USER_DATA_GS_3", 2219 "type_ref": "CP_APPEND_DATA" 2220 }, 2221 { 2222 "chips": ["gfx7"], 2223 "map": {"at": 45632, "to": "mm"}, 2224 "name": "SPI_SHADER_USER_DATA_GS_4", 2225 "type_ref": "CP_APPEND_DATA" 2226 }, 2227 { 2228 "chips": ["gfx7"], 2229 "map": {"at": 45636, "to": "mm"}, 2230 "name": "SPI_SHADER_USER_DATA_GS_5", 2231 "type_ref": "CP_APPEND_DATA" 2232 }, 2233 { 2234 "chips": ["gfx7"], 2235 "map": {"at": 45640, "to": "mm"}, 2236 "name": "SPI_SHADER_USER_DATA_GS_6", 2237 "type_ref": "CP_APPEND_DATA" 2238 }, 2239 { 2240 "chips": ["gfx7"], 2241 "map": {"at": 45644, "to": "mm"}, 2242 "name": "SPI_SHADER_USER_DATA_GS_7", 2243 "type_ref": "CP_APPEND_DATA" 2244 }, 2245 { 2246 "chips": ["gfx7"], 2247 "map": {"at": 45648, "to": "mm"}, 2248 "name": "SPI_SHADER_USER_DATA_GS_8", 2249 "type_ref": "CP_APPEND_DATA" 2250 }, 2251 { 2252 "chips": ["gfx7"], 2253 "map": {"at": 45652, "to": "mm"}, 2254 "name": "SPI_SHADER_USER_DATA_GS_9", 2255 "type_ref": "CP_APPEND_DATA" 2256 }, 2257 { 2258 "chips": ["gfx7"], 2259 "map": {"at": 45656, "to": "mm"}, 2260 "name": "SPI_SHADER_USER_DATA_GS_10", 2261 "type_ref": "CP_APPEND_DATA" 2262 }, 2263 { 2264 "chips": ["gfx7"], 2265 "map": {"at": 45660, "to": "mm"}, 2266 "name": "SPI_SHADER_USER_DATA_GS_11", 2267 "type_ref": "CP_APPEND_DATA" 2268 }, 2269 { 2270 "chips": ["gfx7"], 2271 "map": {"at": 45664, "to": "mm"}, 2272 "name": "SPI_SHADER_USER_DATA_GS_12", 2273 "type_ref": "CP_APPEND_DATA" 2274 }, 2275 { 2276 "chips": ["gfx7"], 2277 "map": {"at": 45668, "to": "mm"}, 2278 "name": "SPI_SHADER_USER_DATA_GS_13", 2279 "type_ref": "CP_APPEND_DATA" 2280 }, 2281 { 2282 "chips": ["gfx7"], 2283 "map": {"at": 45672, "to": "mm"}, 2284 "name": "SPI_SHADER_USER_DATA_GS_14", 2285 "type_ref": "CP_APPEND_DATA" 2286 }, 2287 { 2288 "chips": ["gfx7"], 2289 "map": {"at": 45676, "to": "mm"}, 2290 "name": "SPI_SHADER_USER_DATA_GS_15", 2291 "type_ref": "CP_APPEND_DATA" 2292 }, 2293 { 2294 "chips": ["gfx7"], 2295 "map": {"at": 45808, "to": "mm"}, 2296 "name": "SPI_SHADER_PGM_RSRC2_ES_GS", 2297 "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS" 2298 }, 2299 { 2300 "chips": ["gfx7"], 2301 "map": {"at": 45824, "to": "mm"}, 2302 "name": "SPI_SHADER_TBA_LO_ES", 2303 "type_ref": "SPI_SHADER_TBA_LO_PS" 2304 }, 2305 { 2306 "chips": ["gfx7"], 2307 "map": {"at": 45828, "to": "mm"}, 2308 "name": "SPI_SHADER_TBA_HI_ES", 2309 "type_ref": "SPI_SHADER_TBA_HI_PS" 2310 }, 2311 { 2312 "chips": ["gfx7"], 2313 "map": {"at": 45832, "to": "mm"}, 2314 "name": "SPI_SHADER_TMA_LO_ES", 2315 "type_ref": "SPI_SHADER_TBA_LO_PS" 2316 }, 2317 { 2318 "chips": ["gfx7"], 2319 "map": {"at": 45836, "to": "mm"}, 2320 "name": "SPI_SHADER_TMA_HI_ES", 2321 "type_ref": "SPI_SHADER_TBA_HI_PS" 2322 }, 2323 { 2324 "chips": ["gfx7"], 2325 "map": {"at": 45852, "to": "mm"}, 2326 "name": "SPI_SHADER_PGM_RSRC3_ES", 2327 "type_ref": "SPI_SHADER_PGM_RSRC3_PS" 2328 }, 2329 { 2330 "chips": ["gfx7"], 2331 "map": {"at": 45856, "to": "mm"}, 2332 "name": "SPI_SHADER_PGM_LO_ES", 2333 "type_ref": "SPI_SHADER_TBA_LO_PS" 2334 }, 2335 { 2336 "chips": ["gfx7"], 2337 "map": {"at": 45860, "to": "mm"}, 2338 "name": "SPI_SHADER_PGM_HI_ES", 2339 "type_ref": "SPI_SHADER_TBA_HI_PS" 2340 }, 2341 { 2342 "chips": ["gfx7"], 2343 "map": {"at": 45864, "to": "mm"}, 2344 "name": "SPI_SHADER_PGM_RSRC1_ES", 2345 "type_ref": "SPI_SHADER_PGM_RSRC1_VS" 2346 }, 2347 { 2348 "chips": ["gfx7"], 2349 "map": {"at": 45868, "to": "mm"}, 2350 "name": "SPI_SHADER_PGM_RSRC2_ES", 2351 "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS" 2352 }, 2353 { 2354 "chips": ["gfx7"], 2355 "map": {"at": 45872, "to": "mm"}, 2356 "name": "SPI_SHADER_USER_DATA_ES_0", 2357 "type_ref": "CP_APPEND_DATA" 2358 }, 2359 { 2360 "chips": ["gfx7"], 2361 "map": {"at": 45876, "to": "mm"}, 2362 "name": "SPI_SHADER_USER_DATA_ES_1", 2363 "type_ref": "CP_APPEND_DATA" 2364 }, 2365 { 2366 "chips": ["gfx7"], 2367 "map": {"at": 45880, "to": "mm"}, 2368 "name": "SPI_SHADER_USER_DATA_ES_2", 2369 "type_ref": "CP_APPEND_DATA" 2370 }, 2371 { 2372 "chips": ["gfx7"], 2373 "map": {"at": 45884, "to": "mm"}, 2374 "name": "SPI_SHADER_USER_DATA_ES_3", 2375 "type_ref": "CP_APPEND_DATA" 2376 }, 2377 { 2378 "chips": ["gfx7"], 2379 "map": {"at": 45888, "to": "mm"}, 2380 "name": "SPI_SHADER_USER_DATA_ES_4", 2381 "type_ref": "CP_APPEND_DATA" 2382 }, 2383 { 2384 "chips": ["gfx7"], 2385 "map": {"at": 45892, "to": "mm"}, 2386 "name": "SPI_SHADER_USER_DATA_ES_5", 2387 "type_ref": "CP_APPEND_DATA" 2388 }, 2389 { 2390 "chips": ["gfx7"], 2391 "map": {"at": 45896, "to": "mm"}, 2392 "name": "SPI_SHADER_USER_DATA_ES_6", 2393 "type_ref": "CP_APPEND_DATA" 2394 }, 2395 { 2396 "chips": ["gfx7"], 2397 "map": {"at": 45900, "to": "mm"}, 2398 "name": "SPI_SHADER_USER_DATA_ES_7", 2399 "type_ref": "CP_APPEND_DATA" 2400 }, 2401 { 2402 "chips": ["gfx7"], 2403 "map": {"at": 45904, "to": "mm"}, 2404 "name": "SPI_SHADER_USER_DATA_ES_8", 2405 "type_ref": "CP_APPEND_DATA" 2406 }, 2407 { 2408 "chips": ["gfx7"], 2409 "map": {"at": 45908, "to": "mm"}, 2410 "name": "SPI_SHADER_USER_DATA_ES_9", 2411 "type_ref": "CP_APPEND_DATA" 2412 }, 2413 { 2414 "chips": ["gfx7"], 2415 "map": {"at": 45912, "to": "mm"}, 2416 "name": "SPI_SHADER_USER_DATA_ES_10", 2417 "type_ref": "CP_APPEND_DATA" 2418 }, 2419 { 2420 "chips": ["gfx7"], 2421 "map": {"at": 45916, "to": "mm"}, 2422 "name": "SPI_SHADER_USER_DATA_ES_11", 2423 "type_ref": "CP_APPEND_DATA" 2424 }, 2425 { 2426 "chips": ["gfx7"], 2427 "map": {"at": 45920, "to": "mm"}, 2428 "name": "SPI_SHADER_USER_DATA_ES_12", 2429 "type_ref": "CP_APPEND_DATA" 2430 }, 2431 { 2432 "chips": ["gfx7"], 2433 "map": {"at": 45924, "to": "mm"}, 2434 "name": "SPI_SHADER_USER_DATA_ES_13", 2435 "type_ref": "CP_APPEND_DATA" 2436 }, 2437 { 2438 "chips": ["gfx7"], 2439 "map": {"at": 45928, "to": "mm"}, 2440 "name": "SPI_SHADER_USER_DATA_ES_14", 2441 "type_ref": "CP_APPEND_DATA" 2442 }, 2443 { 2444 "chips": ["gfx7"], 2445 "map": {"at": 45932, "to": "mm"}, 2446 "name": "SPI_SHADER_USER_DATA_ES_15", 2447 "type_ref": "CP_APPEND_DATA" 2448 }, 2449 { 2450 "chips": ["gfx7"], 2451 "map": {"at": 46068, "to": "mm"}, 2452 "name": "SPI_SHADER_PGM_RSRC2_LS_ES", 2453 "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS" 2454 }, 2455 { 2456 "chips": ["gfx7"], 2457 "map": {"at": 46080, "to": "mm"}, 2458 "name": "SPI_SHADER_TBA_LO_HS", 2459 "type_ref": "SPI_SHADER_TBA_LO_PS" 2460 }, 2461 { 2462 "chips": ["gfx7"], 2463 "map": {"at": 46084, "to": "mm"}, 2464 "name": "SPI_SHADER_TBA_HI_HS", 2465 "type_ref": "SPI_SHADER_TBA_HI_PS" 2466 }, 2467 { 2468 "chips": ["gfx7"], 2469 "map": {"at": 46088, "to": "mm"}, 2470 "name": "SPI_SHADER_TMA_LO_HS", 2471 "type_ref": "SPI_SHADER_TBA_LO_PS" 2472 }, 2473 { 2474 "chips": ["gfx7"], 2475 "map": {"at": 46092, "to": "mm"}, 2476 "name": "SPI_SHADER_TMA_HI_HS", 2477 "type_ref": "SPI_SHADER_TBA_HI_PS" 2478 }, 2479 { 2480 "chips": ["gfx7"], 2481 "map": {"at": 46108, "to": "mm"}, 2482 "name": "SPI_SHADER_PGM_RSRC3_HS", 2483 "type_ref": "SPI_SHADER_PGM_RSRC3_HS" 2484 }, 2485 { 2486 "chips": ["gfx7"], 2487 "map": {"at": 46112, "to": "mm"}, 2488 "name": "SPI_SHADER_PGM_LO_HS", 2489 "type_ref": "SPI_SHADER_TBA_LO_PS" 2490 }, 2491 { 2492 "chips": ["gfx7"], 2493 "map": {"at": 46116, "to": "mm"}, 2494 "name": "SPI_SHADER_PGM_HI_HS", 2495 "type_ref": "SPI_SHADER_TBA_HI_PS" 2496 }, 2497 { 2498 "chips": ["gfx7"], 2499 "map": {"at": 46120, "to": "mm"}, 2500 "name": "SPI_SHADER_PGM_RSRC1_HS", 2501 "type_ref": "SPI_SHADER_PGM_RSRC1_HS" 2502 }, 2503 { 2504 "chips": ["gfx7"], 2505 "map": {"at": 46124, "to": "mm"}, 2506 "name": "SPI_SHADER_PGM_RSRC2_HS", 2507 "type_ref": "SPI_SHADER_PGM_RSRC2_HS" 2508 }, 2509 { 2510 "chips": ["gfx7"], 2511 "map": {"at": 46128, "to": "mm"}, 2512 "name": "SPI_SHADER_USER_DATA_HS_0", 2513 "type_ref": "CP_APPEND_DATA" 2514 }, 2515 { 2516 "chips": ["gfx7"], 2517 "map": {"at": 46132, "to": "mm"}, 2518 "name": "SPI_SHADER_USER_DATA_HS_1", 2519 "type_ref": "CP_APPEND_DATA" 2520 }, 2521 { 2522 "chips": ["gfx7"], 2523 "map": {"at": 46136, "to": "mm"}, 2524 "name": "SPI_SHADER_USER_DATA_HS_2", 2525 "type_ref": "CP_APPEND_DATA" 2526 }, 2527 { 2528 "chips": ["gfx7"], 2529 "map": {"at": 46140, "to": "mm"}, 2530 "name": "SPI_SHADER_USER_DATA_HS_3", 2531 "type_ref": "CP_APPEND_DATA" 2532 }, 2533 { 2534 "chips": ["gfx7"], 2535 "map": {"at": 46144, "to": "mm"}, 2536 "name": "SPI_SHADER_USER_DATA_HS_4", 2537 "type_ref": "CP_APPEND_DATA" 2538 }, 2539 { 2540 "chips": ["gfx7"], 2541 "map": {"at": 46148, "to": "mm"}, 2542 "name": "SPI_SHADER_USER_DATA_HS_5", 2543 "type_ref": "CP_APPEND_DATA" 2544 }, 2545 { 2546 "chips": ["gfx7"], 2547 "map": {"at": 46152, "to": "mm"}, 2548 "name": "SPI_SHADER_USER_DATA_HS_6", 2549 "type_ref": "CP_APPEND_DATA" 2550 }, 2551 { 2552 "chips": ["gfx7"], 2553 "map": {"at": 46156, "to": "mm"}, 2554 "name": "SPI_SHADER_USER_DATA_HS_7", 2555 "type_ref": "CP_APPEND_DATA" 2556 }, 2557 { 2558 "chips": ["gfx7"], 2559 "map": {"at": 46160, "to": "mm"}, 2560 "name": "SPI_SHADER_USER_DATA_HS_8", 2561 "type_ref": "CP_APPEND_DATA" 2562 }, 2563 { 2564 "chips": ["gfx7"], 2565 "map": {"at": 46164, "to": "mm"}, 2566 "name": "SPI_SHADER_USER_DATA_HS_9", 2567 "type_ref": "CP_APPEND_DATA" 2568 }, 2569 { 2570 "chips": ["gfx7"], 2571 "map": {"at": 46168, "to": "mm"}, 2572 "name": "SPI_SHADER_USER_DATA_HS_10", 2573 "type_ref": "CP_APPEND_DATA" 2574 }, 2575 { 2576 "chips": ["gfx7"], 2577 "map": {"at": 46172, "to": "mm"}, 2578 "name": "SPI_SHADER_USER_DATA_HS_11", 2579 "type_ref": "CP_APPEND_DATA" 2580 }, 2581 { 2582 "chips": ["gfx7"], 2583 "map": {"at": 46176, "to": "mm"}, 2584 "name": "SPI_SHADER_USER_DATA_HS_12", 2585 "type_ref": "CP_APPEND_DATA" 2586 }, 2587 { 2588 "chips": ["gfx7"], 2589 "map": {"at": 46180, "to": "mm"}, 2590 "name": "SPI_SHADER_USER_DATA_HS_13", 2591 "type_ref": "CP_APPEND_DATA" 2592 }, 2593 { 2594 "chips": ["gfx7"], 2595 "map": {"at": 46184, "to": "mm"}, 2596 "name": "SPI_SHADER_USER_DATA_HS_14", 2597 "type_ref": "CP_APPEND_DATA" 2598 }, 2599 { 2600 "chips": ["gfx7"], 2601 "map": {"at": 46188, "to": "mm"}, 2602 "name": "SPI_SHADER_USER_DATA_HS_15", 2603 "type_ref": "CP_APPEND_DATA" 2604 }, 2605 { 2606 "chips": ["gfx7"], 2607 "map": {"at": 46324, "to": "mm"}, 2608 "name": "SPI_SHADER_PGM_RSRC2_LS_HS", 2609 "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS" 2610 }, 2611 { 2612 "chips": ["gfx7"], 2613 "map": {"at": 46336, "to": "mm"}, 2614 "name": "SPI_SHADER_TBA_LO_LS", 2615 "type_ref": "SPI_SHADER_TBA_LO_PS" 2616 }, 2617 { 2618 "chips": ["gfx7"], 2619 "map": {"at": 46340, "to": "mm"}, 2620 "name": "SPI_SHADER_TBA_HI_LS", 2621 "type_ref": "SPI_SHADER_TBA_HI_PS" 2622 }, 2623 { 2624 "chips": ["gfx7"], 2625 "map": {"at": 46344, "to": "mm"}, 2626 "name": "SPI_SHADER_TMA_LO_LS", 2627 "type_ref": "SPI_SHADER_TBA_LO_PS" 2628 }, 2629 { 2630 "chips": ["gfx7"], 2631 "map": {"at": 46348, "to": "mm"}, 2632 "name": "SPI_SHADER_TMA_HI_LS", 2633 "type_ref": "SPI_SHADER_TBA_HI_PS" 2634 }, 2635 { 2636 "chips": ["gfx7"], 2637 "map": {"at": 46364, "to": "mm"}, 2638 "name": "SPI_SHADER_PGM_RSRC3_LS", 2639 "type_ref": "SPI_SHADER_PGM_RSRC3_PS" 2640 }, 2641 { 2642 "chips": ["gfx7"], 2643 "map": {"at": 46368, "to": "mm"}, 2644 "name": "SPI_SHADER_PGM_LO_LS", 2645 "type_ref": "SPI_SHADER_TBA_LO_PS" 2646 }, 2647 { 2648 "chips": ["gfx7"], 2649 "map": {"at": 46372, "to": "mm"}, 2650 "name": "SPI_SHADER_PGM_HI_LS", 2651 "type_ref": "SPI_SHADER_TBA_HI_PS" 2652 }, 2653 { 2654 "chips": ["gfx7"], 2655 "map": {"at": 46376, "to": "mm"}, 2656 "name": "SPI_SHADER_PGM_RSRC1_LS", 2657 "type_ref": "SPI_SHADER_PGM_RSRC1_LS" 2658 }, 2659 { 2660 "chips": ["gfx7"], 2661 "map": {"at": 46380, "to": "mm"}, 2662 "name": "SPI_SHADER_PGM_RSRC2_LS", 2663 "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS" 2664 }, 2665 { 2666 "chips": ["gfx7"], 2667 "map": {"at": 46384, "to": "mm"}, 2668 "name": "SPI_SHADER_USER_DATA_LS_0", 2669 "type_ref": "CP_APPEND_DATA" 2670 }, 2671 { 2672 "chips": ["gfx7"], 2673 "map": {"at": 46388, "to": "mm"}, 2674 "name": "SPI_SHADER_USER_DATA_LS_1", 2675 "type_ref": "CP_APPEND_DATA" 2676 }, 2677 { 2678 "chips": ["gfx7"], 2679 "map": {"at": 46392, "to": "mm"}, 2680 "name": "SPI_SHADER_USER_DATA_LS_2", 2681 "type_ref": "CP_APPEND_DATA" 2682 }, 2683 { 2684 "chips": ["gfx7"], 2685 "map": {"at": 46396, "to": "mm"}, 2686 "name": "SPI_SHADER_USER_DATA_LS_3", 2687 "type_ref": "CP_APPEND_DATA" 2688 }, 2689 { 2690 "chips": ["gfx7"], 2691 "map": {"at": 46400, "to": "mm"}, 2692 "name": "SPI_SHADER_USER_DATA_LS_4", 2693 "type_ref": "CP_APPEND_DATA" 2694 }, 2695 { 2696 "chips": ["gfx7"], 2697 "map": {"at": 46404, "to": "mm"}, 2698 "name": "SPI_SHADER_USER_DATA_LS_5", 2699 "type_ref": "CP_APPEND_DATA" 2700 }, 2701 { 2702 "chips": ["gfx7"], 2703 "map": {"at": 46408, "to": "mm"}, 2704 "name": "SPI_SHADER_USER_DATA_LS_6", 2705 "type_ref": "CP_APPEND_DATA" 2706 }, 2707 { 2708 "chips": ["gfx7"], 2709 "map": {"at": 46412, "to": "mm"}, 2710 "name": "SPI_SHADER_USER_DATA_LS_7", 2711 "type_ref": "CP_APPEND_DATA" 2712 }, 2713 { 2714 "chips": ["gfx7"], 2715 "map": {"at": 46416, "to": "mm"}, 2716 "name": "SPI_SHADER_USER_DATA_LS_8", 2717 "type_ref": "CP_APPEND_DATA" 2718 }, 2719 { 2720 "chips": ["gfx7"], 2721 "map": {"at": 46420, "to": "mm"}, 2722 "name": "SPI_SHADER_USER_DATA_LS_9", 2723 "type_ref": "CP_APPEND_DATA" 2724 }, 2725 { 2726 "chips": ["gfx7"], 2727 "map": {"at": 46424, "to": "mm"}, 2728 "name": "SPI_SHADER_USER_DATA_LS_10", 2729 "type_ref": "CP_APPEND_DATA" 2730 }, 2731 { 2732 "chips": ["gfx7"], 2733 "map": {"at": 46428, "to": "mm"}, 2734 "name": "SPI_SHADER_USER_DATA_LS_11", 2735 "type_ref": "CP_APPEND_DATA" 2736 }, 2737 { 2738 "chips": ["gfx7"], 2739 "map": {"at": 46432, "to": "mm"}, 2740 "name": "SPI_SHADER_USER_DATA_LS_12", 2741 "type_ref": "CP_APPEND_DATA" 2742 }, 2743 { 2744 "chips": ["gfx7"], 2745 "map": {"at": 46436, "to": "mm"}, 2746 "name": "SPI_SHADER_USER_DATA_LS_13", 2747 "type_ref": "CP_APPEND_DATA" 2748 }, 2749 { 2750 "chips": ["gfx7"], 2751 "map": {"at": 46440, "to": "mm"}, 2752 "name": "SPI_SHADER_USER_DATA_LS_14", 2753 "type_ref": "CP_APPEND_DATA" 2754 }, 2755 { 2756 "chips": ["gfx7"], 2757 "map": {"at": 46444, "to": "mm"}, 2758 "name": "SPI_SHADER_USER_DATA_LS_15", 2759 "type_ref": "CP_APPEND_DATA" 2760 }, 2761 { 2762 "chips": ["gfx7"], 2763 "map": {"at": 47104, "to": "mm"}, 2764 "name": "COMPUTE_DISPATCH_INITIATOR", 2765 "type_ref": "COMPUTE_DISPATCH_INITIATOR" 2766 }, 2767 { 2768 "chips": ["gfx7"], 2769 "map": {"at": 47108, "to": "mm"}, 2770 "name": "COMPUTE_DIM_X", 2771 "type_ref": "COMPUTE_DIM_X" 2772 }, 2773 { 2774 "chips": ["gfx7"], 2775 "map": {"at": 47112, "to": "mm"}, 2776 "name": "COMPUTE_DIM_Y", 2777 "type_ref": "COMPUTE_DIM_X" 2778 }, 2779 { 2780 "chips": ["gfx7"], 2781 "map": {"at": 47116, "to": "mm"}, 2782 "name": "COMPUTE_DIM_Z", 2783 "type_ref": "COMPUTE_DIM_X" 2784 }, 2785 { 2786 "chips": ["gfx7"], 2787 "map": {"at": 47120, "to": "mm"}, 2788 "name": "COMPUTE_START_X", 2789 "type_ref": "COMPUTE_START_X" 2790 }, 2791 { 2792 "chips": ["gfx7"], 2793 "map": {"at": 47124, "to": "mm"}, 2794 "name": "COMPUTE_START_Y", 2795 "type_ref": "COMPUTE_START_X" 2796 }, 2797 { 2798 "chips": ["gfx7"], 2799 "map": {"at": 47128, "to": "mm"}, 2800 "name": "COMPUTE_START_Z", 2801 "type_ref": "COMPUTE_START_X" 2802 }, 2803 { 2804 "chips": ["gfx7"], 2805 "map": {"at": 47132, "to": "mm"}, 2806 "name": "COMPUTE_NUM_THREAD_X", 2807 "type_ref": "COMPUTE_NUM_THREAD_X" 2808 }, 2809 { 2810 "chips": ["gfx7"], 2811 "map": {"at": 47136, "to": "mm"}, 2812 "name": "COMPUTE_NUM_THREAD_Y", 2813 "type_ref": "COMPUTE_NUM_THREAD_X" 2814 }, 2815 { 2816 "chips": ["gfx7"], 2817 "map": {"at": 47140, "to": "mm"}, 2818 "name": "COMPUTE_NUM_THREAD_Z", 2819 "type_ref": "COMPUTE_NUM_THREAD_X" 2820 }, 2821 { 2822 "chips": ["gfx7"], 2823 "map": {"at": 47144, "to": "mm"}, 2824 "name": "COMPUTE_PIPELINESTAT_ENABLE", 2825 "type_ref": "COMPUTE_PIPELINESTAT_ENABLE" 2826 }, 2827 { 2828 "chips": ["gfx7"], 2829 "map": {"at": 47148, "to": "mm"}, 2830 "name": "COMPUTE_PERFCOUNT_ENABLE", 2831 "type_ref": "COMPUTE_PERFCOUNT_ENABLE" 2832 }, 2833 { 2834 "chips": ["gfx7"], 2835 "map": {"at": 47152, "to": "mm"}, 2836 "name": "COMPUTE_PGM_LO", 2837 "type_ref": "CP_APPEND_DATA" 2838 }, 2839 { 2840 "chips": ["gfx7"], 2841 "map": {"at": 47156, "to": "mm"}, 2842 "name": "COMPUTE_PGM_HI", 2843 "type_ref": "COMPUTE_PGM_HI" 2844 }, 2845 { 2846 "chips": ["gfx7"], 2847 "map": {"at": 47160, "to": "mm"}, 2848 "name": "COMPUTE_TBA_LO", 2849 "type_ref": "CP_APPEND_DATA" 2850 }, 2851 { 2852 "chips": ["gfx7"], 2853 "map": {"at": 47164, "to": "mm"}, 2854 "name": "COMPUTE_TBA_HI", 2855 "type_ref": "COMPUTE_TBA_HI" 2856 }, 2857 { 2858 "chips": ["gfx7"], 2859 "map": {"at": 47168, "to": "mm"}, 2860 "name": "COMPUTE_TMA_LO", 2861 "type_ref": "CP_APPEND_DATA" 2862 }, 2863 { 2864 "chips": ["gfx7"], 2865 "map": {"at": 47172, "to": "mm"}, 2866 "name": "COMPUTE_TMA_HI", 2867 "type_ref": "COMPUTE_TBA_HI" 2868 }, 2869 { 2870 "chips": ["gfx7"], 2871 "map": {"at": 47176, "to": "mm"}, 2872 "name": "COMPUTE_PGM_RSRC1", 2873 "type_ref": "COMPUTE_PGM_RSRC1" 2874 }, 2875 { 2876 "chips": ["gfx7"], 2877 "map": {"at": 47180, "to": "mm"}, 2878 "name": "COMPUTE_PGM_RSRC2", 2879 "type_ref": "COMPUTE_PGM_RSRC2" 2880 }, 2881 { 2882 "chips": ["gfx7"], 2883 "map": {"at": 47184, "to": "mm"}, 2884 "name": "COMPUTE_VMID", 2885 "type_ref": "COMPUTE_VMID" 2886 }, 2887 { 2888 "chips": ["gfx7"], 2889 "map": {"at": 47188, "to": "mm"}, 2890 "name": "COMPUTE_RESOURCE_LIMITS", 2891 "type_ref": "COMPUTE_RESOURCE_LIMITS" 2892 }, 2893 { 2894 "chips": ["gfx7"], 2895 "map": {"at": 47192, "to": "mm"}, 2896 "name": "COMPUTE_STATIC_THREAD_MGMT_SE0", 2897 "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0" 2898 }, 2899 { 2900 "chips": ["gfx7"], 2901 "map": {"at": 47196, "to": "mm"}, 2902 "name": "COMPUTE_STATIC_THREAD_MGMT_SE1", 2903 "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0" 2904 }, 2905 { 2906 "chips": ["gfx7"], 2907 "map": {"at": 47200, "to": "mm"}, 2908 "name": "COMPUTE_TMPRING_SIZE", 2909 "type_ref": "COMPUTE_TMPRING_SIZE" 2910 }, 2911 { 2912 "chips": ["gfx7"], 2913 "map": {"at": 47204, "to": "mm"}, 2914 "name": "COMPUTE_STATIC_THREAD_MGMT_SE2", 2915 "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0" 2916 }, 2917 { 2918 "chips": ["gfx7"], 2919 "map": {"at": 47208, "to": "mm"}, 2920 "name": "COMPUTE_STATIC_THREAD_MGMT_SE3", 2921 "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0" 2922 }, 2923 { 2924 "chips": ["gfx7"], 2925 "map": {"at": 47212, "to": "mm"}, 2926 "name": "COMPUTE_RESTART_X", 2927 "type_ref": "COMPUTE_RESTART_X" 2928 }, 2929 { 2930 "chips": ["gfx7"], 2931 "map": {"at": 47216, "to": "mm"}, 2932 "name": "COMPUTE_RESTART_Y", 2933 "type_ref": "COMPUTE_RESTART_X" 2934 }, 2935 { 2936 "chips": ["gfx7"], 2937 "map": {"at": 47220, "to": "mm"}, 2938 "name": "COMPUTE_RESTART_Z", 2939 "type_ref": "COMPUTE_RESTART_X" 2940 }, 2941 { 2942 "chips": ["gfx7"], 2943 "map": {"at": 47224, "to": "mm"}, 2944 "name": "COMPUTE_THREAD_TRACE_ENABLE", 2945 "type_ref": "COMPUTE_THREAD_TRACE_ENABLE" 2946 }, 2947 { 2948 "chips": ["gfx7"], 2949 "map": {"at": 47228, "to": "mm"}, 2950 "name": "COMPUTE_MISC_RESERVED", 2951 "type_ref": "COMPUTE_MISC_RESERVED" 2952 }, 2953 { 2954 "chips": ["gfx7"], 2955 "map": {"at": 47360, "to": "mm"}, 2956 "name": "COMPUTE_USER_DATA_0", 2957 "type_ref": "CP_APPEND_DATA" 2958 }, 2959 { 2960 "chips": ["gfx7"], 2961 "map": {"at": 47364, "to": "mm"}, 2962 "name": "COMPUTE_USER_DATA_1", 2963 "type_ref": "CP_APPEND_DATA" 2964 }, 2965 { 2966 "chips": ["gfx7"], 2967 "map": {"at": 47368, "to": "mm"}, 2968 "name": "COMPUTE_USER_DATA_2", 2969 "type_ref": "CP_APPEND_DATA" 2970 }, 2971 { 2972 "chips": ["gfx7"], 2973 "map": {"at": 47372, "to": "mm"}, 2974 "name": "COMPUTE_USER_DATA_3", 2975 "type_ref": "CP_APPEND_DATA" 2976 }, 2977 { 2978 "chips": ["gfx7"], 2979 "map": {"at": 47376, "to": "mm"}, 2980 "name": "COMPUTE_USER_DATA_4", 2981 "type_ref": "CP_APPEND_DATA" 2982 }, 2983 { 2984 "chips": ["gfx7"], 2985 "map": {"at": 47380, "to": "mm"}, 2986 "name": "COMPUTE_USER_DATA_5", 2987 "type_ref": "CP_APPEND_DATA" 2988 }, 2989 { 2990 "chips": ["gfx7"], 2991 "map": {"at": 47384, "to": "mm"}, 2992 "name": "COMPUTE_USER_DATA_6", 2993 "type_ref": "CP_APPEND_DATA" 2994 }, 2995 { 2996 "chips": ["gfx7"], 2997 "map": {"at": 47388, "to": "mm"}, 2998 "name": "COMPUTE_USER_DATA_7", 2999 "type_ref": "CP_APPEND_DATA" 3000 }, 3001 { 3002 "chips": ["gfx7"], 3003 "map": {"at": 47392, "to": "mm"}, 3004 "name": "COMPUTE_USER_DATA_8", 3005 "type_ref": "CP_APPEND_DATA" 3006 }, 3007 { 3008 "chips": ["gfx7"], 3009 "map": {"at": 47396, "to": "mm"}, 3010 "name": "COMPUTE_USER_DATA_9", 3011 "type_ref": "CP_APPEND_DATA" 3012 }, 3013 { 3014 "chips": ["gfx7"], 3015 "map": {"at": 47400, "to": "mm"}, 3016 "name": "COMPUTE_USER_DATA_10", 3017 "type_ref": "CP_APPEND_DATA" 3018 }, 3019 { 3020 "chips": ["gfx7"], 3021 "map": {"at": 47404, "to": "mm"}, 3022 "name": "COMPUTE_USER_DATA_11", 3023 "type_ref": "CP_APPEND_DATA" 3024 }, 3025 { 3026 "chips": ["gfx7"], 3027 "map": {"at": 47408, "to": "mm"}, 3028 "name": "COMPUTE_USER_DATA_12", 3029 "type_ref": "CP_APPEND_DATA" 3030 }, 3031 { 3032 "chips": ["gfx7"], 3033 "map": {"at": 47412, "to": "mm"}, 3034 "name": "COMPUTE_USER_DATA_13", 3035 "type_ref": "CP_APPEND_DATA" 3036 }, 3037 { 3038 "chips": ["gfx7"], 3039 "map": {"at": 47416, "to": "mm"}, 3040 "name": "COMPUTE_USER_DATA_14", 3041 "type_ref": "CP_APPEND_DATA" 3042 }, 3043 { 3044 "chips": ["gfx7"], 3045 "map": {"at": 47420, "to": "mm"}, 3046 "name": "COMPUTE_USER_DATA_15", 3047 "type_ref": "CP_APPEND_DATA" 3048 }, 3049 { 3050 "chips": ["gfx7"], 3051 "map": {"at": 163840, "to": "mm"}, 3052 "name": "DB_RENDER_CONTROL", 3053 "type_ref": "DB_RENDER_CONTROL" 3054 }, 3055 { 3056 "chips": ["gfx7"], 3057 "map": {"at": 163844, "to": "mm"}, 3058 "name": "DB_COUNT_CONTROL", 3059 "type_ref": "DB_COUNT_CONTROL" 3060 }, 3061 { 3062 "chips": ["gfx7"], 3063 "map": {"at": 163848, "to": "mm"}, 3064 "name": "DB_DEPTH_VIEW", 3065 "type_ref": "DB_DEPTH_VIEW" 3066 }, 3067 { 3068 "chips": ["gfx7"], 3069 "map": {"at": 163852, "to": "mm"}, 3070 "name": "DB_RENDER_OVERRIDE", 3071 "type_ref": "DB_RENDER_OVERRIDE" 3072 }, 3073 { 3074 "chips": ["gfx7"], 3075 "map": {"at": 163856, "to": "mm"}, 3076 "name": "DB_RENDER_OVERRIDE2", 3077 "type_ref": "DB_RENDER_OVERRIDE2" 3078 }, 3079 { 3080 "chips": ["gfx7"], 3081 "map": {"at": 163860, "to": "mm"}, 3082 "name": "DB_HTILE_DATA_BASE", 3083 "type_ref": "CB_COLOR0_BASE" 3084 }, 3085 { 3086 "chips": ["gfx7"], 3087 "map": {"at": 163872, "to": "mm"}, 3088 "name": "DB_DEPTH_BOUNDS_MIN", 3089 "type_ref": "DB_DEPTH_BOUNDS_MIN" 3090 }, 3091 { 3092 "chips": ["gfx7"], 3093 "map": {"at": 163876, "to": "mm"}, 3094 "name": "DB_DEPTH_BOUNDS_MAX", 3095 "type_ref": "DB_DEPTH_BOUNDS_MAX" 3096 }, 3097 { 3098 "chips": ["gfx7"], 3099 "map": {"at": 163880, "to": "mm"}, 3100 "name": "DB_STENCIL_CLEAR", 3101 "type_ref": "DB_STENCIL_CLEAR" 3102 }, 3103 { 3104 "chips": ["gfx7"], 3105 "map": {"at": 163884, "to": "mm"}, 3106 "name": "DB_DEPTH_CLEAR", 3107 "type_ref": "DB_DEPTH_CLEAR" 3108 }, 3109 { 3110 "chips": ["gfx7"], 3111 "map": {"at": 163888, "to": "mm"}, 3112 "name": "PA_SC_SCREEN_SCISSOR_TL", 3113 "type_ref": "PA_SC_SCREEN_SCISSOR_TL" 3114 }, 3115 { 3116 "chips": ["gfx7"], 3117 "map": {"at": 163892, "to": "mm"}, 3118 "name": "PA_SC_SCREEN_SCISSOR_BR", 3119 "type_ref": "PA_SC_SCREEN_SCISSOR_BR" 3120 }, 3121 { 3122 "chips": ["gfx7"], 3123 "map": {"at": 163900, "to": "mm"}, 3124 "name": "DB_DEPTH_INFO", 3125 "type_ref": "DB_DEPTH_INFO" 3126 }, 3127 { 3128 "chips": ["gfx7"], 3129 "map": {"at": 163904, "to": "mm"}, 3130 "name": "DB_Z_INFO", 3131 "type_ref": "DB_Z_INFO" 3132 }, 3133 { 3134 "chips": ["gfx7"], 3135 "map": {"at": 163908, "to": "mm"}, 3136 "name": "DB_STENCIL_INFO", 3137 "type_ref": "DB_STENCIL_INFO" 3138 }, 3139 { 3140 "chips": ["gfx7"], 3141 "map": {"at": 163912, "to": "mm"}, 3142 "name": "DB_Z_READ_BASE", 3143 "type_ref": "CB_COLOR0_BASE" 3144 }, 3145 { 3146 "chips": ["gfx7"], 3147 "map": {"at": 163916, "to": "mm"}, 3148 "name": "DB_STENCIL_READ_BASE", 3149 "type_ref": "CB_COLOR0_BASE" 3150 }, 3151 { 3152 "chips": ["gfx7"], 3153 "map": {"at": 163920, "to": "mm"}, 3154 "name": "DB_Z_WRITE_BASE", 3155 "type_ref": "CB_COLOR0_BASE" 3156 }, 3157 { 3158 "chips": ["gfx7"], 3159 "map": {"at": 163924, "to": "mm"}, 3160 "name": "DB_STENCIL_WRITE_BASE", 3161 "type_ref": "CB_COLOR0_BASE" 3162 }, 3163 { 3164 "chips": ["gfx7"], 3165 "map": {"at": 163928, "to": "mm"}, 3166 "name": "DB_DEPTH_SIZE", 3167 "type_ref": "DB_DEPTH_SIZE" 3168 }, 3169 { 3170 "chips": ["gfx7"], 3171 "map": {"at": 163932, "to": "mm"}, 3172 "name": "DB_DEPTH_SLICE", 3173 "type_ref": "DB_DEPTH_SLICE" 3174 }, 3175 { 3176 "chips": ["gfx7"], 3177 "map": {"at": 163968, "to": "mm"}, 3178 "name": "TA_BC_BASE_ADDR", 3179 "type_ref": "TA_BC_BASE_ADDR" 3180 }, 3181 { 3182 "chips": ["gfx7"], 3183 "map": {"at": 163972, "to": "mm"}, 3184 "name": "TA_BC_BASE_ADDR_HI", 3185 "type_ref": "TA_BC_BASE_ADDR_HI" 3186 }, 3187 { 3188 "chips": ["gfx7"], 3189 "map": {"at": 164328, "to": "mm"}, 3190 "name": "COHER_DEST_BASE_HI_0", 3191 "type_ref": "COHER_DEST_BASE_HI_0" 3192 }, 3193 { 3194 "chips": ["gfx7"], 3195 "map": {"at": 164332, "to": "mm"}, 3196 "name": "COHER_DEST_BASE_HI_1", 3197 "type_ref": "COHER_DEST_BASE_HI_0" 3198 }, 3199 { 3200 "chips": ["gfx7"], 3201 "map": {"at": 164336, "to": "mm"}, 3202 "name": "COHER_DEST_BASE_HI_2", 3203 "type_ref": "COHER_DEST_BASE_HI_0" 3204 }, 3205 { 3206 "chips": ["gfx7"], 3207 "map": {"at": 164340, "to": "mm"}, 3208 "name": "COHER_DEST_BASE_HI_3", 3209 "type_ref": "COHER_DEST_BASE_HI_0" 3210 }, 3211 { 3212 "chips": ["gfx7"], 3213 "map": {"at": 164344, "to": "mm"}, 3214 "name": "COHER_DEST_BASE_2", 3215 "type_ref": "COHER_DEST_BASE_0" 3216 }, 3217 { 3218 "chips": ["gfx7"], 3219 "map": {"at": 164348, "to": "mm"}, 3220 "name": "COHER_DEST_BASE_3", 3221 "type_ref": "COHER_DEST_BASE_0" 3222 }, 3223 { 3224 "chips": ["gfx7"], 3225 "map": {"at": 164352, "to": "mm"}, 3226 "name": "PA_SC_WINDOW_OFFSET", 3227 "type_ref": "PA_SC_WINDOW_OFFSET" 3228 }, 3229 { 3230 "chips": ["gfx7"], 3231 "map": {"at": 164356, "to": "mm"}, 3232 "name": "PA_SC_WINDOW_SCISSOR_TL", 3233 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3234 }, 3235 { 3236 "chips": ["gfx7"], 3237 "map": {"at": 164360, "to": "mm"}, 3238 "name": "PA_SC_WINDOW_SCISSOR_BR", 3239 "type_ref": "PA_SC_CLIPRECT_0_BR" 3240 }, 3241 { 3242 "chips": ["gfx7"], 3243 "map": {"at": 164364, "to": "mm"}, 3244 "name": "PA_SC_CLIPRECT_RULE", 3245 "type_ref": "PA_SC_CLIPRECT_RULE" 3246 }, 3247 { 3248 "chips": ["gfx7"], 3249 "map": {"at": 164368, "to": "mm"}, 3250 "name": "PA_SC_CLIPRECT_0_TL", 3251 "type_ref": "PA_SC_CLIPRECT_0_TL" 3252 }, 3253 { 3254 "chips": ["gfx7"], 3255 "map": {"at": 164372, "to": "mm"}, 3256 "name": "PA_SC_CLIPRECT_0_BR", 3257 "type_ref": "PA_SC_CLIPRECT_0_BR" 3258 }, 3259 { 3260 "chips": ["gfx7"], 3261 "map": {"at": 164376, "to": "mm"}, 3262 "name": "PA_SC_CLIPRECT_1_TL", 3263 "type_ref": "PA_SC_CLIPRECT_0_TL" 3264 }, 3265 { 3266 "chips": ["gfx7"], 3267 "map": {"at": 164380, "to": "mm"}, 3268 "name": "PA_SC_CLIPRECT_1_BR", 3269 "type_ref": "PA_SC_CLIPRECT_0_BR" 3270 }, 3271 { 3272 "chips": ["gfx7"], 3273 "map": {"at": 164384, "to": "mm"}, 3274 "name": "PA_SC_CLIPRECT_2_TL", 3275 "type_ref": "PA_SC_CLIPRECT_0_TL" 3276 }, 3277 { 3278 "chips": ["gfx7"], 3279 "map": {"at": 164388, "to": "mm"}, 3280 "name": "PA_SC_CLIPRECT_2_BR", 3281 "type_ref": "PA_SC_CLIPRECT_0_BR" 3282 }, 3283 { 3284 "chips": ["gfx7"], 3285 "map": {"at": 164392, "to": "mm"}, 3286 "name": "PA_SC_CLIPRECT_3_TL", 3287 "type_ref": "PA_SC_CLIPRECT_0_TL" 3288 }, 3289 { 3290 "chips": ["gfx7"], 3291 "map": {"at": 164396, "to": "mm"}, 3292 "name": "PA_SC_CLIPRECT_3_BR", 3293 "type_ref": "PA_SC_CLIPRECT_0_BR" 3294 }, 3295 { 3296 "chips": ["gfx7"], 3297 "map": {"at": 164400, "to": "mm"}, 3298 "name": "PA_SC_EDGERULE", 3299 "type_ref": "PA_SC_EDGERULE" 3300 }, 3301 { 3302 "chips": ["gfx7"], 3303 "map": {"at": 164404, "to": "mm"}, 3304 "name": "PA_SU_HARDWARE_SCREEN_OFFSET", 3305 "type_ref": "PA_SU_HARDWARE_SCREEN_OFFSET" 3306 }, 3307 { 3308 "chips": ["gfx7"], 3309 "map": {"at": 164408, "to": "mm"}, 3310 "name": "CB_TARGET_MASK", 3311 "type_ref": "CB_TARGET_MASK" 3312 }, 3313 { 3314 "chips": ["gfx7"], 3315 "map": {"at": 164412, "to": "mm"}, 3316 "name": "CB_SHADER_MASK", 3317 "type_ref": "CB_SHADER_MASK" 3318 }, 3319 { 3320 "chips": ["gfx7"], 3321 "map": {"at": 164416, "to": "mm"}, 3322 "name": "PA_SC_GENERIC_SCISSOR_TL", 3323 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3324 }, 3325 { 3326 "chips": ["gfx7"], 3327 "map": {"at": 164420, "to": "mm"}, 3328 "name": "PA_SC_GENERIC_SCISSOR_BR", 3329 "type_ref": "PA_SC_CLIPRECT_0_BR" 3330 }, 3331 { 3332 "chips": ["gfx7"], 3333 "map": {"at": 164424, "to": "mm"}, 3334 "name": "COHER_DEST_BASE_0", 3335 "type_ref": "COHER_DEST_BASE_0" 3336 }, 3337 { 3338 "chips": ["gfx7"], 3339 "map": {"at": 164428, "to": "mm"}, 3340 "name": "COHER_DEST_BASE_1", 3341 "type_ref": "COHER_DEST_BASE_0" 3342 }, 3343 { 3344 "chips": ["gfx7"], 3345 "map": {"at": 164432, "to": "mm"}, 3346 "name": "PA_SC_VPORT_SCISSOR_0_TL", 3347 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3348 }, 3349 { 3350 "chips": ["gfx7"], 3351 "map": {"at": 164436, "to": "mm"}, 3352 "name": "PA_SC_VPORT_SCISSOR_0_BR", 3353 "type_ref": "PA_SC_CLIPRECT_0_BR" 3354 }, 3355 { 3356 "chips": ["gfx7"], 3357 "map": {"at": 164440, "to": "mm"}, 3358 "name": "PA_SC_VPORT_SCISSOR_1_TL", 3359 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3360 }, 3361 { 3362 "chips": ["gfx7"], 3363 "map": {"at": 164444, "to": "mm"}, 3364 "name": "PA_SC_VPORT_SCISSOR_1_BR", 3365 "type_ref": "PA_SC_CLIPRECT_0_BR" 3366 }, 3367 { 3368 "chips": ["gfx7"], 3369 "map": {"at": 164448, "to": "mm"}, 3370 "name": "PA_SC_VPORT_SCISSOR_2_TL", 3371 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3372 }, 3373 { 3374 "chips": ["gfx7"], 3375 "map": {"at": 164452, "to": "mm"}, 3376 "name": "PA_SC_VPORT_SCISSOR_2_BR", 3377 "type_ref": "PA_SC_CLIPRECT_0_BR" 3378 }, 3379 { 3380 "chips": ["gfx7"], 3381 "map": {"at": 164456, "to": "mm"}, 3382 "name": "PA_SC_VPORT_SCISSOR_3_TL", 3383 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3384 }, 3385 { 3386 "chips": ["gfx7"], 3387 "map": {"at": 164460, "to": "mm"}, 3388 "name": "PA_SC_VPORT_SCISSOR_3_BR", 3389 "type_ref": "PA_SC_CLIPRECT_0_BR" 3390 }, 3391 { 3392 "chips": ["gfx7"], 3393 "map": {"at": 164464, "to": "mm"}, 3394 "name": "PA_SC_VPORT_SCISSOR_4_TL", 3395 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3396 }, 3397 { 3398 "chips": ["gfx7"], 3399 "map": {"at": 164468, "to": "mm"}, 3400 "name": "PA_SC_VPORT_SCISSOR_4_BR", 3401 "type_ref": "PA_SC_CLIPRECT_0_BR" 3402 }, 3403 { 3404 "chips": ["gfx7"], 3405 "map": {"at": 164472, "to": "mm"}, 3406 "name": "PA_SC_VPORT_SCISSOR_5_TL", 3407 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3408 }, 3409 { 3410 "chips": ["gfx7"], 3411 "map": {"at": 164476, "to": "mm"}, 3412 "name": "PA_SC_VPORT_SCISSOR_5_BR", 3413 "type_ref": "PA_SC_CLIPRECT_0_BR" 3414 }, 3415 { 3416 "chips": ["gfx7"], 3417 "map": {"at": 164480, "to": "mm"}, 3418 "name": "PA_SC_VPORT_SCISSOR_6_TL", 3419 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3420 }, 3421 { 3422 "chips": ["gfx7"], 3423 "map": {"at": 164484, "to": "mm"}, 3424 "name": "PA_SC_VPORT_SCISSOR_6_BR", 3425 "type_ref": "PA_SC_CLIPRECT_0_BR" 3426 }, 3427 { 3428 "chips": ["gfx7"], 3429 "map": {"at": 164488, "to": "mm"}, 3430 "name": "PA_SC_VPORT_SCISSOR_7_TL", 3431 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3432 }, 3433 { 3434 "chips": ["gfx7"], 3435 "map": {"at": 164492, "to": "mm"}, 3436 "name": "PA_SC_VPORT_SCISSOR_7_BR", 3437 "type_ref": "PA_SC_CLIPRECT_0_BR" 3438 }, 3439 { 3440 "chips": ["gfx7"], 3441 "map": {"at": 164496, "to": "mm"}, 3442 "name": "PA_SC_VPORT_SCISSOR_8_TL", 3443 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3444 }, 3445 { 3446 "chips": ["gfx7"], 3447 "map": {"at": 164500, "to": "mm"}, 3448 "name": "PA_SC_VPORT_SCISSOR_8_BR", 3449 "type_ref": "PA_SC_CLIPRECT_0_BR" 3450 }, 3451 { 3452 "chips": ["gfx7"], 3453 "map": {"at": 164504, "to": "mm"}, 3454 "name": "PA_SC_VPORT_SCISSOR_9_TL", 3455 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3456 }, 3457 { 3458 "chips": ["gfx7"], 3459 "map": {"at": 164508, "to": "mm"}, 3460 "name": "PA_SC_VPORT_SCISSOR_9_BR", 3461 "type_ref": "PA_SC_CLIPRECT_0_BR" 3462 }, 3463 { 3464 "chips": ["gfx7"], 3465 "map": {"at": 164512, "to": "mm"}, 3466 "name": "PA_SC_VPORT_SCISSOR_10_TL", 3467 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3468 }, 3469 { 3470 "chips": ["gfx7"], 3471 "map": {"at": 164516, "to": "mm"}, 3472 "name": "PA_SC_VPORT_SCISSOR_10_BR", 3473 "type_ref": "PA_SC_CLIPRECT_0_BR" 3474 }, 3475 { 3476 "chips": ["gfx7"], 3477 "map": {"at": 164520, "to": "mm"}, 3478 "name": "PA_SC_VPORT_SCISSOR_11_TL", 3479 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3480 }, 3481 { 3482 "chips": ["gfx7"], 3483 "map": {"at": 164524, "to": "mm"}, 3484 "name": "PA_SC_VPORT_SCISSOR_11_BR", 3485 "type_ref": "PA_SC_CLIPRECT_0_BR" 3486 }, 3487 { 3488 "chips": ["gfx7"], 3489 "map": {"at": 164528, "to": "mm"}, 3490 "name": "PA_SC_VPORT_SCISSOR_12_TL", 3491 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3492 }, 3493 { 3494 "chips": ["gfx7"], 3495 "map": {"at": 164532, "to": "mm"}, 3496 "name": "PA_SC_VPORT_SCISSOR_12_BR", 3497 "type_ref": "PA_SC_CLIPRECT_0_BR" 3498 }, 3499 { 3500 "chips": ["gfx7"], 3501 "map": {"at": 164536, "to": "mm"}, 3502 "name": "PA_SC_VPORT_SCISSOR_13_TL", 3503 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3504 }, 3505 { 3506 "chips": ["gfx7"], 3507 "map": {"at": 164540, "to": "mm"}, 3508 "name": "PA_SC_VPORT_SCISSOR_13_BR", 3509 "type_ref": "PA_SC_CLIPRECT_0_BR" 3510 }, 3511 { 3512 "chips": ["gfx7"], 3513 "map": {"at": 164544, "to": "mm"}, 3514 "name": "PA_SC_VPORT_SCISSOR_14_TL", 3515 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3516 }, 3517 { 3518 "chips": ["gfx7"], 3519 "map": {"at": 164548, "to": "mm"}, 3520 "name": "PA_SC_VPORT_SCISSOR_14_BR", 3521 "type_ref": "PA_SC_CLIPRECT_0_BR" 3522 }, 3523 { 3524 "chips": ["gfx7"], 3525 "map": {"at": 164552, "to": "mm"}, 3526 "name": "PA_SC_VPORT_SCISSOR_15_TL", 3527 "type_ref": "PA_SC_GENERIC_SCISSOR_TL" 3528 }, 3529 { 3530 "chips": ["gfx7"], 3531 "map": {"at": 164556, "to": "mm"}, 3532 "name": "PA_SC_VPORT_SCISSOR_15_BR", 3533 "type_ref": "PA_SC_CLIPRECT_0_BR" 3534 }, 3535 { 3536 "chips": ["gfx7"], 3537 "map": {"at": 164560, "to": "mm"}, 3538 "name": "PA_SC_VPORT_ZMIN_0", 3539 "type_ref": "PA_SC_VPORT_ZMIN_0" 3540 }, 3541 { 3542 "chips": ["gfx7"], 3543 "map": {"at": 164564, "to": "mm"}, 3544 "name": "PA_SC_VPORT_ZMAX_0", 3545 "type_ref": "PA_SC_VPORT_ZMAX_0" 3546 }, 3547 { 3548 "chips": ["gfx7"], 3549 "map": {"at": 164568, "to": "mm"}, 3550 "name": "PA_SC_VPORT_ZMIN_1", 3551 "type_ref": "PA_SC_VPORT_ZMIN_0" 3552 }, 3553 { 3554 "chips": ["gfx7"], 3555 "map": {"at": 164572, "to": "mm"}, 3556 "name": "PA_SC_VPORT_ZMAX_1", 3557 "type_ref": "PA_SC_VPORT_ZMAX_0" 3558 }, 3559 { 3560 "chips": ["gfx7"], 3561 "map": {"at": 164576, "to": "mm"}, 3562 "name": "PA_SC_VPORT_ZMIN_2", 3563 "type_ref": "PA_SC_VPORT_ZMIN_0" 3564 }, 3565 { 3566 "chips": ["gfx7"], 3567 "map": {"at": 164580, "to": "mm"}, 3568 "name": "PA_SC_VPORT_ZMAX_2", 3569 "type_ref": "PA_SC_VPORT_ZMAX_0" 3570 }, 3571 { 3572 "chips": ["gfx7"], 3573 "map": {"at": 164584, "to": "mm"}, 3574 "name": "PA_SC_VPORT_ZMIN_3", 3575 "type_ref": "PA_SC_VPORT_ZMIN_0" 3576 }, 3577 { 3578 "chips": ["gfx7"], 3579 "map": {"at": 164588, "to": "mm"}, 3580 "name": "PA_SC_VPORT_ZMAX_3", 3581 "type_ref": "PA_SC_VPORT_ZMAX_0" 3582 }, 3583 { 3584 "chips": ["gfx7"], 3585 "map": {"at": 164592, "to": "mm"}, 3586 "name": "PA_SC_VPORT_ZMIN_4", 3587 "type_ref": "PA_SC_VPORT_ZMIN_0" 3588 }, 3589 { 3590 "chips": ["gfx7"], 3591 "map": {"at": 164596, "to": "mm"}, 3592 "name": "PA_SC_VPORT_ZMAX_4", 3593 "type_ref": "PA_SC_VPORT_ZMAX_0" 3594 }, 3595 { 3596 "chips": ["gfx7"], 3597 "map": {"at": 164600, "to": "mm"}, 3598 "name": "PA_SC_VPORT_ZMIN_5", 3599 "type_ref": "PA_SC_VPORT_ZMIN_0" 3600 }, 3601 { 3602 "chips": ["gfx7"], 3603 "map": {"at": 164604, "to": "mm"}, 3604 "name": "PA_SC_VPORT_ZMAX_5", 3605 "type_ref": "PA_SC_VPORT_ZMAX_0" 3606 }, 3607 { 3608 "chips": ["gfx7"], 3609 "map": {"at": 164608, "to": "mm"}, 3610 "name": "PA_SC_VPORT_ZMIN_6", 3611 "type_ref": "PA_SC_VPORT_ZMIN_0" 3612 }, 3613 { 3614 "chips": ["gfx7"], 3615 "map": {"at": 164612, "to": "mm"}, 3616 "name": "PA_SC_VPORT_ZMAX_6", 3617 "type_ref": "PA_SC_VPORT_ZMAX_0" 3618 }, 3619 { 3620 "chips": ["gfx7"], 3621 "map": {"at": 164616, "to": "mm"}, 3622 "name": "PA_SC_VPORT_ZMIN_7", 3623 "type_ref": "PA_SC_VPORT_ZMIN_0" 3624 }, 3625 { 3626 "chips": ["gfx7"], 3627 "map": {"at": 164620, "to": "mm"}, 3628 "name": "PA_SC_VPORT_ZMAX_7", 3629 "type_ref": "PA_SC_VPORT_ZMAX_0" 3630 }, 3631 { 3632 "chips": ["gfx7"], 3633 "map": {"at": 164624, "to": "mm"}, 3634 "name": "PA_SC_VPORT_ZMIN_8", 3635 "type_ref": "PA_SC_VPORT_ZMIN_0" 3636 }, 3637 { 3638 "chips": ["gfx7"], 3639 "map": {"at": 164628, "to": "mm"}, 3640 "name": "PA_SC_VPORT_ZMAX_8", 3641 "type_ref": "PA_SC_VPORT_ZMAX_0" 3642 }, 3643 { 3644 "chips": ["gfx7"], 3645 "map": {"at": 164632, "to": "mm"}, 3646 "name": "PA_SC_VPORT_ZMIN_9", 3647 "type_ref": "PA_SC_VPORT_ZMIN_0" 3648 }, 3649 { 3650 "chips": ["gfx7"], 3651 "map": {"at": 164636, "to": "mm"}, 3652 "name": "PA_SC_VPORT_ZMAX_9", 3653 "type_ref": "PA_SC_VPORT_ZMAX_0" 3654 }, 3655 { 3656 "chips": ["gfx7"], 3657 "map": {"at": 164640, "to": "mm"}, 3658 "name": "PA_SC_VPORT_ZMIN_10", 3659 "type_ref": "PA_SC_VPORT_ZMIN_0" 3660 }, 3661 { 3662 "chips": ["gfx7"], 3663 "map": {"at": 164644, "to": "mm"}, 3664 "name": "PA_SC_VPORT_ZMAX_10", 3665 "type_ref": "PA_SC_VPORT_ZMAX_0" 3666 }, 3667 { 3668 "chips": ["gfx7"], 3669 "map": {"at": 164648, "to": "mm"}, 3670 "name": "PA_SC_VPORT_ZMIN_11", 3671 "type_ref": "PA_SC_VPORT_ZMIN_0" 3672 }, 3673 { 3674 "chips": ["gfx7"], 3675 "map": {"at": 164652, "to": "mm"}, 3676 "name": "PA_SC_VPORT_ZMAX_11", 3677 "type_ref": "PA_SC_VPORT_ZMAX_0" 3678 }, 3679 { 3680 "chips": ["gfx7"], 3681 "map": {"at": 164656, "to": "mm"}, 3682 "name": "PA_SC_VPORT_ZMIN_12", 3683 "type_ref": "PA_SC_VPORT_ZMIN_0" 3684 }, 3685 { 3686 "chips": ["gfx7"], 3687 "map": {"at": 164660, "to": "mm"}, 3688 "name": "PA_SC_VPORT_ZMAX_12", 3689 "type_ref": "PA_SC_VPORT_ZMAX_0" 3690 }, 3691 { 3692 "chips": ["gfx7"], 3693 "map": {"at": 164664, "to": "mm"}, 3694 "name": "PA_SC_VPORT_ZMIN_13", 3695 "type_ref": "PA_SC_VPORT_ZMIN_0" 3696 }, 3697 { 3698 "chips": ["gfx7"], 3699 "map": {"at": 164668, "to": "mm"}, 3700 "name": "PA_SC_VPORT_ZMAX_13", 3701 "type_ref": "PA_SC_VPORT_ZMAX_0" 3702 }, 3703 { 3704 "chips": ["gfx7"], 3705 "map": {"at": 164672, "to": "mm"}, 3706 "name": "PA_SC_VPORT_ZMIN_14", 3707 "type_ref": "PA_SC_VPORT_ZMIN_0" 3708 }, 3709 { 3710 "chips": ["gfx7"], 3711 "map": {"at": 164676, "to": "mm"}, 3712 "name": "PA_SC_VPORT_ZMAX_14", 3713 "type_ref": "PA_SC_VPORT_ZMAX_0" 3714 }, 3715 { 3716 "chips": ["gfx7"], 3717 "map": {"at": 164680, "to": "mm"}, 3718 "name": "PA_SC_VPORT_ZMIN_15", 3719 "type_ref": "PA_SC_VPORT_ZMIN_0" 3720 }, 3721 { 3722 "chips": ["gfx7"], 3723 "map": {"at": 164684, "to": "mm"}, 3724 "name": "PA_SC_VPORT_ZMAX_15", 3725 "type_ref": "PA_SC_VPORT_ZMAX_0" 3726 }, 3727 { 3728 "chips": ["gfx7"], 3729 "map": {"at": 164688, "to": "mm"}, 3730 "name": "PA_SC_RASTER_CONFIG", 3731 "type_ref": "PA_SC_RASTER_CONFIG" 3732 }, 3733 { 3734 "chips": ["gfx7"], 3735 "map": {"at": 164692, "to": "mm"}, 3736 "name": "PA_SC_RASTER_CONFIG_1", 3737 "type_ref": "PA_SC_RASTER_CONFIG_1" 3738 }, 3739 { 3740 "chips": ["gfx7"], 3741 "map": {"at": 164696, "to": "mm"}, 3742 "name": "PA_SC_SCREEN_EXTENT_CONTROL", 3743 "type_ref": "PA_SC_SCREEN_EXTENT_CONTROL" 3744 }, 3745 { 3746 "chips": ["gfx7"], 3747 "map": {"at": 164704, "to": "mm"}, 3748 "name": "CP_PERFMON_CNTX_CNTL", 3749 "type_ref": "CP_PERFMON_CNTX_CNTL" 3750 }, 3751 { 3752 "chips": ["gfx7"], 3753 "map": {"at": 164708, "to": "mm"}, 3754 "name": "CP_RINGID", 3755 "type_ref": "CP_RINGID" 3756 }, 3757 { 3758 "chips": ["gfx7"], 3759 "map": {"at": 164712, "to": "mm"}, 3760 "name": "CP_VMID", 3761 "type_ref": "CP_VMID" 3762 }, 3763 { 3764 "chips": ["gfx7"], 3765 "map": {"at": 164864, "to": "mm"}, 3766 "name": "VGT_MAX_VTX_INDX", 3767 "type_ref": "VGT_MAX_VTX_INDX" 3768 }, 3769 { 3770 "chips": ["gfx7"], 3771 "map": {"at": 164868, "to": "mm"}, 3772 "name": "VGT_MIN_VTX_INDX", 3773 "type_ref": "VGT_MIN_VTX_INDX" 3774 }, 3775 { 3776 "chips": ["gfx7"], 3777 "map": {"at": 164872, "to": "mm"}, 3778 "name": "VGT_INDX_OFFSET", 3779 "type_ref": "VGT_INDX_OFFSET" 3780 }, 3781 { 3782 "chips": ["gfx7"], 3783 "map": {"at": 164876, "to": "mm"}, 3784 "name": "VGT_MULTI_PRIM_IB_RESET_INDX", 3785 "type_ref": "VGT_MULTI_PRIM_IB_RESET_INDX" 3786 }, 3787 { 3788 "chips": ["gfx7"], 3789 "map": {"at": 164884, "to": "mm"}, 3790 "name": "CB_BLEND_RED", 3791 "type_ref": "CB_BLEND_RED" 3792 }, 3793 { 3794 "chips": ["gfx7"], 3795 "map": {"at": 164888, "to": "mm"}, 3796 "name": "CB_BLEND_GREEN", 3797 "type_ref": "CB_BLEND_GREEN" 3798 }, 3799 { 3800 "chips": ["gfx7"], 3801 "map": {"at": 164892, "to": "mm"}, 3802 "name": "CB_BLEND_BLUE", 3803 "type_ref": "CB_BLEND_BLUE" 3804 }, 3805 { 3806 "chips": ["gfx7"], 3807 "map": {"at": 164896, "to": "mm"}, 3808 "name": "CB_BLEND_ALPHA", 3809 "type_ref": "CB_BLEND_ALPHA" 3810 }, 3811 { 3812 "chips": ["gfx7"], 3813 "map": {"at": 164908, "to": "mm"}, 3814 "name": "DB_STENCIL_CONTROL", 3815 "type_ref": "DB_STENCIL_CONTROL" 3816 }, 3817 { 3818 "chips": ["gfx7"], 3819 "map": {"at": 164912, "to": "mm"}, 3820 "name": "DB_STENCILREFMASK", 3821 "type_ref": "DB_STENCILREFMASK" 3822 }, 3823 { 3824 "chips": ["gfx7"], 3825 "map": {"at": 164916, "to": "mm"}, 3826 "name": "DB_STENCILREFMASK_BF", 3827 "type_ref": "DB_STENCILREFMASK_BF" 3828 }, 3829 { 3830 "chips": ["gfx7"], 3831 "map": {"at": 164924, "to": "mm"}, 3832 "name": "PA_CL_VPORT_XSCALE", 3833 "type_ref": "PA_CL_VPORT_XSCALE" 3834 }, 3835 { 3836 "chips": ["gfx7"], 3837 "map": {"at": 164928, "to": "mm"}, 3838 "name": "PA_CL_VPORT_XOFFSET", 3839 "type_ref": "PA_CL_VPORT_XOFFSET" 3840 }, 3841 { 3842 "chips": ["gfx7"], 3843 "map": {"at": 164932, "to": "mm"}, 3844 "name": "PA_CL_VPORT_YSCALE", 3845 "type_ref": "PA_CL_VPORT_YSCALE" 3846 }, 3847 { 3848 "chips": ["gfx7"], 3849 "map": {"at": 164936, "to": "mm"}, 3850 "name": "PA_CL_VPORT_YOFFSET", 3851 "type_ref": "PA_CL_VPORT_YOFFSET" 3852 }, 3853 { 3854 "chips": ["gfx7"], 3855 "map": {"at": 164940, "to": "mm"}, 3856 "name": "PA_CL_VPORT_ZSCALE", 3857 "type_ref": "PA_CL_VPORT_ZSCALE" 3858 }, 3859 { 3860 "chips": ["gfx7"], 3861 "map": {"at": 164944, "to": "mm"}, 3862 "name": "PA_CL_VPORT_ZOFFSET", 3863 "type_ref": "PA_CL_VPORT_ZOFFSET" 3864 }, 3865 { 3866 "chips": ["gfx7"], 3867 "map": {"at": 164948, "to": "mm"}, 3868 "name": "PA_CL_VPORT_XSCALE_1", 3869 "type_ref": "PA_CL_VPORT_XSCALE" 3870 }, 3871 { 3872 "chips": ["gfx7"], 3873 "map": {"at": 164952, "to": "mm"}, 3874 "name": "PA_CL_VPORT_XOFFSET_1", 3875 "type_ref": "PA_CL_VPORT_XOFFSET" 3876 }, 3877 { 3878 "chips": ["gfx7"], 3879 "map": {"at": 164956, "to": "mm"}, 3880 "name": "PA_CL_VPORT_YSCALE_1", 3881 "type_ref": "PA_CL_VPORT_YSCALE" 3882 }, 3883 { 3884 "chips": ["gfx7"], 3885 "map": {"at": 164960, "to": "mm"}, 3886 "name": "PA_CL_VPORT_YOFFSET_1", 3887 "type_ref": "PA_CL_VPORT_YOFFSET" 3888 }, 3889 { 3890 "chips": ["gfx7"], 3891 "map": {"at": 164964, "to": "mm"}, 3892 "name": "PA_CL_VPORT_ZSCALE_1", 3893 "type_ref": "PA_CL_VPORT_ZSCALE" 3894 }, 3895 { 3896 "chips": ["gfx7"], 3897 "map": {"at": 164968, "to": "mm"}, 3898 "name": "PA_CL_VPORT_ZOFFSET_1", 3899 "type_ref": "PA_CL_VPORT_ZOFFSET" 3900 }, 3901 { 3902 "chips": ["gfx7"], 3903 "map": {"at": 164972, "to": "mm"}, 3904 "name": "PA_CL_VPORT_XSCALE_2", 3905 "type_ref": "PA_CL_VPORT_XSCALE" 3906 }, 3907 { 3908 "chips": ["gfx7"], 3909 "map": {"at": 164976, "to": "mm"}, 3910 "name": "PA_CL_VPORT_XOFFSET_2", 3911 "type_ref": "PA_CL_VPORT_XOFFSET" 3912 }, 3913 { 3914 "chips": ["gfx7"], 3915 "map": {"at": 164980, "to": "mm"}, 3916 "name": "PA_CL_VPORT_YSCALE_2", 3917 "type_ref": "PA_CL_VPORT_YSCALE" 3918 }, 3919 { 3920 "chips": ["gfx7"], 3921 "map": {"at": 164984, "to": "mm"}, 3922 "name": "PA_CL_VPORT_YOFFSET_2", 3923 "type_ref": "PA_CL_VPORT_YOFFSET" 3924 }, 3925 { 3926 "chips": ["gfx7"], 3927 "map": {"at": 164988, "to": "mm"}, 3928 "name": "PA_CL_VPORT_ZSCALE_2", 3929 "type_ref": "PA_CL_VPORT_ZSCALE" 3930 }, 3931 { 3932 "chips": ["gfx7"], 3933 "map": {"at": 164992, "to": "mm"}, 3934 "name": "PA_CL_VPORT_ZOFFSET_2", 3935 "type_ref": "PA_CL_VPORT_ZOFFSET" 3936 }, 3937 { 3938 "chips": ["gfx7"], 3939 "map": {"at": 164996, "to": "mm"}, 3940 "name": "PA_CL_VPORT_XSCALE_3", 3941 "type_ref": "PA_CL_VPORT_XSCALE" 3942 }, 3943 { 3944 "chips": ["gfx7"], 3945 "map": {"at": 165000, "to": "mm"}, 3946 "name": "PA_CL_VPORT_XOFFSET_3", 3947 "type_ref": "PA_CL_VPORT_XOFFSET" 3948 }, 3949 { 3950 "chips": ["gfx7"], 3951 "map": {"at": 165004, "to": "mm"}, 3952 "name": "PA_CL_VPORT_YSCALE_3", 3953 "type_ref": "PA_CL_VPORT_YSCALE" 3954 }, 3955 { 3956 "chips": ["gfx7"], 3957 "map": {"at": 165008, "to": "mm"}, 3958 "name": "PA_CL_VPORT_YOFFSET_3", 3959 "type_ref": "PA_CL_VPORT_YOFFSET" 3960 }, 3961 { 3962 "chips": ["gfx7"], 3963 "map": {"at": 165012, "to": "mm"}, 3964 "name": "PA_CL_VPORT_ZSCALE_3", 3965 "type_ref": "PA_CL_VPORT_ZSCALE" 3966 }, 3967 { 3968 "chips": ["gfx7"], 3969 "map": {"at": 165016, "to": "mm"}, 3970 "name": "PA_CL_VPORT_ZOFFSET_3", 3971 "type_ref": "PA_CL_VPORT_ZOFFSET" 3972 }, 3973 { 3974 "chips": ["gfx7"], 3975 "map": {"at": 165020, "to": "mm"}, 3976 "name": "PA_CL_VPORT_XSCALE_4", 3977 "type_ref": "PA_CL_VPORT_XSCALE" 3978 }, 3979 { 3980 "chips": ["gfx7"], 3981 "map": {"at": 165024, "to": "mm"}, 3982 "name": "PA_CL_VPORT_XOFFSET_4", 3983 "type_ref": "PA_CL_VPORT_XOFFSET" 3984 }, 3985 { 3986 "chips": ["gfx7"], 3987 "map": {"at": 165028, "to": "mm"}, 3988 "name": "PA_CL_VPORT_YSCALE_4", 3989 "type_ref": "PA_CL_VPORT_YSCALE" 3990 }, 3991 { 3992 "chips": ["gfx7"], 3993 "map": {"at": 165032, "to": "mm"}, 3994 "name": "PA_CL_VPORT_YOFFSET_4", 3995 "type_ref": "PA_CL_VPORT_YOFFSET" 3996 }, 3997 { 3998 "chips": ["gfx7"], 3999 "map": {"at": 165036, "to": "mm"}, 4000 "name": "PA_CL_VPORT_ZSCALE_4", 4001 "type_ref": "PA_CL_VPORT_ZSCALE" 4002 }, 4003 { 4004 "chips": ["gfx7"], 4005 "map": {"at": 165040, "to": "mm"}, 4006 "name": "PA_CL_VPORT_ZOFFSET_4", 4007 "type_ref": "PA_CL_VPORT_ZOFFSET" 4008 }, 4009 { 4010 "chips": ["gfx7"], 4011 "map": {"at": 165044, "to": "mm"}, 4012 "name": "PA_CL_VPORT_XSCALE_5", 4013 "type_ref": "PA_CL_VPORT_XSCALE" 4014 }, 4015 { 4016 "chips": ["gfx7"], 4017 "map": {"at": 165048, "to": "mm"}, 4018 "name": "PA_CL_VPORT_XOFFSET_5", 4019 "type_ref": "PA_CL_VPORT_XOFFSET" 4020 }, 4021 { 4022 "chips": ["gfx7"], 4023 "map": {"at": 165052, "to": "mm"}, 4024 "name": "PA_CL_VPORT_YSCALE_5", 4025 "type_ref": "PA_CL_VPORT_YSCALE" 4026 }, 4027 { 4028 "chips": ["gfx7"], 4029 "map": {"at": 165056, "to": "mm"}, 4030 "name": "PA_CL_VPORT_YOFFSET_5", 4031 "type_ref": "PA_CL_VPORT_YOFFSET" 4032 }, 4033 { 4034 "chips": ["gfx7"], 4035 "map": {"at": 165060, "to": "mm"}, 4036 "name": "PA_CL_VPORT_ZSCALE_5", 4037 "type_ref": "PA_CL_VPORT_ZSCALE" 4038 }, 4039 { 4040 "chips": ["gfx7"], 4041 "map": {"at": 165064, "to": "mm"}, 4042 "name": "PA_CL_VPORT_ZOFFSET_5", 4043 "type_ref": "PA_CL_VPORT_ZOFFSET" 4044 }, 4045 { 4046 "chips": ["gfx7"], 4047 "map": {"at": 165068, "to": "mm"}, 4048 "name": "PA_CL_VPORT_XSCALE_6", 4049 "type_ref": "PA_CL_VPORT_XSCALE" 4050 }, 4051 { 4052 "chips": ["gfx7"], 4053 "map": {"at": 165072, "to": "mm"}, 4054 "name": "PA_CL_VPORT_XOFFSET_6", 4055 "type_ref": "PA_CL_VPORT_XOFFSET" 4056 }, 4057 { 4058 "chips": ["gfx7"], 4059 "map": {"at": 165076, "to": "mm"}, 4060 "name": "PA_CL_VPORT_YSCALE_6", 4061 "type_ref": "PA_CL_VPORT_YSCALE" 4062 }, 4063 { 4064 "chips": ["gfx7"], 4065 "map": {"at": 165080, "to": "mm"}, 4066 "name": "PA_CL_VPORT_YOFFSET_6", 4067 "type_ref": "PA_CL_VPORT_YOFFSET" 4068 }, 4069 { 4070 "chips": ["gfx7"], 4071 "map": {"at": 165084, "to": "mm"}, 4072 "name": "PA_CL_VPORT_ZSCALE_6", 4073 "type_ref": "PA_CL_VPORT_ZSCALE" 4074 }, 4075 { 4076 "chips": ["gfx7"], 4077 "map": {"at": 165088, "to": "mm"}, 4078 "name": "PA_CL_VPORT_ZOFFSET_6", 4079 "type_ref": "PA_CL_VPORT_ZOFFSET" 4080 }, 4081 { 4082 "chips": ["gfx7"], 4083 "map": {"at": 165092, "to": "mm"}, 4084 "name": "PA_CL_VPORT_XSCALE_7", 4085 "type_ref": "PA_CL_VPORT_XSCALE" 4086 }, 4087 { 4088 "chips": ["gfx7"], 4089 "map": {"at": 165096, "to": "mm"}, 4090 "name": "PA_CL_VPORT_XOFFSET_7", 4091 "type_ref": "PA_CL_VPORT_XOFFSET" 4092 }, 4093 { 4094 "chips": ["gfx7"], 4095 "map": {"at": 165100, "to": "mm"}, 4096 "name": "PA_CL_VPORT_YSCALE_7", 4097 "type_ref": "PA_CL_VPORT_YSCALE" 4098 }, 4099 { 4100 "chips": ["gfx7"], 4101 "map": {"at": 165104, "to": "mm"}, 4102 "name": "PA_CL_VPORT_YOFFSET_7", 4103 "type_ref": "PA_CL_VPORT_YOFFSET" 4104 }, 4105 { 4106 "chips": ["gfx7"], 4107 "map": {"at": 165108, "to": "mm"}, 4108 "name": "PA_CL_VPORT_ZSCALE_7", 4109 "type_ref": "PA_CL_VPORT_ZSCALE" 4110 }, 4111 { 4112 "chips": ["gfx7"], 4113 "map": {"at": 165112, "to": "mm"}, 4114 "name": "PA_CL_VPORT_ZOFFSET_7", 4115 "type_ref": "PA_CL_VPORT_ZOFFSET" 4116 }, 4117 { 4118 "chips": ["gfx7"], 4119 "map": {"at": 165116, "to": "mm"}, 4120 "name": "PA_CL_VPORT_XSCALE_8", 4121 "type_ref": "PA_CL_VPORT_XSCALE" 4122 }, 4123 { 4124 "chips": ["gfx7"], 4125 "map": {"at": 165120, "to": "mm"}, 4126 "name": "PA_CL_VPORT_XOFFSET_8", 4127 "type_ref": "PA_CL_VPORT_XOFFSET" 4128 }, 4129 { 4130 "chips": ["gfx7"], 4131 "map": {"at": 165124, "to": "mm"}, 4132 "name": "PA_CL_VPORT_YSCALE_8", 4133 "type_ref": "PA_CL_VPORT_YSCALE" 4134 }, 4135 { 4136 "chips": ["gfx7"], 4137 "map": {"at": 165128, "to": "mm"}, 4138 "name": "PA_CL_VPORT_YOFFSET_8", 4139 "type_ref": "PA_CL_VPORT_YOFFSET" 4140 }, 4141 { 4142 "chips": ["gfx7"], 4143 "map": {"at": 165132, "to": "mm"}, 4144 "name": "PA_CL_VPORT_ZSCALE_8", 4145 "type_ref": "PA_CL_VPORT_ZSCALE" 4146 }, 4147 { 4148 "chips": ["gfx7"], 4149 "map": {"at": 165136, "to": "mm"}, 4150 "name": "PA_CL_VPORT_ZOFFSET_8", 4151 "type_ref": "PA_CL_VPORT_ZOFFSET" 4152 }, 4153 { 4154 "chips": ["gfx7"], 4155 "map": {"at": 165140, "to": "mm"}, 4156 "name": "PA_CL_VPORT_XSCALE_9", 4157 "type_ref": "PA_CL_VPORT_XSCALE" 4158 }, 4159 { 4160 "chips": ["gfx7"], 4161 "map": {"at": 165144, "to": "mm"}, 4162 "name": "PA_CL_VPORT_XOFFSET_9", 4163 "type_ref": "PA_CL_VPORT_XOFFSET" 4164 }, 4165 { 4166 "chips": ["gfx7"], 4167 "map": {"at": 165148, "to": "mm"}, 4168 "name": "PA_CL_VPORT_YSCALE_9", 4169 "type_ref": "PA_CL_VPORT_YSCALE" 4170 }, 4171 { 4172 "chips": ["gfx7"], 4173 "map": {"at": 165152, "to": "mm"}, 4174 "name": "PA_CL_VPORT_YOFFSET_9", 4175 "type_ref": "PA_CL_VPORT_YOFFSET" 4176 }, 4177 { 4178 "chips": ["gfx7"], 4179 "map": {"at": 165156, "to": "mm"}, 4180 "name": "PA_CL_VPORT_ZSCALE_9", 4181 "type_ref": "PA_CL_VPORT_ZSCALE" 4182 }, 4183 { 4184 "chips": ["gfx7"], 4185 "map": {"at": 165160, "to": "mm"}, 4186 "name": "PA_CL_VPORT_ZOFFSET_9", 4187 "type_ref": "PA_CL_VPORT_ZOFFSET" 4188 }, 4189 { 4190 "chips": ["gfx7"], 4191 "map": {"at": 165164, "to": "mm"}, 4192 "name": "PA_CL_VPORT_XSCALE_10", 4193 "type_ref": "PA_CL_VPORT_XSCALE" 4194 }, 4195 { 4196 "chips": ["gfx7"], 4197 "map": {"at": 165168, "to": "mm"}, 4198 "name": "PA_CL_VPORT_XOFFSET_10", 4199 "type_ref": "PA_CL_VPORT_XOFFSET" 4200 }, 4201 { 4202 "chips": ["gfx7"], 4203 "map": {"at": 165172, "to": "mm"}, 4204 "name": "PA_CL_VPORT_YSCALE_10", 4205 "type_ref": "PA_CL_VPORT_YSCALE" 4206 }, 4207 { 4208 "chips": ["gfx7"], 4209 "map": {"at": 165176, "to": "mm"}, 4210 "name": "PA_CL_VPORT_YOFFSET_10", 4211 "type_ref": "PA_CL_VPORT_YOFFSET" 4212 }, 4213 { 4214 "chips": ["gfx7"], 4215 "map": {"at": 165180, "to": "mm"}, 4216 "name": "PA_CL_VPORT_ZSCALE_10", 4217 "type_ref": "PA_CL_VPORT_ZSCALE" 4218 }, 4219 { 4220 "chips": ["gfx7"], 4221 "map": {"at": 165184, "to": "mm"}, 4222 "name": "PA_CL_VPORT_ZOFFSET_10", 4223 "type_ref": "PA_CL_VPORT_ZOFFSET" 4224 }, 4225 { 4226 "chips": ["gfx7"], 4227 "map": {"at": 165188, "to": "mm"}, 4228 "name": "PA_CL_VPORT_XSCALE_11", 4229 "type_ref": "PA_CL_VPORT_XSCALE" 4230 }, 4231 { 4232 "chips": ["gfx7"], 4233 "map": {"at": 165192, "to": "mm"}, 4234 "name": "PA_CL_VPORT_XOFFSET_11", 4235 "type_ref": "PA_CL_VPORT_XOFFSET" 4236 }, 4237 { 4238 "chips": ["gfx7"], 4239 "map": {"at": 165196, "to": "mm"}, 4240 "name": "PA_CL_VPORT_YSCALE_11", 4241 "type_ref": "PA_CL_VPORT_YSCALE" 4242 }, 4243 { 4244 "chips": ["gfx7"], 4245 "map": {"at": 165200, "to": "mm"}, 4246 "name": "PA_CL_VPORT_YOFFSET_11", 4247 "type_ref": "PA_CL_VPORT_YOFFSET" 4248 }, 4249 { 4250 "chips": ["gfx7"], 4251 "map": {"at": 165204, "to": "mm"}, 4252 "name": "PA_CL_VPORT_ZSCALE_11", 4253 "type_ref": "PA_CL_VPORT_ZSCALE" 4254 }, 4255 { 4256 "chips": ["gfx7"], 4257 "map": {"at": 165208, "to": "mm"}, 4258 "name": "PA_CL_VPORT_ZOFFSET_11", 4259 "type_ref": "PA_CL_VPORT_ZOFFSET" 4260 }, 4261 { 4262 "chips": ["gfx7"], 4263 "map": {"at": 165212, "to": "mm"}, 4264 "name": "PA_CL_VPORT_XSCALE_12", 4265 "type_ref": "PA_CL_VPORT_XSCALE" 4266 }, 4267 { 4268 "chips": ["gfx7"], 4269 "map": {"at": 165216, "to": "mm"}, 4270 "name": "PA_CL_VPORT_XOFFSET_12", 4271 "type_ref": "PA_CL_VPORT_XOFFSET" 4272 }, 4273 { 4274 "chips": ["gfx7"], 4275 "map": {"at": 165220, "to": "mm"}, 4276 "name": "PA_CL_VPORT_YSCALE_12", 4277 "type_ref": "PA_CL_VPORT_YSCALE" 4278 }, 4279 { 4280 "chips": ["gfx7"], 4281 "map": {"at": 165224, "to": "mm"}, 4282 "name": "PA_CL_VPORT_YOFFSET_12", 4283 "type_ref": "PA_CL_VPORT_YOFFSET" 4284 }, 4285 { 4286 "chips": ["gfx7"], 4287 "map": {"at": 165228, "to": "mm"}, 4288 "name": "PA_CL_VPORT_ZSCALE_12", 4289 "type_ref": "PA_CL_VPORT_ZSCALE" 4290 }, 4291 { 4292 "chips": ["gfx7"], 4293 "map": {"at": 165232, "to": "mm"}, 4294 "name": "PA_CL_VPORT_ZOFFSET_12", 4295 "type_ref": "PA_CL_VPORT_ZOFFSET" 4296 }, 4297 { 4298 "chips": ["gfx7"], 4299 "map": {"at": 165236, "to": "mm"}, 4300 "name": "PA_CL_VPORT_XSCALE_13", 4301 "type_ref": "PA_CL_VPORT_XSCALE" 4302 }, 4303 { 4304 "chips": ["gfx7"], 4305 "map": {"at": 165240, "to": "mm"}, 4306 "name": "PA_CL_VPORT_XOFFSET_13", 4307 "type_ref": "PA_CL_VPORT_XOFFSET" 4308 }, 4309 { 4310 "chips": ["gfx7"], 4311 "map": {"at": 165244, "to": "mm"}, 4312 "name": "PA_CL_VPORT_YSCALE_13", 4313 "type_ref": "PA_CL_VPORT_YSCALE" 4314 }, 4315 { 4316 "chips": ["gfx7"], 4317 "map": {"at": 165248, "to": "mm"}, 4318 "name": "PA_CL_VPORT_YOFFSET_13", 4319 "type_ref": "PA_CL_VPORT_YOFFSET" 4320 }, 4321 { 4322 "chips": ["gfx7"], 4323 "map": {"at": 165252, "to": "mm"}, 4324 "name": "PA_CL_VPORT_ZSCALE_13", 4325 "type_ref": "PA_CL_VPORT_ZSCALE" 4326 }, 4327 { 4328 "chips": ["gfx7"], 4329 "map": {"at": 165256, "to": "mm"}, 4330 "name": "PA_CL_VPORT_ZOFFSET_13", 4331 "type_ref": "PA_CL_VPORT_ZOFFSET" 4332 }, 4333 { 4334 "chips": ["gfx7"], 4335 "map": {"at": 165260, "to": "mm"}, 4336 "name": "PA_CL_VPORT_XSCALE_14", 4337 "type_ref": "PA_CL_VPORT_XSCALE" 4338 }, 4339 { 4340 "chips": ["gfx7"], 4341 "map": {"at": 165264, "to": "mm"}, 4342 "name": "PA_CL_VPORT_XOFFSET_14", 4343 "type_ref": "PA_CL_VPORT_XOFFSET" 4344 }, 4345 { 4346 "chips": ["gfx7"], 4347 "map": {"at": 165268, "to": "mm"}, 4348 "name": "PA_CL_VPORT_YSCALE_14", 4349 "type_ref": "PA_CL_VPORT_YSCALE" 4350 }, 4351 { 4352 "chips": ["gfx7"], 4353 "map": {"at": 165272, "to": "mm"}, 4354 "name": "PA_CL_VPORT_YOFFSET_14", 4355 "type_ref": "PA_CL_VPORT_YOFFSET" 4356 }, 4357 { 4358 "chips": ["gfx7"], 4359 "map": {"at": 165276, "to": "mm"}, 4360 "name": "PA_CL_VPORT_ZSCALE_14", 4361 "type_ref": "PA_CL_VPORT_ZSCALE" 4362 }, 4363 { 4364 "chips": ["gfx7"], 4365 "map": {"at": 165280, "to": "mm"}, 4366 "name": "PA_CL_VPORT_ZOFFSET_14", 4367 "type_ref": "PA_CL_VPORT_ZOFFSET" 4368 }, 4369 { 4370 "chips": ["gfx7"], 4371 "map": {"at": 165284, "to": "mm"}, 4372 "name": "PA_CL_VPORT_XSCALE_15", 4373 "type_ref": "PA_CL_VPORT_XSCALE" 4374 }, 4375 { 4376 "chips": ["gfx7"], 4377 "map": {"at": 165288, "to": "mm"}, 4378 "name": "PA_CL_VPORT_XOFFSET_15", 4379 "type_ref": "PA_CL_VPORT_XOFFSET" 4380 }, 4381 { 4382 "chips": ["gfx7"], 4383 "map": {"at": 165292, "to": "mm"}, 4384 "name": "PA_CL_VPORT_YSCALE_15", 4385 "type_ref": "PA_CL_VPORT_YSCALE" 4386 }, 4387 { 4388 "chips": ["gfx7"], 4389 "map": {"at": 165296, "to": "mm"}, 4390 "name": "PA_CL_VPORT_YOFFSET_15", 4391 "type_ref": "PA_CL_VPORT_YOFFSET" 4392 }, 4393 { 4394 "chips": ["gfx7"], 4395 "map": {"at": 165300, "to": "mm"}, 4396 "name": "PA_CL_VPORT_ZSCALE_15", 4397 "type_ref": "PA_CL_VPORT_ZSCALE" 4398 }, 4399 { 4400 "chips": ["gfx7"], 4401 "map": {"at": 165304, "to": "mm"}, 4402 "name": "PA_CL_VPORT_ZOFFSET_15", 4403 "type_ref": "PA_CL_VPORT_ZOFFSET" 4404 }, 4405 { 4406 "chips": ["gfx7"], 4407 "map": {"at": 165308, "to": "mm"}, 4408 "name": "PA_CL_UCP_0_X", 4409 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4410 }, 4411 { 4412 "chips": ["gfx7"], 4413 "map": {"at": 165312, "to": "mm"}, 4414 "name": "PA_CL_UCP_0_Y", 4415 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4416 }, 4417 { 4418 "chips": ["gfx7"], 4419 "map": {"at": 165316, "to": "mm"}, 4420 "name": "PA_CL_UCP_0_Z", 4421 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4422 }, 4423 { 4424 "chips": ["gfx7"], 4425 "map": {"at": 165320, "to": "mm"}, 4426 "name": "PA_CL_UCP_0_W", 4427 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4428 }, 4429 { 4430 "chips": ["gfx7"], 4431 "map": {"at": 165324, "to": "mm"}, 4432 "name": "PA_CL_UCP_1_X", 4433 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4434 }, 4435 { 4436 "chips": ["gfx7"], 4437 "map": {"at": 165328, "to": "mm"}, 4438 "name": "PA_CL_UCP_1_Y", 4439 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4440 }, 4441 { 4442 "chips": ["gfx7"], 4443 "map": {"at": 165332, "to": "mm"}, 4444 "name": "PA_CL_UCP_1_Z", 4445 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4446 }, 4447 { 4448 "chips": ["gfx7"], 4449 "map": {"at": 165336, "to": "mm"}, 4450 "name": "PA_CL_UCP_1_W", 4451 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4452 }, 4453 { 4454 "chips": ["gfx7"], 4455 "map": {"at": 165340, "to": "mm"}, 4456 "name": "PA_CL_UCP_2_X", 4457 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4458 }, 4459 { 4460 "chips": ["gfx7"], 4461 "map": {"at": 165344, "to": "mm"}, 4462 "name": "PA_CL_UCP_2_Y", 4463 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4464 }, 4465 { 4466 "chips": ["gfx7"], 4467 "map": {"at": 165348, "to": "mm"}, 4468 "name": "PA_CL_UCP_2_Z", 4469 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4470 }, 4471 { 4472 "chips": ["gfx7"], 4473 "map": {"at": 165352, "to": "mm"}, 4474 "name": "PA_CL_UCP_2_W", 4475 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4476 }, 4477 { 4478 "chips": ["gfx7"], 4479 "map": {"at": 165356, "to": "mm"}, 4480 "name": "PA_CL_UCP_3_X", 4481 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4482 }, 4483 { 4484 "chips": ["gfx7"], 4485 "map": {"at": 165360, "to": "mm"}, 4486 "name": "PA_CL_UCP_3_Y", 4487 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4488 }, 4489 { 4490 "chips": ["gfx7"], 4491 "map": {"at": 165364, "to": "mm"}, 4492 "name": "PA_CL_UCP_3_Z", 4493 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4494 }, 4495 { 4496 "chips": ["gfx7"], 4497 "map": {"at": 165368, "to": "mm"}, 4498 "name": "PA_CL_UCP_3_W", 4499 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4500 }, 4501 { 4502 "chips": ["gfx7"], 4503 "map": {"at": 165372, "to": "mm"}, 4504 "name": "PA_CL_UCP_4_X", 4505 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4506 }, 4507 { 4508 "chips": ["gfx7"], 4509 "map": {"at": 165376, "to": "mm"}, 4510 "name": "PA_CL_UCP_4_Y", 4511 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4512 }, 4513 { 4514 "chips": ["gfx7"], 4515 "map": {"at": 165380, "to": "mm"}, 4516 "name": "PA_CL_UCP_4_Z", 4517 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4518 }, 4519 { 4520 "chips": ["gfx7"], 4521 "map": {"at": 165384, "to": "mm"}, 4522 "name": "PA_CL_UCP_4_W", 4523 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4524 }, 4525 { 4526 "chips": ["gfx7"], 4527 "map": {"at": 165388, "to": "mm"}, 4528 "name": "PA_CL_UCP_5_X", 4529 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4530 }, 4531 { 4532 "chips": ["gfx7"], 4533 "map": {"at": 165392, "to": "mm"}, 4534 "name": "PA_CL_UCP_5_Y", 4535 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4536 }, 4537 { 4538 "chips": ["gfx7"], 4539 "map": {"at": 165396, "to": "mm"}, 4540 "name": "PA_CL_UCP_5_Z", 4541 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4542 }, 4543 { 4544 "chips": ["gfx7"], 4545 "map": {"at": 165400, "to": "mm"}, 4546 "name": "PA_CL_UCP_5_W", 4547 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4548 }, 4549 { 4550 "chips": ["gfx7"], 4551 "map": {"at": 165444, "to": "mm"}, 4552 "name": "SPI_PS_INPUT_CNTL_0", 4553 "type_ref": "SPI_PS_INPUT_CNTL_0" 4554 }, 4555 { 4556 "chips": ["gfx7"], 4557 "map": {"at": 165448, "to": "mm"}, 4558 "name": "SPI_PS_INPUT_CNTL_1", 4559 "type_ref": "SPI_PS_INPUT_CNTL_0" 4560 }, 4561 { 4562 "chips": ["gfx7"], 4563 "map": {"at": 165452, "to": "mm"}, 4564 "name": "SPI_PS_INPUT_CNTL_2", 4565 "type_ref": "SPI_PS_INPUT_CNTL_0" 4566 }, 4567 { 4568 "chips": ["gfx7"], 4569 "map": {"at": 165456, "to": "mm"}, 4570 "name": "SPI_PS_INPUT_CNTL_3", 4571 "type_ref": "SPI_PS_INPUT_CNTL_0" 4572 }, 4573 { 4574 "chips": ["gfx7"], 4575 "map": {"at": 165460, "to": "mm"}, 4576 "name": "SPI_PS_INPUT_CNTL_4", 4577 "type_ref": "SPI_PS_INPUT_CNTL_0" 4578 }, 4579 { 4580 "chips": ["gfx7"], 4581 "map": {"at": 165464, "to": "mm"}, 4582 "name": "SPI_PS_INPUT_CNTL_5", 4583 "type_ref": "SPI_PS_INPUT_CNTL_0" 4584 }, 4585 { 4586 "chips": ["gfx7"], 4587 "map": {"at": 165468, "to": "mm"}, 4588 "name": "SPI_PS_INPUT_CNTL_6", 4589 "type_ref": "SPI_PS_INPUT_CNTL_0" 4590 }, 4591 { 4592 "chips": ["gfx7"], 4593 "map": {"at": 165472, "to": "mm"}, 4594 "name": "SPI_PS_INPUT_CNTL_7", 4595 "type_ref": "SPI_PS_INPUT_CNTL_0" 4596 }, 4597 { 4598 "chips": ["gfx7"], 4599 "map": {"at": 165476, "to": "mm"}, 4600 "name": "SPI_PS_INPUT_CNTL_8", 4601 "type_ref": "SPI_PS_INPUT_CNTL_0" 4602 }, 4603 { 4604 "chips": ["gfx7"], 4605 "map": {"at": 165480, "to": "mm"}, 4606 "name": "SPI_PS_INPUT_CNTL_9", 4607 "type_ref": "SPI_PS_INPUT_CNTL_0" 4608 }, 4609 { 4610 "chips": ["gfx7"], 4611 "map": {"at": 165484, "to": "mm"}, 4612 "name": "SPI_PS_INPUT_CNTL_10", 4613 "type_ref": "SPI_PS_INPUT_CNTL_0" 4614 }, 4615 { 4616 "chips": ["gfx7"], 4617 "map": {"at": 165488, "to": "mm"}, 4618 "name": "SPI_PS_INPUT_CNTL_11", 4619 "type_ref": "SPI_PS_INPUT_CNTL_0" 4620 }, 4621 { 4622 "chips": ["gfx7"], 4623 "map": {"at": 165492, "to": "mm"}, 4624 "name": "SPI_PS_INPUT_CNTL_12", 4625 "type_ref": "SPI_PS_INPUT_CNTL_0" 4626 }, 4627 { 4628 "chips": ["gfx7"], 4629 "map": {"at": 165496, "to": "mm"}, 4630 "name": "SPI_PS_INPUT_CNTL_13", 4631 "type_ref": "SPI_PS_INPUT_CNTL_0" 4632 }, 4633 { 4634 "chips": ["gfx7"], 4635 "map": {"at": 165500, "to": "mm"}, 4636 "name": "SPI_PS_INPUT_CNTL_14", 4637 "type_ref": "SPI_PS_INPUT_CNTL_0" 4638 }, 4639 { 4640 "chips": ["gfx7"], 4641 "map": {"at": 165504, "to": "mm"}, 4642 "name": "SPI_PS_INPUT_CNTL_15", 4643 "type_ref": "SPI_PS_INPUT_CNTL_0" 4644 }, 4645 { 4646 "chips": ["gfx7"], 4647 "map": {"at": 165508, "to": "mm"}, 4648 "name": "SPI_PS_INPUT_CNTL_16", 4649 "type_ref": "SPI_PS_INPUT_CNTL_0" 4650 }, 4651 { 4652 "chips": ["gfx7"], 4653 "map": {"at": 165512, "to": "mm"}, 4654 "name": "SPI_PS_INPUT_CNTL_17", 4655 "type_ref": "SPI_PS_INPUT_CNTL_0" 4656 }, 4657 { 4658 "chips": ["gfx7"], 4659 "map": {"at": 165516, "to": "mm"}, 4660 "name": "SPI_PS_INPUT_CNTL_18", 4661 "type_ref": "SPI_PS_INPUT_CNTL_0" 4662 }, 4663 { 4664 "chips": ["gfx7"], 4665 "map": {"at": 165520, "to": "mm"}, 4666 "name": "SPI_PS_INPUT_CNTL_19", 4667 "type_ref": "SPI_PS_INPUT_CNTL_0" 4668 }, 4669 { 4670 "chips": ["gfx7"], 4671 "map": {"at": 165524, "to": "mm"}, 4672 "name": "SPI_PS_INPUT_CNTL_20", 4673 "type_ref": "SPI_PS_INPUT_CNTL_20" 4674 }, 4675 { 4676 "chips": ["gfx7"], 4677 "map": {"at": 165528, "to": "mm"}, 4678 "name": "SPI_PS_INPUT_CNTL_21", 4679 "type_ref": "SPI_PS_INPUT_CNTL_20" 4680 }, 4681 { 4682 "chips": ["gfx7"], 4683 "map": {"at": 165532, "to": "mm"}, 4684 "name": "SPI_PS_INPUT_CNTL_22", 4685 "type_ref": "SPI_PS_INPUT_CNTL_20" 4686 }, 4687 { 4688 "chips": ["gfx7"], 4689 "map": {"at": 165536, "to": "mm"}, 4690 "name": "SPI_PS_INPUT_CNTL_23", 4691 "type_ref": "SPI_PS_INPUT_CNTL_20" 4692 }, 4693 { 4694 "chips": ["gfx7"], 4695 "map": {"at": 165540, "to": "mm"}, 4696 "name": "SPI_PS_INPUT_CNTL_24", 4697 "type_ref": "SPI_PS_INPUT_CNTL_20" 4698 }, 4699 { 4700 "chips": ["gfx7"], 4701 "map": {"at": 165544, "to": "mm"}, 4702 "name": "SPI_PS_INPUT_CNTL_25", 4703 "type_ref": "SPI_PS_INPUT_CNTL_20" 4704 }, 4705 { 4706 "chips": ["gfx7"], 4707 "map": {"at": 165548, "to": "mm"}, 4708 "name": "SPI_PS_INPUT_CNTL_26", 4709 "type_ref": "SPI_PS_INPUT_CNTL_20" 4710 }, 4711 { 4712 "chips": ["gfx7"], 4713 "map": {"at": 165552, "to": "mm"}, 4714 "name": "SPI_PS_INPUT_CNTL_27", 4715 "type_ref": "SPI_PS_INPUT_CNTL_20" 4716 }, 4717 { 4718 "chips": ["gfx7"], 4719 "map": {"at": 165556, "to": "mm"}, 4720 "name": "SPI_PS_INPUT_CNTL_28", 4721 "type_ref": "SPI_PS_INPUT_CNTL_20" 4722 }, 4723 { 4724 "chips": ["gfx7"], 4725 "map": {"at": 165560, "to": "mm"}, 4726 "name": "SPI_PS_INPUT_CNTL_29", 4727 "type_ref": "SPI_PS_INPUT_CNTL_20" 4728 }, 4729 { 4730 "chips": ["gfx7"], 4731 "map": {"at": 165564, "to": "mm"}, 4732 "name": "SPI_PS_INPUT_CNTL_30", 4733 "type_ref": "SPI_PS_INPUT_CNTL_20" 4734 }, 4735 { 4736 "chips": ["gfx7"], 4737 "map": {"at": 165568, "to": "mm"}, 4738 "name": "SPI_PS_INPUT_CNTL_31", 4739 "type_ref": "SPI_PS_INPUT_CNTL_20" 4740 }, 4741 { 4742 "chips": ["gfx7"], 4743 "map": {"at": 165572, "to": "mm"}, 4744 "name": "SPI_VS_OUT_CONFIG", 4745 "type_ref": "SPI_VS_OUT_CONFIG" 4746 }, 4747 { 4748 "chips": ["gfx7"], 4749 "map": {"at": 165580, "to": "mm"}, 4750 "name": "SPI_PS_INPUT_ENA", 4751 "type_ref": "SPI_PS_INPUT_ENA" 4752 }, 4753 { 4754 "chips": ["gfx7"], 4755 "map": {"at": 165584, "to": "mm"}, 4756 "name": "SPI_PS_INPUT_ADDR", 4757 "type_ref": "SPI_PS_INPUT_ENA" 4758 }, 4759 { 4760 "chips": ["gfx7"], 4761 "map": {"at": 165588, "to": "mm"}, 4762 "name": "SPI_INTERP_CONTROL_0", 4763 "type_ref": "SPI_INTERP_CONTROL_0" 4764 }, 4765 { 4766 "chips": ["gfx7"], 4767 "map": {"at": 165592, "to": "mm"}, 4768 "name": "SPI_PS_IN_CONTROL", 4769 "type_ref": "SPI_PS_IN_CONTROL" 4770 }, 4771 { 4772 "chips": ["gfx7"], 4773 "map": {"at": 165600, "to": "mm"}, 4774 "name": "SPI_BARYC_CNTL", 4775 "type_ref": "SPI_BARYC_CNTL" 4776 }, 4777 { 4778 "chips": ["gfx7"], 4779 "map": {"at": 165608, "to": "mm"}, 4780 "name": "SPI_TMPRING_SIZE", 4781 "type_ref": "COMPUTE_TMPRING_SIZE" 4782 }, 4783 { 4784 "chips": ["gfx7"], 4785 "map": {"at": 165644, "to": "mm"}, 4786 "name": "SPI_SHADER_POS_FORMAT", 4787 "type_ref": "SPI_SHADER_POS_FORMAT" 4788 }, 4789 { 4790 "chips": ["gfx7"], 4791 "map": {"at": 165648, "to": "mm"}, 4792 "name": "SPI_SHADER_Z_FORMAT", 4793 "type_ref": "SPI_SHADER_Z_FORMAT" 4794 }, 4795 { 4796 "chips": ["gfx7"], 4797 "map": {"at": 165652, "to": "mm"}, 4798 "name": "SPI_SHADER_COL_FORMAT", 4799 "type_ref": "SPI_SHADER_COL_FORMAT" 4800 }, 4801 { 4802 "chips": ["gfx7"], 4803 "map": {"at": 165760, "to": "mm"}, 4804 "name": "CB_BLEND0_CONTROL", 4805 "type_ref": "CB_BLEND0_CONTROL" 4806 }, 4807 { 4808 "chips": ["gfx7"], 4809 "map": {"at": 165764, "to": "mm"}, 4810 "name": "CB_BLEND1_CONTROL", 4811 "type_ref": "CB_BLEND0_CONTROL" 4812 }, 4813 { 4814 "chips": ["gfx7"], 4815 "map": {"at": 165768, "to": "mm"}, 4816 "name": "CB_BLEND2_CONTROL", 4817 "type_ref": "CB_BLEND0_CONTROL" 4818 }, 4819 { 4820 "chips": ["gfx7"], 4821 "map": {"at": 165772, "to": "mm"}, 4822 "name": "CB_BLEND3_CONTROL", 4823 "type_ref": "CB_BLEND0_CONTROL" 4824 }, 4825 { 4826 "chips": ["gfx7"], 4827 "map": {"at": 165776, "to": "mm"}, 4828 "name": "CB_BLEND4_CONTROL", 4829 "type_ref": "CB_BLEND0_CONTROL" 4830 }, 4831 { 4832 "chips": ["gfx7"], 4833 "map": {"at": 165780, "to": "mm"}, 4834 "name": "CB_BLEND5_CONTROL", 4835 "type_ref": "CB_BLEND0_CONTROL" 4836 }, 4837 { 4838 "chips": ["gfx7"], 4839 "map": {"at": 165784, "to": "mm"}, 4840 "name": "CB_BLEND6_CONTROL", 4841 "type_ref": "CB_BLEND0_CONTROL" 4842 }, 4843 { 4844 "chips": ["gfx7"], 4845 "map": {"at": 165788, "to": "mm"}, 4846 "name": "CB_BLEND7_CONTROL", 4847 "type_ref": "CB_BLEND0_CONTROL" 4848 }, 4849 { 4850 "chips": ["gfx7"], 4851 "map": {"at": 165836, "to": "mm"}, 4852 "name": "CS_COPY_STATE", 4853 "type_ref": "CS_COPY_STATE" 4854 }, 4855 { 4856 "chips": ["gfx7"], 4857 "map": {"at": 165840, "to": "mm"}, 4858 "name": "GFX_COPY_STATE", 4859 "type_ref": "CS_COPY_STATE" 4860 }, 4861 { 4862 "chips": ["gfx7"], 4863 "map": {"at": 165844, "to": "mm"}, 4864 "name": "PA_CL_POINT_X_RAD", 4865 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4866 }, 4867 { 4868 "chips": ["gfx7"], 4869 "map": {"at": 165848, "to": "mm"}, 4870 "name": "PA_CL_POINT_Y_RAD", 4871 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4872 }, 4873 { 4874 "chips": ["gfx7"], 4875 "map": {"at": 165852, "to": "mm"}, 4876 "name": "PA_CL_POINT_SIZE", 4877 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4878 }, 4879 { 4880 "chips": ["gfx7"], 4881 "map": {"at": 165856, "to": "mm"}, 4882 "name": "PA_CL_POINT_CULL_RAD", 4883 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 4884 }, 4885 { 4886 "chips": ["gfx7"], 4887 "map": {"at": 165860, "to": "mm"}, 4888 "name": "VGT_DMA_BASE_HI", 4889 "type_ref": "VGT_DMA_BASE_HI" 4890 }, 4891 { 4892 "chips": ["gfx7"], 4893 "map": {"at": 165864, "to": "mm"}, 4894 "name": "VGT_DMA_BASE", 4895 "type_ref": "VGT_DMA_BASE" 4896 }, 4897 { 4898 "chips": ["gfx7"], 4899 "map": {"at": 165872, "to": "mm"}, 4900 "name": "VGT_DRAW_INITIATOR", 4901 "type_ref": "VGT_DRAW_INITIATOR" 4902 }, 4903 { 4904 "chips": ["gfx7"], 4905 "map": {"at": 165876, "to": "mm"}, 4906 "name": "VGT_IMMED_DATA", 4907 "type_ref": "CP_APPEND_DATA" 4908 }, 4909 { 4910 "chips": ["gfx7"], 4911 "map": {"at": 165880, "to": "mm"}, 4912 "name": "VGT_EVENT_ADDRESS_REG", 4913 "type_ref": "VGT_EVENT_ADDRESS_REG" 4914 }, 4915 { 4916 "chips": ["gfx7"], 4917 "map": {"at": 165888, "to": "mm"}, 4918 "name": "DB_DEPTH_CONTROL", 4919 "type_ref": "DB_DEPTH_CONTROL" 4920 }, 4921 { 4922 "chips": ["gfx7"], 4923 "map": {"at": 165892, "to": "mm"}, 4924 "name": "DB_EQAA", 4925 "type_ref": "DB_EQAA" 4926 }, 4927 { 4928 "chips": ["gfx7"], 4929 "map": {"at": 165896, "to": "mm"}, 4930 "name": "CB_COLOR_CONTROL", 4931 "type_ref": "CB_COLOR_CONTROL" 4932 }, 4933 { 4934 "chips": ["gfx7"], 4935 "map": {"at": 165900, "to": "mm"}, 4936 "name": "DB_SHADER_CONTROL", 4937 "type_ref": "DB_SHADER_CONTROL" 4938 }, 4939 { 4940 "chips": ["gfx7"], 4941 "map": {"at": 165904, "to": "mm"}, 4942 "name": "PA_CL_CLIP_CNTL", 4943 "type_ref": "PA_CL_CLIP_CNTL" 4944 }, 4945 { 4946 "chips": ["gfx7"], 4947 "map": {"at": 165908, "to": "mm"}, 4948 "name": "PA_SU_SC_MODE_CNTL", 4949 "type_ref": "PA_SU_SC_MODE_CNTL" 4950 }, 4951 { 4952 "chips": ["gfx7"], 4953 "map": {"at": 165912, "to": "mm"}, 4954 "name": "PA_CL_VTE_CNTL", 4955 "type_ref": "PA_CL_VTE_CNTL" 4956 }, 4957 { 4958 "chips": ["gfx7"], 4959 "map": {"at": 165916, "to": "mm"}, 4960 "name": "PA_CL_VS_OUT_CNTL", 4961 "type_ref": "PA_CL_VS_OUT_CNTL" 4962 }, 4963 { 4964 "chips": ["gfx7"], 4965 "map": {"at": 165920, "to": "mm"}, 4966 "name": "PA_CL_NANINF_CNTL", 4967 "type_ref": "PA_CL_NANINF_CNTL" 4968 }, 4969 { 4970 "chips": ["gfx7"], 4971 "map": {"at": 165924, "to": "mm"}, 4972 "name": "PA_SU_LINE_STIPPLE_CNTL", 4973 "type_ref": "PA_SU_LINE_STIPPLE_CNTL" 4974 }, 4975 { 4976 "chips": ["gfx7"], 4977 "map": {"at": 165928, "to": "mm"}, 4978 "name": "PA_SU_LINE_STIPPLE_SCALE", 4979 "type_ref": "PA_SU_LINE_STIPPLE_SCALE" 4980 }, 4981 { 4982 "chips": ["gfx7"], 4983 "map": {"at": 165932, "to": "mm"}, 4984 "name": "PA_SU_PRIM_FILTER_CNTL", 4985 "type_ref": "PA_SU_PRIM_FILTER_CNTL" 4986 }, 4987 { 4988 "chips": ["gfx7"], 4989 "map": {"at": 166400, "to": "mm"}, 4990 "name": "PA_SU_POINT_SIZE", 4991 "type_ref": "PA_SU_POINT_SIZE" 4992 }, 4993 { 4994 "chips": ["gfx7"], 4995 "map": {"at": 166404, "to": "mm"}, 4996 "name": "PA_SU_POINT_MINMAX", 4997 "type_ref": "PA_SU_POINT_MINMAX" 4998 }, 4999 { 5000 "chips": ["gfx7"], 5001 "map": {"at": 166408, "to": "mm"}, 5002 "name": "PA_SU_LINE_CNTL", 5003 "type_ref": "PA_SU_LINE_CNTL" 5004 }, 5005 { 5006 "chips": ["gfx7"], 5007 "map": {"at": 166412, "to": "mm"}, 5008 "name": "PA_SC_LINE_STIPPLE", 5009 "type_ref": "PA_SC_LINE_STIPPLE" 5010 }, 5011 { 5012 "chips": ["gfx7"], 5013 "map": {"at": 166416, "to": "mm"}, 5014 "name": "VGT_OUTPUT_PATH_CNTL", 5015 "type_ref": "VGT_OUTPUT_PATH_CNTL" 5016 }, 5017 { 5018 "chips": ["gfx7"], 5019 "map": {"at": 166420, "to": "mm"}, 5020 "name": "VGT_HOS_CNTL", 5021 "type_ref": "VGT_HOS_CNTL" 5022 }, 5023 { 5024 "chips": ["gfx7"], 5025 "map": {"at": 166424, "to": "mm"}, 5026 "name": "VGT_HOS_MAX_TESS_LEVEL", 5027 "type_ref": "VGT_HOS_MAX_TESS_LEVEL" 5028 }, 5029 { 5030 "chips": ["gfx7"], 5031 "map": {"at": 166428, "to": "mm"}, 5032 "name": "VGT_HOS_MIN_TESS_LEVEL", 5033 "type_ref": "VGT_HOS_MIN_TESS_LEVEL" 5034 }, 5035 { 5036 "chips": ["gfx7"], 5037 "map": {"at": 166432, "to": "mm"}, 5038 "name": "VGT_HOS_REUSE_DEPTH", 5039 "type_ref": "VGT_HOS_REUSE_DEPTH" 5040 }, 5041 { 5042 "chips": ["gfx7"], 5043 "map": {"at": 166436, "to": "mm"}, 5044 "name": "VGT_GROUP_PRIM_TYPE", 5045 "type_ref": "VGT_GROUP_PRIM_TYPE" 5046 }, 5047 { 5048 "chips": ["gfx7"], 5049 "map": {"at": 166440, "to": "mm"}, 5050 "name": "VGT_GROUP_FIRST_DECR", 5051 "type_ref": "VGT_GROUP_FIRST_DECR" 5052 }, 5053 { 5054 "chips": ["gfx7"], 5055 "map": {"at": 166444, "to": "mm"}, 5056 "name": "VGT_GROUP_DECR", 5057 "type_ref": "VGT_GROUP_DECR" 5058 }, 5059 { 5060 "chips": ["gfx7"], 5061 "map": {"at": 166448, "to": "mm"}, 5062 "name": "VGT_GROUP_VECT_0_CNTL", 5063 "type_ref": "VGT_GROUP_VECT_0_CNTL" 5064 }, 5065 { 5066 "chips": ["gfx7"], 5067 "map": {"at": 166452, "to": "mm"}, 5068 "name": "VGT_GROUP_VECT_1_CNTL", 5069 "type_ref": "VGT_GROUP_VECT_0_CNTL" 5070 }, 5071 { 5072 "chips": ["gfx7"], 5073 "map": {"at": 166456, "to": "mm"}, 5074 "name": "VGT_GROUP_VECT_0_FMT_CNTL", 5075 "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL" 5076 }, 5077 { 5078 "chips": ["gfx7"], 5079 "map": {"at": 166460, "to": "mm"}, 5080 "name": "VGT_GROUP_VECT_1_FMT_CNTL", 5081 "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL" 5082 }, 5083 { 5084 "chips": ["gfx7"], 5085 "map": {"at": 166464, "to": "mm"}, 5086 "name": "VGT_GS_MODE", 5087 "type_ref": "VGT_GS_MODE" 5088 }, 5089 { 5090 "chips": ["gfx7"], 5091 "map": {"at": 166468, "to": "mm"}, 5092 "name": "VGT_GS_ONCHIP_CNTL", 5093 "type_ref": "VGT_GS_ONCHIP_CNTL" 5094 }, 5095 { 5096 "chips": ["gfx7"], 5097 "map": {"at": 166472, "to": "mm"}, 5098 "name": "PA_SC_MODE_CNTL_0", 5099 "type_ref": "PA_SC_MODE_CNTL_0" 5100 }, 5101 { 5102 "chips": ["gfx7"], 5103 "map": {"at": 166476, "to": "mm"}, 5104 "name": "PA_SC_MODE_CNTL_1", 5105 "type_ref": "PA_SC_MODE_CNTL_1" 5106 }, 5107 { 5108 "chips": ["gfx7"], 5109 "map": {"at": 166480, "to": "mm"}, 5110 "name": "VGT_ENHANCE", 5111 "type_ref": "IA_ENHANCE" 5112 }, 5113 { 5114 "chips": ["gfx7"], 5115 "map": {"at": 166484, "to": "mm"}, 5116 "name": "VGT_GS_PER_ES", 5117 "type_ref": "VGT_GS_PER_ES" 5118 }, 5119 { 5120 "chips": ["gfx7"], 5121 "map": {"at": 166488, "to": "mm"}, 5122 "name": "VGT_ES_PER_GS", 5123 "type_ref": "VGT_ES_PER_GS" 5124 }, 5125 { 5126 "chips": ["gfx7"], 5127 "map": {"at": 166492, "to": "mm"}, 5128 "name": "VGT_GS_PER_VS", 5129 "type_ref": "VGT_GS_PER_VS" 5130 }, 5131 { 5132 "chips": ["gfx7"], 5133 "map": {"at": 166496, "to": "mm"}, 5134 "name": "VGT_GSVS_RING_OFFSET_1", 5135 "type_ref": "VGT_GSVS_RING_OFFSET_1" 5136 }, 5137 { 5138 "chips": ["gfx7"], 5139 "map": {"at": 166500, "to": "mm"}, 5140 "name": "VGT_GSVS_RING_OFFSET_2", 5141 "type_ref": "VGT_GSVS_RING_OFFSET_1" 5142 }, 5143 { 5144 "chips": ["gfx7"], 5145 "map": {"at": 166504, "to": "mm"}, 5146 "name": "VGT_GSVS_RING_OFFSET_3", 5147 "type_ref": "VGT_GSVS_RING_OFFSET_1" 5148 }, 5149 { 5150 "chips": ["gfx7"], 5151 "map": {"at": 166508, "to": "mm"}, 5152 "name": "VGT_GS_OUT_PRIM_TYPE", 5153 "type_ref": "VGT_GS_OUT_PRIM_TYPE" 5154 }, 5155 { 5156 "chips": ["gfx7"], 5157 "map": {"at": 166512, "to": "mm"}, 5158 "name": "IA_ENHANCE", 5159 "type_ref": "IA_ENHANCE" 5160 }, 5161 { 5162 "chips": ["gfx7"], 5163 "map": {"at": 166516, "to": "mm"}, 5164 "name": "VGT_DMA_SIZE", 5165 "type_ref": "VGT_DMA_SIZE" 5166 }, 5167 { 5168 "chips": ["gfx7"], 5169 "map": {"at": 166520, "to": "mm"}, 5170 "name": "VGT_DMA_MAX_SIZE", 5171 "type_ref": "VGT_DMA_MAX_SIZE" 5172 }, 5173 { 5174 "chips": ["gfx7"], 5175 "map": {"at": 166524, "to": "mm"}, 5176 "name": "VGT_DMA_INDEX_TYPE", 5177 "type_ref": "VGT_DMA_INDEX_TYPE" 5178 }, 5179 { 5180 "chips": ["gfx7"], 5181 "map": {"at": 166528, "to": "mm"}, 5182 "name": "WD_ENHANCE", 5183 "type_ref": "IA_ENHANCE" 5184 }, 5185 { 5186 "chips": ["gfx7"], 5187 "map": {"at": 166532, "to": "mm"}, 5188 "name": "VGT_PRIMITIVEID_EN", 5189 "type_ref": "VGT_PRIMITIVEID_EN" 5190 }, 5191 { 5192 "chips": ["gfx7"], 5193 "map": {"at": 166536, "to": "mm"}, 5194 "name": "VGT_DMA_NUM_INSTANCES", 5195 "type_ref": "VGT_DMA_NUM_INSTANCES" 5196 }, 5197 { 5198 "chips": ["gfx7"], 5199 "map": {"at": 166540, "to": "mm"}, 5200 "name": "VGT_PRIMITIVEID_RESET", 5201 "type_ref": "VGT_PRIMITIVEID_RESET" 5202 }, 5203 { 5204 "chips": ["gfx7"], 5205 "map": {"at": 166544, "to": "mm"}, 5206 "name": "VGT_EVENT_INITIATOR", 5207 "type_ref": "VGT_EVENT_INITIATOR" 5208 }, 5209 { 5210 "chips": ["gfx7"], 5211 "map": {"at": 166548, "to": "mm"}, 5212 "name": "VGT_MULTI_PRIM_IB_RESET_EN", 5213 "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN" 5214 }, 5215 { 5216 "chips": ["gfx7"], 5217 "map": {"at": 166560, "to": "mm"}, 5218 "name": "VGT_INSTANCE_STEP_RATE_0", 5219 "type_ref": "VGT_INSTANCE_STEP_RATE_0" 5220 }, 5221 { 5222 "chips": ["gfx7"], 5223 "map": {"at": 166564, "to": "mm"}, 5224 "name": "VGT_INSTANCE_STEP_RATE_1", 5225 "type_ref": "VGT_INSTANCE_STEP_RATE_0" 5226 }, 5227 { 5228 "chips": ["gfx7"], 5229 "map": {"at": 166568, "to": "mm"}, 5230 "name": "IA_MULTI_VGT_PARAM", 5231 "type_ref": "IA_MULTI_VGT_PARAM" 5232 }, 5233 { 5234 "chips": ["gfx7"], 5235 "map": {"at": 166572, "to": "mm"}, 5236 "name": "VGT_ESGS_RING_ITEMSIZE", 5237 "type_ref": "VGT_ESGS_RING_ITEMSIZE" 5238 }, 5239 { 5240 "chips": ["gfx7"], 5241 "map": {"at": 166576, "to": "mm"}, 5242 "name": "VGT_GSVS_RING_ITEMSIZE", 5243 "type_ref": "VGT_ESGS_RING_ITEMSIZE" 5244 }, 5245 { 5246 "chips": ["gfx7"], 5247 "map": {"at": 166580, "to": "mm"}, 5248 "name": "VGT_REUSE_OFF", 5249 "type_ref": "VGT_REUSE_OFF" 5250 }, 5251 { 5252 "chips": ["gfx7"], 5253 "map": {"at": 166584, "to": "mm"}, 5254 "name": "VGT_VTX_CNT_EN", 5255 "type_ref": "VGT_VTX_CNT_EN" 5256 }, 5257 { 5258 "chips": ["gfx7"], 5259 "map": {"at": 166588, "to": "mm"}, 5260 "name": "DB_HTILE_SURFACE", 5261 "type_ref": "DB_HTILE_SURFACE" 5262 }, 5263 { 5264 "chips": ["gfx7"], 5265 "map": {"at": 166592, "to": "mm"}, 5266 "name": "DB_SRESULTS_COMPARE_STATE0", 5267 "type_ref": "DB_SRESULTS_COMPARE_STATE0" 5268 }, 5269 { 5270 "chips": ["gfx7"], 5271 "map": {"at": 166596, "to": "mm"}, 5272 "name": "DB_SRESULTS_COMPARE_STATE1", 5273 "type_ref": "DB_SRESULTS_COMPARE_STATE1" 5274 }, 5275 { 5276 "chips": ["gfx7"], 5277 "map": {"at": 166600, "to": "mm"}, 5278 "name": "DB_PRELOAD_CONTROL", 5279 "type_ref": "DB_PRELOAD_CONTROL" 5280 }, 5281 { 5282 "chips": ["gfx7"], 5283 "map": {"at": 166608, "to": "mm"}, 5284 "name": "VGT_STRMOUT_BUFFER_SIZE_0", 5285 "type_ref": "COMPUTE_DIM_X" 5286 }, 5287 { 5288 "chips": ["gfx7"], 5289 "map": {"at": 166612, "to": "mm"}, 5290 "name": "VGT_STRMOUT_VTX_STRIDE_0", 5291 "type_ref": "VGT_STRMOUT_VTX_STRIDE_0" 5292 }, 5293 { 5294 "chips": ["gfx7"], 5295 "map": {"at": 166620, "to": "mm"}, 5296 "name": "VGT_STRMOUT_BUFFER_OFFSET_0", 5297 "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET" 5298 }, 5299 { 5300 "chips": ["gfx7"], 5301 "map": {"at": 166624, "to": "mm"}, 5302 "name": "VGT_STRMOUT_BUFFER_SIZE_1", 5303 "type_ref": "COMPUTE_DIM_X" 5304 }, 5305 { 5306 "chips": ["gfx7"], 5307 "map": {"at": 166628, "to": "mm"}, 5308 "name": "VGT_STRMOUT_VTX_STRIDE_1", 5309 "type_ref": "VGT_STRMOUT_VTX_STRIDE_0" 5310 }, 5311 { 5312 "chips": ["gfx7"], 5313 "map": {"at": 166636, "to": "mm"}, 5314 "name": "VGT_STRMOUT_BUFFER_OFFSET_1", 5315 "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET" 5316 }, 5317 { 5318 "chips": ["gfx7"], 5319 "map": {"at": 166640, "to": "mm"}, 5320 "name": "VGT_STRMOUT_BUFFER_SIZE_2", 5321 "type_ref": "COMPUTE_DIM_X" 5322 }, 5323 { 5324 "chips": ["gfx7"], 5325 "map": {"at": 166644, "to": "mm"}, 5326 "name": "VGT_STRMOUT_VTX_STRIDE_2", 5327 "type_ref": "VGT_STRMOUT_VTX_STRIDE_0" 5328 }, 5329 { 5330 "chips": ["gfx7"], 5331 "map": {"at": 166652, "to": "mm"}, 5332 "name": "VGT_STRMOUT_BUFFER_OFFSET_2", 5333 "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET" 5334 }, 5335 { 5336 "chips": ["gfx7"], 5337 "map": {"at": 166656, "to": "mm"}, 5338 "name": "VGT_STRMOUT_BUFFER_SIZE_3", 5339 "type_ref": "COMPUTE_DIM_X" 5340 }, 5341 { 5342 "chips": ["gfx7"], 5343 "map": {"at": 166660, "to": "mm"}, 5344 "name": "VGT_STRMOUT_VTX_STRIDE_3", 5345 "type_ref": "VGT_STRMOUT_VTX_STRIDE_0" 5346 }, 5347 { 5348 "chips": ["gfx7"], 5349 "map": {"at": 166668, "to": "mm"}, 5350 "name": "VGT_STRMOUT_BUFFER_OFFSET_3", 5351 "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET" 5352 }, 5353 { 5354 "chips": ["gfx7"], 5355 "map": {"at": 166696, "to": "mm"}, 5356 "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET", 5357 "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET" 5358 }, 5359 { 5360 "chips": ["gfx7"], 5361 "map": {"at": 166700, "to": "mm"}, 5362 "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE", 5363 "type_ref": "COMPUTE_DIM_X" 5364 }, 5365 { 5366 "chips": ["gfx7"], 5367 "map": {"at": 166704, "to": "mm"}, 5368 "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE", 5369 "type_ref": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE" 5370 }, 5371 { 5372 "chips": ["gfx7"], 5373 "map": {"at": 166712, "to": "mm"}, 5374 "name": "VGT_GS_MAX_VERT_OUT", 5375 "type_ref": "VGT_GS_MAX_VERT_OUT" 5376 }, 5377 { 5378 "chips": ["gfx7"], 5379 "map": {"at": 166740, "to": "mm"}, 5380 "name": "VGT_SHADER_STAGES_EN", 5381 "type_ref": "VGT_SHADER_STAGES_EN" 5382 }, 5383 { 5384 "chips": ["gfx7"], 5385 "map": {"at": 166744, "to": "mm"}, 5386 "name": "VGT_LS_HS_CONFIG", 5387 "type_ref": "VGT_LS_HS_CONFIG" 5388 }, 5389 { 5390 "chips": ["gfx7"], 5391 "map": {"at": 166748, "to": "mm"}, 5392 "name": "VGT_GS_VERT_ITEMSIZE", 5393 "type_ref": "VGT_ESGS_RING_ITEMSIZE" 5394 }, 5395 { 5396 "chips": ["gfx7"], 5397 "map": {"at": 166752, "to": "mm"}, 5398 "name": "VGT_GS_VERT_ITEMSIZE_1", 5399 "type_ref": "VGT_ESGS_RING_ITEMSIZE" 5400 }, 5401 { 5402 "chips": ["gfx7"], 5403 "map": {"at": 166756, "to": "mm"}, 5404 "name": "VGT_GS_VERT_ITEMSIZE_2", 5405 "type_ref": "VGT_ESGS_RING_ITEMSIZE" 5406 }, 5407 { 5408 "chips": ["gfx7"], 5409 "map": {"at": 166760, "to": "mm"}, 5410 "name": "VGT_GS_VERT_ITEMSIZE_3", 5411 "type_ref": "VGT_ESGS_RING_ITEMSIZE" 5412 }, 5413 { 5414 "chips": ["gfx7"], 5415 "map": {"at": 166764, "to": "mm"}, 5416 "name": "VGT_TF_PARAM", 5417 "type_ref": "VGT_TF_PARAM" 5418 }, 5419 { 5420 "chips": ["gfx7"], 5421 "map": {"at": 166768, "to": "mm"}, 5422 "name": "DB_ALPHA_TO_MASK", 5423 "type_ref": "DB_ALPHA_TO_MASK" 5424 }, 5425 { 5426 "chips": ["gfx7"], 5427 "map": {"at": 166772, "to": "mm"}, 5428 "name": "VGT_DISPATCH_DRAW_INDEX", 5429 "type_ref": "VGT_DISPATCH_DRAW_INDEX" 5430 }, 5431 { 5432 "chips": ["gfx7"], 5433 "map": {"at": 166776, "to": "mm"}, 5434 "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL", 5435 "type_ref": "PA_SU_POLY_OFFSET_DB_FMT_CNTL" 5436 }, 5437 { 5438 "chips": ["gfx7"], 5439 "map": {"at": 166780, "to": "mm"}, 5440 "name": "PA_SU_POLY_OFFSET_CLAMP", 5441 "type_ref": "PA_SU_POLY_OFFSET_CLAMP" 5442 }, 5443 { 5444 "chips": ["gfx7"], 5445 "map": {"at": 166784, "to": "mm"}, 5446 "name": "PA_SU_POLY_OFFSET_FRONT_SCALE", 5447 "type_ref": "PA_SU_POLY_OFFSET_FRONT_SCALE" 5448 }, 5449 { 5450 "chips": ["gfx7"], 5451 "map": {"at": 166788, "to": "mm"}, 5452 "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET", 5453 "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET" 5454 }, 5455 { 5456 "chips": ["gfx7"], 5457 "map": {"at": 166792, "to": "mm"}, 5458 "name": "PA_SU_POLY_OFFSET_BACK_SCALE", 5459 "type_ref": "PA_SU_POLY_OFFSET_FRONT_SCALE" 5460 }, 5461 { 5462 "chips": ["gfx7"], 5463 "map": {"at": 166796, "to": "mm"}, 5464 "name": "PA_SU_POLY_OFFSET_BACK_OFFSET", 5465 "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET" 5466 }, 5467 { 5468 "chips": ["gfx7"], 5469 "map": {"at": 166800, "to": "mm"}, 5470 "name": "VGT_GS_INSTANCE_CNT", 5471 "type_ref": "VGT_GS_INSTANCE_CNT" 5472 }, 5473 { 5474 "chips": ["gfx7"], 5475 "map": {"at": 166804, "to": "mm"}, 5476 "name": "VGT_STRMOUT_CONFIG", 5477 "type_ref": "VGT_STRMOUT_CONFIG" 5478 }, 5479 { 5480 "chips": ["gfx7"], 5481 "map": {"at": 166808, "to": "mm"}, 5482 "name": "VGT_STRMOUT_BUFFER_CONFIG", 5483 "type_ref": "VGT_STRMOUT_BUFFER_CONFIG" 5484 }, 5485 { 5486 "chips": ["gfx7"], 5487 "map": {"at": 166868, "to": "mm"}, 5488 "name": "PA_SC_CENTROID_PRIORITY_0", 5489 "type_ref": "PA_SC_CENTROID_PRIORITY_0" 5490 }, 5491 { 5492 "chips": ["gfx7"], 5493 "map": {"at": 166872, "to": "mm"}, 5494 "name": "PA_SC_CENTROID_PRIORITY_1", 5495 "type_ref": "PA_SC_CENTROID_PRIORITY_1" 5496 }, 5497 { 5498 "chips": ["gfx7"], 5499 "map": {"at": 166876, "to": "mm"}, 5500 "name": "PA_SC_LINE_CNTL", 5501 "type_ref": "PA_SC_LINE_CNTL" 5502 }, 5503 { 5504 "chips": ["gfx7"], 5505 "map": {"at": 166880, "to": "mm"}, 5506 "name": "PA_SC_AA_CONFIG", 5507 "type_ref": "PA_SC_AA_CONFIG" 5508 }, 5509 { 5510 "chips": ["gfx7"], 5511 "map": {"at": 166884, "to": "mm"}, 5512 "name": "PA_SU_VTX_CNTL", 5513 "type_ref": "PA_SU_VTX_CNTL" 5514 }, 5515 { 5516 "chips": ["gfx7"], 5517 "map": {"at": 166888, "to": "mm"}, 5518 "name": "PA_CL_GB_VERT_CLIP_ADJ", 5519 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 5520 }, 5521 { 5522 "chips": ["gfx7"], 5523 "map": {"at": 166892, "to": "mm"}, 5524 "name": "PA_CL_GB_VERT_DISC_ADJ", 5525 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 5526 }, 5527 { 5528 "chips": ["gfx7"], 5529 "map": {"at": 166896, "to": "mm"}, 5530 "name": "PA_CL_GB_HORZ_CLIP_ADJ", 5531 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 5532 }, 5533 { 5534 "chips": ["gfx7"], 5535 "map": {"at": 166900, "to": "mm"}, 5536 "name": "PA_CL_GB_HORZ_DISC_ADJ", 5537 "type_ref": "PA_CL_GB_VERT_CLIP_ADJ" 5538 }, 5539 { 5540 "chips": ["gfx7"], 5541 "map": {"at": 166904, "to": "mm"}, 5542 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0", 5543 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0" 5544 }, 5545 { 5546 "chips": ["gfx7"], 5547 "map": {"at": 166908, "to": "mm"}, 5548 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1", 5549 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1" 5550 }, 5551 { 5552 "chips": ["gfx7"], 5553 "map": {"at": 166912, "to": "mm"}, 5554 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2", 5555 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2" 5556 }, 5557 { 5558 "chips": ["gfx7"], 5559 "map": {"at": 166916, "to": "mm"}, 5560 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3", 5561 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3" 5562 }, 5563 { 5564 "chips": ["gfx7"], 5565 "map": {"at": 166920, "to": "mm"}, 5566 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0", 5567 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0" 5568 }, 5569 { 5570 "chips": ["gfx7"], 5571 "map": {"at": 166924, "to": "mm"}, 5572 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1", 5573 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1" 5574 }, 5575 { 5576 "chips": ["gfx7"], 5577 "map": {"at": 166928, "to": "mm"}, 5578 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2", 5579 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2" 5580 }, 5581 { 5582 "chips": ["gfx7"], 5583 "map": {"at": 166932, "to": "mm"}, 5584 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3", 5585 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3" 5586 }, 5587 { 5588 "chips": ["gfx7"], 5589 "map": {"at": 166936, "to": "mm"}, 5590 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0", 5591 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0" 5592 }, 5593 { 5594 "chips": ["gfx7"], 5595 "map": {"at": 166940, "to": "mm"}, 5596 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1", 5597 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1" 5598 }, 5599 { 5600 "chips": ["gfx7"], 5601 "map": {"at": 166944, "to": "mm"}, 5602 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2", 5603 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2" 5604 }, 5605 { 5606 "chips": ["gfx7"], 5607 "map": {"at": 166948, "to": "mm"}, 5608 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3", 5609 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3" 5610 }, 5611 { 5612 "chips": ["gfx7"], 5613 "map": {"at": 166952, "to": "mm"}, 5614 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0", 5615 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0" 5616 }, 5617 { 5618 "chips": ["gfx7"], 5619 "map": {"at": 166956, "to": "mm"}, 5620 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1", 5621 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1" 5622 }, 5623 { 5624 "chips": ["gfx7"], 5625 "map": {"at": 166960, "to": "mm"}, 5626 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2", 5627 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2" 5628 }, 5629 { 5630 "chips": ["gfx7"], 5631 "map": {"at": 166964, "to": "mm"}, 5632 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3", 5633 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3" 5634 }, 5635 { 5636 "chips": ["gfx7"], 5637 "map": {"at": 166968, "to": "mm"}, 5638 "name": "PA_SC_AA_MASK_X0Y0_X1Y0", 5639 "type_ref": "PA_SC_AA_MASK_X0Y0_X1Y0" 5640 }, 5641 { 5642 "chips": ["gfx7"], 5643 "map": {"at": 166972, "to": "mm"}, 5644 "name": "PA_SC_AA_MASK_X0Y1_X1Y1", 5645 "type_ref": "PA_SC_AA_MASK_X0Y1_X1Y1" 5646 }, 5647 { 5648 "chips": ["gfx7"], 5649 "map": {"at": 167000, "to": "mm"}, 5650 "name": "VGT_VERTEX_REUSE_BLOCK_CNTL", 5651 "type_ref": "VGT_VERTEX_REUSE_BLOCK_CNTL" 5652 }, 5653 { 5654 "chips": ["gfx7"], 5655 "map": {"at": 167004, "to": "mm"}, 5656 "name": "VGT_OUT_DEALLOC_CNTL", 5657 "type_ref": "VGT_OUT_DEALLOC_CNTL" 5658 }, 5659 { 5660 "chips": ["gfx7"], 5661 "map": {"at": 167008, "to": "mm"}, 5662 "name": "CB_COLOR0_BASE", 5663 "type_ref": "CB_COLOR0_BASE" 5664 }, 5665 { 5666 "chips": ["gfx7"], 5667 "map": {"at": 167012, "to": "mm"}, 5668 "name": "CB_COLOR0_PITCH", 5669 "type_ref": "CB_COLOR0_PITCH" 5670 }, 5671 { 5672 "chips": ["gfx7"], 5673 "map": {"at": 167016, "to": "mm"}, 5674 "name": "CB_COLOR0_SLICE", 5675 "type_ref": "CB_COLOR0_SLICE" 5676 }, 5677 { 5678 "chips": ["gfx7"], 5679 "map": {"at": 167020, "to": "mm"}, 5680 "name": "CB_COLOR0_VIEW", 5681 "type_ref": "CB_COLOR0_VIEW" 5682 }, 5683 { 5684 "chips": ["gfx7"], 5685 "map": {"at": 167024, "to": "mm"}, 5686 "name": "CB_COLOR0_INFO", 5687 "type_ref": "CB_COLOR0_INFO" 5688 }, 5689 { 5690 "chips": ["gfx7"], 5691 "map": {"at": 167028, "to": "mm"}, 5692 "name": "CB_COLOR0_ATTRIB", 5693 "type_ref": "CB_COLOR0_ATTRIB" 5694 }, 5695 { 5696 "chips": ["gfx7"], 5697 "map": {"at": 167036, "to": "mm"}, 5698 "name": "CB_COLOR0_CMASK", 5699 "type_ref": "CB_COLOR0_BASE" 5700 }, 5701 { 5702 "chips": ["gfx7"], 5703 "map": {"at": 167040, "to": "mm"}, 5704 "name": "CB_COLOR0_CMASK_SLICE", 5705 "type_ref": "CB_COLOR0_CMASK_SLICE" 5706 }, 5707 { 5708 "chips": ["gfx7"], 5709 "map": {"at": 167044, "to": "mm"}, 5710 "name": "CB_COLOR0_FMASK", 5711 "type_ref": "CB_COLOR0_BASE" 5712 }, 5713 { 5714 "chips": ["gfx7"], 5715 "map": {"at": 167048, "to": "mm"}, 5716 "name": "CB_COLOR0_FMASK_SLICE", 5717 "type_ref": "CB_COLOR0_SLICE" 5718 }, 5719 { 5720 "chips": ["gfx7"], 5721 "map": {"at": 167052, "to": "mm"}, 5722 "name": "CB_COLOR0_CLEAR_WORD0", 5723 "type_ref": "CB_COLOR0_CLEAR_WORD0" 5724 }, 5725 { 5726 "chips": ["gfx7"], 5727 "map": {"at": 167056, "to": "mm"}, 5728 "name": "CB_COLOR0_CLEAR_WORD1", 5729 "type_ref": "CB_COLOR0_CLEAR_WORD1" 5730 }, 5731 { 5732 "chips": ["gfx7"], 5733 "map": {"at": 167068, "to": "mm"}, 5734 "name": "CB_COLOR1_BASE", 5735 "type_ref": "CB_COLOR0_BASE" 5736 }, 5737 { 5738 "chips": ["gfx7"], 5739 "map": {"at": 167072, "to": "mm"}, 5740 "name": "CB_COLOR1_PITCH", 5741 "type_ref": "CB_COLOR0_PITCH" 5742 }, 5743 { 5744 "chips": ["gfx7"], 5745 "map": {"at": 167076, "to": "mm"}, 5746 "name": "CB_COLOR1_SLICE", 5747 "type_ref": "CB_COLOR0_SLICE" 5748 }, 5749 { 5750 "chips": ["gfx7"], 5751 "map": {"at": 167080, "to": "mm"}, 5752 "name": "CB_COLOR1_VIEW", 5753 "type_ref": "CB_COLOR0_VIEW" 5754 }, 5755 { 5756 "chips": ["gfx7"], 5757 "map": {"at": 167084, "to": "mm"}, 5758 "name": "CB_COLOR1_INFO", 5759 "type_ref": "CB_COLOR0_INFO" 5760 }, 5761 { 5762 "chips": ["gfx7"], 5763 "map": {"at": 167088, "to": "mm"}, 5764 "name": "CB_COLOR1_ATTRIB", 5765 "type_ref": "CB_COLOR0_ATTRIB" 5766 }, 5767 { 5768 "chips": ["gfx7"], 5769 "map": {"at": 167096, "to": "mm"}, 5770 "name": "CB_COLOR1_CMASK", 5771 "type_ref": "CB_COLOR0_BASE" 5772 }, 5773 { 5774 "chips": ["gfx7"], 5775 "map": {"at": 167100, "to": "mm"}, 5776 "name": "CB_COLOR1_CMASK_SLICE", 5777 "type_ref": "CB_COLOR0_CMASK_SLICE" 5778 }, 5779 { 5780 "chips": ["gfx7"], 5781 "map": {"at": 167104, "to": "mm"}, 5782 "name": "CB_COLOR1_FMASK", 5783 "type_ref": "CB_COLOR0_BASE" 5784 }, 5785 { 5786 "chips": ["gfx7"], 5787 "map": {"at": 167108, "to": "mm"}, 5788 "name": "CB_COLOR1_FMASK_SLICE", 5789 "type_ref": "CB_COLOR0_SLICE" 5790 }, 5791 { 5792 "chips": ["gfx7"], 5793 "map": {"at": 167112, "to": "mm"}, 5794 "name": "CB_COLOR1_CLEAR_WORD0", 5795 "type_ref": "CB_COLOR0_CLEAR_WORD0" 5796 }, 5797 { 5798 "chips": ["gfx7"], 5799 "map": {"at": 167116, "to": "mm"}, 5800 "name": "CB_COLOR1_CLEAR_WORD1", 5801 "type_ref": "CB_COLOR0_CLEAR_WORD1" 5802 }, 5803 { 5804 "chips": ["gfx7"], 5805 "map": {"at": 167128, "to": "mm"}, 5806 "name": "CB_COLOR2_BASE", 5807 "type_ref": "CB_COLOR0_BASE" 5808 }, 5809 { 5810 "chips": ["gfx7"], 5811 "map": {"at": 167132, "to": "mm"}, 5812 "name": "CB_COLOR2_PITCH", 5813 "type_ref": "CB_COLOR0_PITCH" 5814 }, 5815 { 5816 "chips": ["gfx7"], 5817 "map": {"at": 167136, "to": "mm"}, 5818 "name": "CB_COLOR2_SLICE", 5819 "type_ref": "CB_COLOR0_SLICE" 5820 }, 5821 { 5822 "chips": ["gfx7"], 5823 "map": {"at": 167140, "to": "mm"}, 5824 "name": "CB_COLOR2_VIEW", 5825 "type_ref": "CB_COLOR0_VIEW" 5826 }, 5827 { 5828 "chips": ["gfx7"], 5829 "map": {"at": 167144, "to": "mm"}, 5830 "name": "CB_COLOR2_INFO", 5831 "type_ref": "CB_COLOR0_INFO" 5832 }, 5833 { 5834 "chips": ["gfx7"], 5835 "map": {"at": 167148, "to": "mm"}, 5836 "name": "CB_COLOR2_ATTRIB", 5837 "type_ref": "CB_COLOR0_ATTRIB" 5838 }, 5839 { 5840 "chips": ["gfx7"], 5841 "map": {"at": 167156, "to": "mm"}, 5842 "name": "CB_COLOR2_CMASK", 5843 "type_ref": "CB_COLOR0_BASE" 5844 }, 5845 { 5846 "chips": ["gfx7"], 5847 "map": {"at": 167160, "to": "mm"}, 5848 "name": "CB_COLOR2_CMASK_SLICE", 5849 "type_ref": "CB_COLOR0_CMASK_SLICE" 5850 }, 5851 { 5852 "chips": ["gfx7"], 5853 "map": {"at": 167164, "to": "mm"}, 5854 "name": "CB_COLOR2_FMASK", 5855 "type_ref": "CB_COLOR0_BASE" 5856 }, 5857 { 5858 "chips": ["gfx7"], 5859 "map": {"at": 167168, "to": "mm"}, 5860 "name": "CB_COLOR2_FMASK_SLICE", 5861 "type_ref": "CB_COLOR0_SLICE" 5862 }, 5863 { 5864 "chips": ["gfx7"], 5865 "map": {"at": 167172, "to": "mm"}, 5866 "name": "CB_COLOR2_CLEAR_WORD0", 5867 "type_ref": "CB_COLOR0_CLEAR_WORD0" 5868 }, 5869 { 5870 "chips": ["gfx7"], 5871 "map": {"at": 167176, "to": "mm"}, 5872 "name": "CB_COLOR2_CLEAR_WORD1", 5873 "type_ref": "CB_COLOR0_CLEAR_WORD1" 5874 }, 5875 { 5876 "chips": ["gfx7"], 5877 "map": {"at": 167188, "to": "mm"}, 5878 "name": "CB_COLOR3_BASE", 5879 "type_ref": "CB_COLOR0_BASE" 5880 }, 5881 { 5882 "chips": ["gfx7"], 5883 "map": {"at": 167192, "to": "mm"}, 5884 "name": "CB_COLOR3_PITCH", 5885 "type_ref": "CB_COLOR0_PITCH" 5886 }, 5887 { 5888 "chips": ["gfx7"], 5889 "map": {"at": 167196, "to": "mm"}, 5890 "name": "CB_COLOR3_SLICE", 5891 "type_ref": "CB_COLOR0_SLICE" 5892 }, 5893 { 5894 "chips": ["gfx7"], 5895 "map": {"at": 167200, "to": "mm"}, 5896 "name": "CB_COLOR3_VIEW", 5897 "type_ref": "CB_COLOR0_VIEW" 5898 }, 5899 { 5900 "chips": ["gfx7"], 5901 "map": {"at": 167204, "to": "mm"}, 5902 "name": "CB_COLOR3_INFO", 5903 "type_ref": "CB_COLOR0_INFO" 5904 }, 5905 { 5906 "chips": ["gfx7"], 5907 "map": {"at": 167208, "to": "mm"}, 5908 "name": "CB_COLOR3_ATTRIB", 5909 "type_ref": "CB_COLOR0_ATTRIB" 5910 }, 5911 { 5912 "chips": ["gfx7"], 5913 "map": {"at": 167216, "to": "mm"}, 5914 "name": "CB_COLOR3_CMASK", 5915 "type_ref": "CB_COLOR0_BASE" 5916 }, 5917 { 5918 "chips": ["gfx7"], 5919 "map": {"at": 167220, "to": "mm"}, 5920 "name": "CB_COLOR3_CMASK_SLICE", 5921 "type_ref": "CB_COLOR0_CMASK_SLICE" 5922 }, 5923 { 5924 "chips": ["gfx7"], 5925 "map": {"at": 167224, "to": "mm"}, 5926 "name": "CB_COLOR3_FMASK", 5927 "type_ref": "CB_COLOR0_BASE" 5928 }, 5929 { 5930 "chips": ["gfx7"], 5931 "map": {"at": 167228, "to": "mm"}, 5932 "name": "CB_COLOR3_FMASK_SLICE", 5933 "type_ref": "CB_COLOR0_SLICE" 5934 }, 5935 { 5936 "chips": ["gfx7"], 5937 "map": {"at": 167232, "to": "mm"}, 5938 "name": "CB_COLOR3_CLEAR_WORD0", 5939 "type_ref": "CB_COLOR0_CLEAR_WORD0" 5940 }, 5941 { 5942 "chips": ["gfx7"], 5943 "map": {"at": 167236, "to": "mm"}, 5944 "name": "CB_COLOR3_CLEAR_WORD1", 5945 "type_ref": "CB_COLOR0_CLEAR_WORD1" 5946 }, 5947 { 5948 "chips": ["gfx7"], 5949 "map": {"at": 167248, "to": "mm"}, 5950 "name": "CB_COLOR4_BASE", 5951 "type_ref": "CB_COLOR0_BASE" 5952 }, 5953 { 5954 "chips": ["gfx7"], 5955 "map": {"at": 167252, "to": "mm"}, 5956 "name": "CB_COLOR4_PITCH", 5957 "type_ref": "CB_COLOR0_PITCH" 5958 }, 5959 { 5960 "chips": ["gfx7"], 5961 "map": {"at": 167256, "to": "mm"}, 5962 "name": "CB_COLOR4_SLICE", 5963 "type_ref": "CB_COLOR0_SLICE" 5964 }, 5965 { 5966 "chips": ["gfx7"], 5967 "map": {"at": 167260, "to": "mm"}, 5968 "name": "CB_COLOR4_VIEW", 5969 "type_ref": "CB_COLOR0_VIEW" 5970 }, 5971 { 5972 "chips": ["gfx7"], 5973 "map": {"at": 167264, "to": "mm"}, 5974 "name": "CB_COLOR4_INFO", 5975 "type_ref": "CB_COLOR0_INFO" 5976 }, 5977 { 5978 "chips": ["gfx7"], 5979 "map": {"at": 167268, "to": "mm"}, 5980 "name": "CB_COLOR4_ATTRIB", 5981 "type_ref": "CB_COLOR0_ATTRIB" 5982 }, 5983 { 5984 "chips": ["gfx7"], 5985 "map": {"at": 167276, "to": "mm"}, 5986 "name": "CB_COLOR4_CMASK", 5987 "type_ref": "CB_COLOR0_BASE" 5988 }, 5989 { 5990 "chips": ["gfx7"], 5991 "map": {"at": 167280, "to": "mm"}, 5992 "name": "CB_COLOR4_CMASK_SLICE", 5993 "type_ref": "CB_COLOR0_CMASK_SLICE" 5994 }, 5995 { 5996 "chips": ["gfx7"], 5997 "map": {"at": 167284, "to": "mm"}, 5998 "name": "CB_COLOR4_FMASK", 5999 "type_ref": "CB_COLOR0_BASE" 6000 }, 6001 { 6002 "chips": ["gfx7"], 6003 "map": {"at": 167288, "to": "mm"}, 6004 "name": "CB_COLOR4_FMASK_SLICE", 6005 "type_ref": "CB_COLOR0_SLICE" 6006 }, 6007 { 6008 "chips": ["gfx7"], 6009 "map": {"at": 167292, "to": "mm"}, 6010 "name": "CB_COLOR4_CLEAR_WORD0", 6011 "type_ref": "CB_COLOR0_CLEAR_WORD0" 6012 }, 6013 { 6014 "chips": ["gfx7"], 6015 "map": {"at": 167296, "to": "mm"}, 6016 "name": "CB_COLOR4_CLEAR_WORD1", 6017 "type_ref": "CB_COLOR0_CLEAR_WORD1" 6018 }, 6019 { 6020 "chips": ["gfx7"], 6021 "map": {"at": 167308, "to": "mm"}, 6022 "name": "CB_COLOR5_BASE", 6023 "type_ref": "CB_COLOR0_BASE" 6024 }, 6025 { 6026 "chips": ["gfx7"], 6027 "map": {"at": 167312, "to": "mm"}, 6028 "name": "CB_COLOR5_PITCH", 6029 "type_ref": "CB_COLOR0_PITCH" 6030 }, 6031 { 6032 "chips": ["gfx7"], 6033 "map": {"at": 167316, "to": "mm"}, 6034 "name": "CB_COLOR5_SLICE", 6035 "type_ref": "CB_COLOR0_SLICE" 6036 }, 6037 { 6038 "chips": ["gfx7"], 6039 "map": {"at": 167320, "to": "mm"}, 6040 "name": "CB_COLOR5_VIEW", 6041 "type_ref": "CB_COLOR0_VIEW" 6042 }, 6043 { 6044 "chips": ["gfx7"], 6045 "map": {"at": 167324, "to": "mm"}, 6046 "name": "CB_COLOR5_INFO", 6047 "type_ref": "CB_COLOR0_INFO" 6048 }, 6049 { 6050 "chips": ["gfx7"], 6051 "map": {"at": 167328, "to": "mm"}, 6052 "name": "CB_COLOR5_ATTRIB", 6053 "type_ref": "CB_COLOR0_ATTRIB" 6054 }, 6055 { 6056 "chips": ["gfx7"], 6057 "map": {"at": 167336, "to": "mm"}, 6058 "name": "CB_COLOR5_CMASK", 6059 "type_ref": "CB_COLOR0_BASE" 6060 }, 6061 { 6062 "chips": ["gfx7"], 6063 "map": {"at": 167340, "to": "mm"}, 6064 "name": "CB_COLOR5_CMASK_SLICE", 6065 "type_ref": "CB_COLOR0_CMASK_SLICE" 6066 }, 6067 { 6068 "chips": ["gfx7"], 6069 "map": {"at": 167344, "to": "mm"}, 6070 "name": "CB_COLOR5_FMASK", 6071 "type_ref": "CB_COLOR0_BASE" 6072 }, 6073 { 6074 "chips": ["gfx7"], 6075 "map": {"at": 167348, "to": "mm"}, 6076 "name": "CB_COLOR5_FMASK_SLICE", 6077 "type_ref": "CB_COLOR0_SLICE" 6078 }, 6079 { 6080 "chips": ["gfx7"], 6081 "map": {"at": 167352, "to": "mm"}, 6082 "name": "CB_COLOR5_CLEAR_WORD0", 6083 "type_ref": "CB_COLOR0_CLEAR_WORD0" 6084 }, 6085 { 6086 "chips": ["gfx7"], 6087 "map": {"at": 167356, "to": "mm"}, 6088 "name": "CB_COLOR5_CLEAR_WORD1", 6089 "type_ref": "CB_COLOR0_CLEAR_WORD1" 6090 }, 6091 { 6092 "chips": ["gfx7"], 6093 "map": {"at": 167368, "to": "mm"}, 6094 "name": "CB_COLOR6_BASE", 6095 "type_ref": "CB_COLOR0_BASE" 6096 }, 6097 { 6098 "chips": ["gfx7"], 6099 "map": {"at": 167372, "to": "mm"}, 6100 "name": "CB_COLOR6_PITCH", 6101 "type_ref": "CB_COLOR0_PITCH" 6102 }, 6103 { 6104 "chips": ["gfx7"], 6105 "map": {"at": 167376, "to": "mm"}, 6106 "name": "CB_COLOR6_SLICE", 6107 "type_ref": "CB_COLOR0_SLICE" 6108 }, 6109 { 6110 "chips": ["gfx7"], 6111 "map": {"at": 167380, "to": "mm"}, 6112 "name": "CB_COLOR6_VIEW", 6113 "type_ref": "CB_COLOR0_VIEW" 6114 }, 6115 { 6116 "chips": ["gfx7"], 6117 "map": {"at": 167384, "to": "mm"}, 6118 "name": "CB_COLOR6_INFO", 6119 "type_ref": "CB_COLOR0_INFO" 6120 }, 6121 { 6122 "chips": ["gfx7"], 6123 "map": {"at": 167388, "to": "mm"}, 6124 "name": "CB_COLOR6_ATTRIB", 6125 "type_ref": "CB_COLOR0_ATTRIB" 6126 }, 6127 { 6128 "chips": ["gfx7"], 6129 "map": {"at": 167396, "to": "mm"}, 6130 "name": "CB_COLOR6_CMASK", 6131 "type_ref": "CB_COLOR0_BASE" 6132 }, 6133 { 6134 "chips": ["gfx7"], 6135 "map": {"at": 167400, "to": "mm"}, 6136 "name": "CB_COLOR6_CMASK_SLICE", 6137 "type_ref": "CB_COLOR0_CMASK_SLICE" 6138 }, 6139 { 6140 "chips": ["gfx7"], 6141 "map": {"at": 167404, "to": "mm"}, 6142 "name": "CB_COLOR6_FMASK", 6143 "type_ref": "CB_COLOR0_BASE" 6144 }, 6145 { 6146 "chips": ["gfx7"], 6147 "map": {"at": 167408, "to": "mm"}, 6148 "name": "CB_COLOR6_FMASK_SLICE", 6149 "type_ref": "CB_COLOR0_SLICE" 6150 }, 6151 { 6152 "chips": ["gfx7"], 6153 "map": {"at": 167412, "to": "mm"}, 6154 "name": "CB_COLOR6_CLEAR_WORD0", 6155 "type_ref": "CB_COLOR0_CLEAR_WORD0" 6156 }, 6157 { 6158 "chips": ["gfx7"], 6159 "map": {"at": 167416, "to": "mm"}, 6160 "name": "CB_COLOR6_CLEAR_WORD1", 6161 "type_ref": "CB_COLOR0_CLEAR_WORD1" 6162 }, 6163 { 6164 "chips": ["gfx7"], 6165 "map": {"at": 167428, "to": "mm"}, 6166 "name": "CB_COLOR7_BASE", 6167 "type_ref": "CB_COLOR0_BASE" 6168 }, 6169 { 6170 "chips": ["gfx7"], 6171 "map": {"at": 167432, "to": "mm"}, 6172 "name": "CB_COLOR7_PITCH", 6173 "type_ref": "CB_COLOR0_PITCH" 6174 }, 6175 { 6176 "chips": ["gfx7"], 6177 "map": {"at": 167436, "to": "mm"}, 6178 "name": "CB_COLOR7_SLICE", 6179 "type_ref": "CB_COLOR0_SLICE" 6180 }, 6181 { 6182 "chips": ["gfx7"], 6183 "map": {"at": 167440, "to": "mm"}, 6184 "name": "CB_COLOR7_VIEW", 6185 "type_ref": "CB_COLOR0_VIEW" 6186 }, 6187 { 6188 "chips": ["gfx7"], 6189 "map": {"at": 167444, "to": "mm"}, 6190 "name": "CB_COLOR7_INFO", 6191 "type_ref": "CB_COLOR0_INFO" 6192 }, 6193 { 6194 "chips": ["gfx7"], 6195 "map": {"at": 167448, "to": "mm"}, 6196 "name": "CB_COLOR7_ATTRIB", 6197 "type_ref": "CB_COLOR0_ATTRIB" 6198 }, 6199 { 6200 "chips": ["gfx7"], 6201 "map": {"at": 167456, "to": "mm"}, 6202 "name": "CB_COLOR7_CMASK", 6203 "type_ref": "CB_COLOR0_BASE" 6204 }, 6205 { 6206 "chips": ["gfx7"], 6207 "map": {"at": 167460, "to": "mm"}, 6208 "name": "CB_COLOR7_CMASK_SLICE", 6209 "type_ref": "CB_COLOR0_CMASK_SLICE" 6210 }, 6211 { 6212 "chips": ["gfx7"], 6213 "map": {"at": 167464, "to": "mm"}, 6214 "name": "CB_COLOR7_FMASK", 6215 "type_ref": "CB_COLOR0_BASE" 6216 }, 6217 { 6218 "chips": ["gfx7"], 6219 "map": {"at": 167468, "to": "mm"}, 6220 "name": "CB_COLOR7_FMASK_SLICE", 6221 "type_ref": "CB_COLOR0_SLICE" 6222 }, 6223 { 6224 "chips": ["gfx7"], 6225 "map": {"at": 167472, "to": "mm"}, 6226 "name": "CB_COLOR7_CLEAR_WORD0", 6227 "type_ref": "CB_COLOR0_CLEAR_WORD0" 6228 }, 6229 { 6230 "chips": ["gfx7"], 6231 "map": {"at": 167476, "to": "mm"}, 6232 "name": "CB_COLOR7_CLEAR_WORD1", 6233 "type_ref": "CB_COLOR0_CLEAR_WORD1" 6234 }, 6235 { 6236 "chips": ["gfx7"], 6237 "map": {"at": 196608, "to": "mm"}, 6238 "name": "CP_EOP_DONE_ADDR_LO", 6239 "type_ref": "CP_EOP_DONE_ADDR_LO" 6240 }, 6241 { 6242 "chips": ["gfx7"], 6243 "map": {"at": 196612, "to": "mm"}, 6244 "name": "CP_EOP_DONE_ADDR_HI", 6245 "type_ref": "CP_EOP_DONE_ADDR_HI" 6246 }, 6247 { 6248 "chips": ["gfx7"], 6249 "map": {"at": 196616, "to": "mm"}, 6250 "name": "CP_EOP_DONE_DATA_LO", 6251 "type_ref": "CP_EOP_DONE_DATA_LO" 6252 }, 6253 { 6254 "chips": ["gfx7"], 6255 "map": {"at": 196620, "to": "mm"}, 6256 "name": "CP_EOP_DONE_DATA_HI", 6257 "type_ref": "CP_EOP_DONE_DATA_HI" 6258 }, 6259 { 6260 "chips": ["gfx7"], 6261 "map": {"at": 196624, "to": "mm"}, 6262 "name": "CP_EOP_LAST_FENCE_LO", 6263 "type_ref": "CP_EOP_LAST_FENCE_LO" 6264 }, 6265 { 6266 "chips": ["gfx7"], 6267 "map": {"at": 196628, "to": "mm"}, 6268 "name": "CP_EOP_LAST_FENCE_HI", 6269 "type_ref": "CP_EOP_LAST_FENCE_HI" 6270 }, 6271 { 6272 "chips": ["gfx7"], 6273 "map": {"at": 196632, "to": "mm"}, 6274 "name": "CP_STREAM_OUT_ADDR_LO", 6275 "type_ref": "CP_STREAM_OUT_ADDR_LO" 6276 }, 6277 { 6278 "chips": ["gfx7"], 6279 "map": {"at": 196636, "to": "mm"}, 6280 "name": "CP_STREAM_OUT_ADDR_HI", 6281 "type_ref": "CP_STREAM_OUT_ADDR_HI" 6282 }, 6283 { 6284 "chips": ["gfx7"], 6285 "map": {"at": 196640, "to": "mm"}, 6286 "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO", 6287 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT0_LO" 6288 }, 6289 { 6290 "chips": ["gfx7"], 6291 "map": {"at": 196644, "to": "mm"}, 6292 "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI", 6293 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT0_HI" 6294 }, 6295 { 6296 "chips": ["gfx7"], 6297 "map": {"at": 196648, "to": "mm"}, 6298 "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO", 6299 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT0_LO" 6300 }, 6301 { 6302 "chips": ["gfx7"], 6303 "map": {"at": 196652, "to": "mm"}, 6304 "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI", 6305 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT0_HI" 6306 }, 6307 { 6308 "chips": ["gfx7"], 6309 "map": {"at": 196656, "to": "mm"}, 6310 "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO", 6311 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT1_LO" 6312 }, 6313 { 6314 "chips": ["gfx7"], 6315 "map": {"at": 196660, "to": "mm"}, 6316 "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI", 6317 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT1_HI" 6318 }, 6319 { 6320 "chips": ["gfx7"], 6321 "map": {"at": 196664, "to": "mm"}, 6322 "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO", 6323 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT1_LO" 6324 }, 6325 { 6326 "chips": ["gfx7"], 6327 "map": {"at": 196668, "to": "mm"}, 6328 "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI", 6329 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT1_HI" 6330 }, 6331 { 6332 "chips": ["gfx7"], 6333 "map": {"at": 196672, "to": "mm"}, 6334 "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO", 6335 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT2_LO" 6336 }, 6337 { 6338 "chips": ["gfx7"], 6339 "map": {"at": 196676, "to": "mm"}, 6340 "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI", 6341 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT2_HI" 6342 }, 6343 { 6344 "chips": ["gfx7"], 6345 "map": {"at": 196680, "to": "mm"}, 6346 "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO", 6347 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT2_LO" 6348 }, 6349 { 6350 "chips": ["gfx7"], 6351 "map": {"at": 196684, "to": "mm"}, 6352 "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI", 6353 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT2_HI" 6354 }, 6355 { 6356 "chips": ["gfx7"], 6357 "map": {"at": 196688, "to": "mm"}, 6358 "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO", 6359 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT3_LO" 6360 }, 6361 { 6362 "chips": ["gfx7"], 6363 "map": {"at": 196692, "to": "mm"}, 6364 "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI", 6365 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT3_HI" 6366 }, 6367 { 6368 "chips": ["gfx7"], 6369 "map": {"at": 196696, "to": "mm"}, 6370 "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO", 6371 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT3_LO" 6372 }, 6373 { 6374 "chips": ["gfx7"], 6375 "map": {"at": 196700, "to": "mm"}, 6376 "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI", 6377 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT3_HI" 6378 }, 6379 { 6380 "chips": ["gfx7"], 6381 "map": {"at": 196704, "to": "mm"}, 6382 "name": "CP_PIPE_STATS_ADDR_LO", 6383 "type_ref": "CP_PIPE_STATS_ADDR_LO" 6384 }, 6385 { 6386 "chips": ["gfx7"], 6387 "map": {"at": 196708, "to": "mm"}, 6388 "name": "CP_PIPE_STATS_ADDR_HI", 6389 "type_ref": "CP_PIPE_STATS_ADDR_HI" 6390 }, 6391 { 6392 "chips": ["gfx7"], 6393 "map": {"at": 196712, "to": "mm"}, 6394 "name": "CP_VGT_IAVERT_COUNT_LO", 6395 "type_ref": "CP_VGT_IAVERT_COUNT_LO" 6396 }, 6397 { 6398 "chips": ["gfx7"], 6399 "map": {"at": 196716, "to": "mm"}, 6400 "name": "CP_VGT_IAVERT_COUNT_HI", 6401 "type_ref": "CP_VGT_IAVERT_COUNT_HI" 6402 }, 6403 { 6404 "chips": ["gfx7"], 6405 "map": {"at": 196720, "to": "mm"}, 6406 "name": "CP_VGT_IAPRIM_COUNT_LO", 6407 "type_ref": "CP_VGT_IAPRIM_COUNT_LO" 6408 }, 6409 { 6410 "chips": ["gfx7"], 6411 "map": {"at": 196724, "to": "mm"}, 6412 "name": "CP_VGT_IAPRIM_COUNT_HI", 6413 "type_ref": "CP_VGT_IAPRIM_COUNT_HI" 6414 }, 6415 { 6416 "chips": ["gfx7"], 6417 "map": {"at": 196728, "to": "mm"}, 6418 "name": "CP_VGT_GSPRIM_COUNT_LO", 6419 "type_ref": "CP_VGT_GSPRIM_COUNT_LO" 6420 }, 6421 { 6422 "chips": ["gfx7"], 6423 "map": {"at": 196732, "to": "mm"}, 6424 "name": "CP_VGT_GSPRIM_COUNT_HI", 6425 "type_ref": "CP_VGT_GSPRIM_COUNT_HI" 6426 }, 6427 { 6428 "chips": ["gfx7"], 6429 "map": {"at": 196736, "to": "mm"}, 6430 "name": "CP_VGT_VSINVOC_COUNT_LO", 6431 "type_ref": "CP_VGT_VSINVOC_COUNT_LO" 6432 }, 6433 { 6434 "chips": ["gfx7"], 6435 "map": {"at": 196740, "to": "mm"}, 6436 "name": "CP_VGT_VSINVOC_COUNT_HI", 6437 "type_ref": "CP_VGT_VSINVOC_COUNT_HI" 6438 }, 6439 { 6440 "chips": ["gfx7"], 6441 "map": {"at": 196744, "to": "mm"}, 6442 "name": "CP_VGT_GSINVOC_COUNT_LO", 6443 "type_ref": "CP_VGT_GSINVOC_COUNT_LO" 6444 }, 6445 { 6446 "chips": ["gfx7"], 6447 "map": {"at": 196748, "to": "mm"}, 6448 "name": "CP_VGT_GSINVOC_COUNT_HI", 6449 "type_ref": "CP_VGT_GSINVOC_COUNT_HI" 6450 }, 6451 { 6452 "chips": ["gfx7"], 6453 "map": {"at": 196752, "to": "mm"}, 6454 "name": "CP_VGT_HSINVOC_COUNT_LO", 6455 "type_ref": "CP_VGT_HSINVOC_COUNT_LO" 6456 }, 6457 { 6458 "chips": ["gfx7"], 6459 "map": {"at": 196756, "to": "mm"}, 6460 "name": "CP_VGT_HSINVOC_COUNT_HI", 6461 "type_ref": "CP_VGT_HSINVOC_COUNT_HI" 6462 }, 6463 { 6464 "chips": ["gfx7"], 6465 "map": {"at": 196760, "to": "mm"}, 6466 "name": "CP_VGT_DSINVOC_COUNT_LO", 6467 "type_ref": "CP_VGT_DSINVOC_COUNT_LO" 6468 }, 6469 { 6470 "chips": ["gfx7"], 6471 "map": {"at": 196764, "to": "mm"}, 6472 "name": "CP_VGT_DSINVOC_COUNT_HI", 6473 "type_ref": "CP_VGT_DSINVOC_COUNT_HI" 6474 }, 6475 { 6476 "chips": ["gfx7"], 6477 "map": {"at": 196768, "to": "mm"}, 6478 "name": "CP_PA_CINVOC_COUNT_LO", 6479 "type_ref": "CP_PA_CINVOC_COUNT_LO" 6480 }, 6481 { 6482 "chips": ["gfx7"], 6483 "map": {"at": 196772, "to": "mm"}, 6484 "name": "CP_PA_CINVOC_COUNT_HI", 6485 "type_ref": "CP_PA_CINVOC_COUNT_HI" 6486 }, 6487 { 6488 "chips": ["gfx7"], 6489 "map": {"at": 196776, "to": "mm"}, 6490 "name": "CP_PA_CPRIM_COUNT_LO", 6491 "type_ref": "CP_PA_CPRIM_COUNT_LO" 6492 }, 6493 { 6494 "chips": ["gfx7"], 6495 "map": {"at": 196780, "to": "mm"}, 6496 "name": "CP_PA_CPRIM_COUNT_HI", 6497 "type_ref": "CP_PA_CPRIM_COUNT_HI" 6498 }, 6499 { 6500 "chips": ["gfx7"], 6501 "map": {"at": 196784, "to": "mm"}, 6502 "name": "CP_SC_PSINVOC_COUNT0_LO", 6503 "type_ref": "CP_SC_PSINVOC_COUNT0_LO" 6504 }, 6505 { 6506 "chips": ["gfx7"], 6507 "map": {"at": 196788, "to": "mm"}, 6508 "name": "CP_SC_PSINVOC_COUNT0_HI", 6509 "type_ref": "CP_SC_PSINVOC_COUNT0_HI" 6510 }, 6511 { 6512 "chips": ["gfx7"], 6513 "map": {"at": 196792, "to": "mm"}, 6514 "name": "CP_SC_PSINVOC_COUNT1_LO", 6515 "type_ref": "CP_SC_PSINVOC_COUNT1_LO" 6516 }, 6517 { 6518 "chips": ["gfx7"], 6519 "map": {"at": 196796, "to": "mm"}, 6520 "name": "CP_SC_PSINVOC_COUNT1_HI", 6521 "type_ref": "CP_SC_PSINVOC_COUNT1_LO" 6522 }, 6523 { 6524 "chips": ["gfx7"], 6525 "map": {"at": 196800, "to": "mm"}, 6526 "name": "CP_VGT_CSINVOC_COUNT_LO", 6527 "type_ref": "CP_VGT_CSINVOC_COUNT_LO" 6528 }, 6529 { 6530 "chips": ["gfx7"], 6531 "map": {"at": 196804, "to": "mm"}, 6532 "name": "CP_VGT_CSINVOC_COUNT_HI", 6533 "type_ref": "CP_VGT_CSINVOC_COUNT_HI" 6534 }, 6535 { 6536 "chips": ["gfx7"], 6537 "map": {"at": 196860, "to": "mm"}, 6538 "name": "CP_STRMOUT_CNTL", 6539 "type_ref": "CP_STRMOUT_CNTL" 6540 }, 6541 { 6542 "chips": ["gfx7"], 6543 "map": {"at": 196864, "to": "mm"}, 6544 "name": "SCRATCH_REG0", 6545 "type_ref": "SCRATCH_REG0" 6546 }, 6547 { 6548 "chips": ["gfx7"], 6549 "map": {"at": 196868, "to": "mm"}, 6550 "name": "SCRATCH_REG1", 6551 "type_ref": "SCRATCH_REG1" 6552 }, 6553 { 6554 "chips": ["gfx7"], 6555 "map": {"at": 196872, "to": "mm"}, 6556 "name": "SCRATCH_REG2", 6557 "type_ref": "SCRATCH_REG2" 6558 }, 6559 { 6560 "chips": ["gfx7"], 6561 "map": {"at": 196876, "to": "mm"}, 6562 "name": "SCRATCH_REG3", 6563 "type_ref": "SCRATCH_REG3" 6564 }, 6565 { 6566 "chips": ["gfx7"], 6567 "map": {"at": 196880, "to": "mm"}, 6568 "name": "SCRATCH_REG4", 6569 "type_ref": "SCRATCH_REG4" 6570 }, 6571 { 6572 "chips": ["gfx7"], 6573 "map": {"at": 196884, "to": "mm"}, 6574 "name": "SCRATCH_REG5", 6575 "type_ref": "SCRATCH_REG5" 6576 }, 6577 { 6578 "chips": ["gfx7"], 6579 "map": {"at": 196888, "to": "mm"}, 6580 "name": "SCRATCH_REG6", 6581 "type_ref": "SCRATCH_REG6" 6582 }, 6583 { 6584 "chips": ["gfx7"], 6585 "map": {"at": 196892, "to": "mm"}, 6586 "name": "SCRATCH_REG7", 6587 "type_ref": "SCRATCH_REG7" 6588 }, 6589 { 6590 "chips": ["gfx7"], 6591 "map": {"at": 196928, "to": "mm"}, 6592 "name": "SCRATCH_UMSK", 6593 "type_ref": "SCRATCH_UMSK" 6594 }, 6595 { 6596 "chips": ["gfx7"], 6597 "map": {"at": 196932, "to": "mm"}, 6598 "name": "SCRATCH_ADDR", 6599 "type_ref": "SCRATCH_ADDR" 6600 }, 6601 { 6602 "chips": ["gfx7"], 6603 "map": {"at": 196936, "to": "mm"}, 6604 "name": "CP_PFP_ATOMIC_PREOP_LO", 6605 "type_ref": "CP_PFP_ATOMIC_PREOP_LO" 6606 }, 6607 { 6608 "chips": ["gfx7"], 6609 "map": {"at": 196940, "to": "mm"}, 6610 "name": "CP_PFP_ATOMIC_PREOP_HI", 6611 "type_ref": "CP_PFP_ATOMIC_PREOP_HI" 6612 }, 6613 { 6614 "chips": ["gfx7"], 6615 "map": {"at": 196944, "to": "mm"}, 6616 "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO", 6617 "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO" 6618 }, 6619 { 6620 "chips": ["gfx7"], 6621 "map": {"at": 196948, "to": "mm"}, 6622 "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI", 6623 "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI" 6624 }, 6625 { 6626 "chips": ["gfx7"], 6627 "map": {"at": 196952, "to": "mm"}, 6628 "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO", 6629 "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO" 6630 }, 6631 { 6632 "chips": ["gfx7"], 6633 "map": {"at": 196956, "to": "mm"}, 6634 "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI", 6635 "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI" 6636 }, 6637 { 6638 "chips": ["gfx7"], 6639 "map": {"at": 196960, "to": "mm"}, 6640 "name": "CP_APPEND_ADDR_LO", 6641 "type_ref": "CP_APPEND_ADDR_LO" 6642 }, 6643 { 6644 "chips": ["gfx7"], 6645 "map": {"at": 196964, "to": "mm"}, 6646 "name": "CP_APPEND_ADDR_HI", 6647 "type_ref": "CP_APPEND_ADDR_HI" 6648 }, 6649 { 6650 "chips": ["gfx7"], 6651 "map": {"at": 196968, "to": "mm"}, 6652 "name": "CP_APPEND_DATA", 6653 "type_ref": "CP_APPEND_DATA" 6654 }, 6655 { 6656 "chips": ["gfx7"], 6657 "map": {"at": 196972, "to": "mm"}, 6658 "name": "CP_APPEND_LAST_CS_FENCE", 6659 "type_ref": "CP_APPEND_LAST_CS_FENCE" 6660 }, 6661 { 6662 "chips": ["gfx7"], 6663 "map": {"at": 196976, "to": "mm"}, 6664 "name": "CP_APPEND_LAST_PS_FENCE", 6665 "type_ref": "CP_APPEND_LAST_CS_FENCE" 6666 }, 6667 { 6668 "chips": ["gfx7"], 6669 "map": {"at": 196980, "to": "mm"}, 6670 "name": "CP_ATOMIC_PREOP_LO", 6671 "type_ref": "CP_PFP_ATOMIC_PREOP_LO" 6672 }, 6673 { 6674 "chips": ["gfx7"], 6675 "map": {"at": 196984, "to": "mm"}, 6676 "name": "CP_ATOMIC_PREOP_HI", 6677 "type_ref": "CP_PFP_ATOMIC_PREOP_HI" 6678 }, 6679 { 6680 "chips": ["gfx7"], 6681 "map": {"at": 196988, "to": "mm"}, 6682 "name": "CP_GDS_ATOMIC0_PREOP_LO", 6683 "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO" 6684 }, 6685 { 6686 "chips": ["gfx7"], 6687 "map": {"at": 196992, "to": "mm"}, 6688 "name": "CP_GDS_ATOMIC0_PREOP_HI", 6689 "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI" 6690 }, 6691 { 6692 "chips": ["gfx7"], 6693 "map": {"at": 196996, "to": "mm"}, 6694 "name": "CP_GDS_ATOMIC1_PREOP_LO", 6695 "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO" 6696 }, 6697 { 6698 "chips": ["gfx7"], 6699 "map": {"at": 197000, "to": "mm"}, 6700 "name": "CP_GDS_ATOMIC1_PREOP_HI", 6701 "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI" 6702 }, 6703 { 6704 "chips": ["gfx7"], 6705 "map": {"at": 197028, "to": "mm"}, 6706 "name": "CP_ME_MC_WADDR_LO", 6707 "type_ref": "CP_ME_MC_WADDR_LO" 6708 }, 6709 { 6710 "chips": ["gfx7"], 6711 "map": {"at": 197032, "to": "mm"}, 6712 "name": "CP_ME_MC_WADDR_HI", 6713 "type_ref": "CP_ME_MC_WADDR_HI" 6714 }, 6715 { 6716 "chips": ["gfx7"], 6717 "map": {"at": 197036, "to": "mm"}, 6718 "name": "CP_ME_MC_WDATA_LO", 6719 "type_ref": "CP_ME_MC_WDATA_LO" 6720 }, 6721 { 6722 "chips": ["gfx7"], 6723 "map": {"at": 197040, "to": "mm"}, 6724 "name": "CP_ME_MC_WDATA_HI", 6725 "type_ref": "CP_ME_MC_WDATA_HI" 6726 }, 6727 { 6728 "chips": ["gfx7"], 6729 "map": {"at": 197044, "to": "mm"}, 6730 "name": "CP_ME_MC_RADDR_LO", 6731 "type_ref": "CP_ME_MC_RADDR_LO" 6732 }, 6733 { 6734 "chips": ["gfx7"], 6735 "map": {"at": 197048, "to": "mm"}, 6736 "name": "CP_ME_MC_RADDR_HI", 6737 "type_ref": "CP_ME_MC_RADDR_HI" 6738 }, 6739 { 6740 "chips": ["gfx7"], 6741 "map": {"at": 197052, "to": "mm"}, 6742 "name": "CP_SEM_WAIT_TIMER", 6743 "type_ref": "CP_SEM_WAIT_TIMER" 6744 }, 6745 { 6746 "chips": ["gfx7"], 6747 "map": {"at": 197056, "to": "mm"}, 6748 "name": "CP_SIG_SEM_ADDR_LO", 6749 "type_ref": "CP_SIG_SEM_ADDR_LO" 6750 }, 6751 { 6752 "chips": ["gfx7"], 6753 "map": {"at": 197060, "to": "mm"}, 6754 "name": "CP_SIG_SEM_ADDR_HI", 6755 "type_ref": "CP_SIG_SEM_ADDR_HI" 6756 }, 6757 { 6758 "chips": ["gfx7"], 6759 "map": {"at": 197072, "to": "mm"}, 6760 "name": "CP_WAIT_REG_MEM_TIMEOUT", 6761 "type_ref": "CP_WAIT_REG_MEM_TIMEOUT" 6762 }, 6763 { 6764 "chips": ["gfx7"], 6765 "map": {"at": 197076, "to": "mm"}, 6766 "name": "CP_WAIT_SEM_ADDR_LO", 6767 "type_ref": "CP_SIG_SEM_ADDR_LO" 6768 }, 6769 { 6770 "chips": ["gfx7"], 6771 "map": {"at": 197080, "to": "mm"}, 6772 "name": "CP_WAIT_SEM_ADDR_HI", 6773 "type_ref": "CP_SIG_SEM_ADDR_HI" 6774 }, 6775 { 6776 "chips": ["gfx7"], 6777 "map": {"at": 197084, "to": "mm"}, 6778 "name": "CP_DMA_PFP_CONTROL", 6779 "type_ref": "CP_DMA_ME_CONTROL" 6780 }, 6781 { 6782 "chips": ["gfx7"], 6783 "map": {"at": 197088, "to": "mm"}, 6784 "name": "CP_DMA_ME_CONTROL", 6785 "type_ref": "CP_DMA_ME_CONTROL" 6786 }, 6787 { 6788 "chips": ["gfx7"], 6789 "map": {"at": 197092, "to": "mm"}, 6790 "name": "CP_COHER_BASE_HI", 6791 "type_ref": "CP_COHER_BASE_HI" 6792 }, 6793 { 6794 "chips": ["gfx7"], 6795 "map": {"at": 197100, "to": "mm"}, 6796 "name": "CP_COHER_START_DELAY", 6797 "type_ref": "CP_COHER_START_DELAY" 6798 }, 6799 { 6800 "chips": ["gfx7"], 6801 "map": {"at": 197104, "to": "mm"}, 6802 "name": "CP_COHER_CNTL", 6803 "type_ref": "CP_COHER_CNTL" 6804 }, 6805 { 6806 "chips": ["gfx7"], 6807 "map": {"at": 197108, "to": "mm"}, 6808 "name": "CP_COHER_SIZE", 6809 "type_ref": "CP_COHER_SIZE" 6810 }, 6811 { 6812 "chips": ["gfx7"], 6813 "map": {"at": 197112, "to": "mm"}, 6814 "name": "CP_COHER_BASE", 6815 "type_ref": "CP_COHER_BASE" 6816 }, 6817 { 6818 "chips": ["gfx7"], 6819 "map": {"at": 197116, "to": "mm"}, 6820 "name": "CP_COHER_STATUS", 6821 "type_ref": "CP_COHER_STATUS" 6822 }, 6823 { 6824 "chips": ["gfx7"], 6825 "map": {"at": 197120, "to": "mm"}, 6826 "name": "CP_DMA_ME_SRC_ADDR", 6827 "type_ref": "CP_DMA_ME_SRC_ADDR" 6828 }, 6829 { 6830 "chips": ["gfx7"], 6831 "map": {"at": 197124, "to": "mm"}, 6832 "name": "CP_DMA_ME_SRC_ADDR_HI", 6833 "type_ref": "CP_DMA_ME_SRC_ADDR_HI" 6834 }, 6835 { 6836 "chips": ["gfx7"], 6837 "map": {"at": 197128, "to": "mm"}, 6838 "name": "CP_DMA_ME_DST_ADDR", 6839 "type_ref": "CP_DMA_ME_DST_ADDR" 6840 }, 6841 { 6842 "chips": ["gfx7"], 6843 "map": {"at": 197132, "to": "mm"}, 6844 "name": "CP_DMA_ME_DST_ADDR_HI", 6845 "type_ref": "CP_DMA_ME_DST_ADDR_HI" 6846 }, 6847 { 6848 "chips": ["gfx7"], 6849 "map": {"at": 197136, "to": "mm"}, 6850 "name": "CP_DMA_ME_COMMAND", 6851 "type_ref": "CP_DMA_ME_COMMAND" 6852 }, 6853 { 6854 "chips": ["gfx7"], 6855 "map": {"at": 197140, "to": "mm"}, 6856 "name": "CP_DMA_PFP_SRC_ADDR", 6857 "type_ref": "CP_DMA_ME_SRC_ADDR" 6858 }, 6859 { 6860 "chips": ["gfx7"], 6861 "map": {"at": 197144, "to": "mm"}, 6862 "name": "CP_DMA_PFP_SRC_ADDR_HI", 6863 "type_ref": "CP_DMA_ME_SRC_ADDR_HI" 6864 }, 6865 { 6866 "chips": ["gfx7"], 6867 "map": {"at": 197148, "to": "mm"}, 6868 "name": "CP_DMA_PFP_DST_ADDR", 6869 "type_ref": "CP_DMA_ME_DST_ADDR" 6870 }, 6871 { 6872 "chips": ["gfx7"], 6873 "map": {"at": 197152, "to": "mm"}, 6874 "name": "CP_DMA_PFP_DST_ADDR_HI", 6875 "type_ref": "CP_DMA_ME_DST_ADDR_HI" 6876 }, 6877 { 6878 "chips": ["gfx7"], 6879 "map": {"at": 197156, "to": "mm"}, 6880 "name": "CP_DMA_PFP_COMMAND", 6881 "type_ref": "CP_DMA_ME_COMMAND" 6882 }, 6883 { 6884 "chips": ["gfx7"], 6885 "map": {"at": 197160, "to": "mm"}, 6886 "name": "CP_DMA_CNTL", 6887 "type_ref": "CP_DMA_CNTL" 6888 }, 6889 { 6890 "chips": ["gfx7"], 6891 "map": {"at": 197164, "to": "mm"}, 6892 "name": "CP_DMA_READ_TAGS", 6893 "type_ref": "CP_DMA_READ_TAGS" 6894 }, 6895 { 6896 "chips": ["gfx7"], 6897 "map": {"at": 197168, "to": "mm"}, 6898 "name": "CP_COHER_SIZE_HI", 6899 "type_ref": "CP_COHER_SIZE_HI" 6900 }, 6901 { 6902 "chips": ["gfx7"], 6903 "map": {"at": 197172, "to": "mm"}, 6904 "name": "CP_PFP_IB_CONTROL", 6905 "type_ref": "CP_PFP_IB_CONTROL" 6906 }, 6907 { 6908 "chips": ["gfx7"], 6909 "map": {"at": 197176, "to": "mm"}, 6910 "name": "CP_PFP_LOAD_CONTROL", 6911 "type_ref": "CP_PFP_LOAD_CONTROL" 6912 }, 6913 { 6914 "chips": ["gfx7"], 6915 "map": {"at": 197180, "to": "mm"}, 6916 "name": "CP_SCRATCH_INDEX", 6917 "type_ref": "CP_CPC_SCRATCH_INDEX" 6918 }, 6919 { 6920 "chips": ["gfx7"], 6921 "map": {"at": 197184, "to": "mm"}, 6922 "name": "CP_SCRATCH_DATA", 6923 "type_ref": "CP_CPC_SCRATCH_DATA" 6924 }, 6925 { 6926 "chips": ["gfx7"], 6927 "map": {"at": 197188, "to": "mm"}, 6928 "name": "CP_RB_OFFSET", 6929 "type_ref": "CP_RB_OFFSET" 6930 }, 6931 { 6932 "chips": ["gfx7"], 6933 "map": {"at": 197192, "to": "mm"}, 6934 "name": "CP_IB1_OFFSET", 6935 "type_ref": "CP_IB1_OFFSET" 6936 }, 6937 { 6938 "chips": ["gfx7"], 6939 "map": {"at": 197196, "to": "mm"}, 6940 "name": "CP_IB2_OFFSET", 6941 "type_ref": "CP_IB2_OFFSET" 6942 }, 6943 { 6944 "chips": ["gfx7"], 6945 "map": {"at": 197200, "to": "mm"}, 6946 "name": "CP_IB1_PREAMBLE_BEGIN", 6947 "type_ref": "CP_IB1_PREAMBLE_BEGIN" 6948 }, 6949 { 6950 "chips": ["gfx7"], 6951 "map": {"at": 197204, "to": "mm"}, 6952 "name": "CP_IB1_PREAMBLE_END", 6953 "type_ref": "CP_IB1_PREAMBLE_END" 6954 }, 6955 { 6956 "chips": ["gfx7"], 6957 "map": {"at": 197208, "to": "mm"}, 6958 "name": "CP_IB2_PREAMBLE_BEGIN", 6959 "type_ref": "CP_IB2_PREAMBLE_BEGIN" 6960 }, 6961 { 6962 "chips": ["gfx7"], 6963 "map": {"at": 197212, "to": "mm"}, 6964 "name": "CP_IB2_PREAMBLE_END", 6965 "type_ref": "CP_IB2_PREAMBLE_END" 6966 }, 6967 { 6968 "chips": ["gfx7"], 6969 "map": {"at": 197216, "to": "mm"}, 6970 "name": "CP_CE_IB1_OFFSET", 6971 "type_ref": "CP_IB1_OFFSET" 6972 }, 6973 { 6974 "chips": ["gfx7"], 6975 "map": {"at": 197220, "to": "mm"}, 6976 "name": "CP_CE_IB2_OFFSET", 6977 "type_ref": "CP_IB2_OFFSET" 6978 }, 6979 { 6980 "chips": ["gfx7"], 6981 "map": {"at": 197224, "to": "mm"}, 6982 "name": "CP_CE_COUNTER", 6983 "type_ref": "CP_CE_COUNTER" 6984 }, 6985 { 6986 "chips": ["gfx7"], 6987 "map": {"at": 197388, "to": "mm"}, 6988 "name": "CP_CE_INIT_BASE_LO", 6989 "type_ref": "CP_CE_INIT_BASE_LO" 6990 }, 6991 { 6992 "chips": ["gfx7"], 6993 "map": {"at": 197392, "to": "mm"}, 6994 "name": "CP_CE_INIT_BASE_HI", 6995 "type_ref": "CP_CE_INIT_BASE_HI" 6996 }, 6997 { 6998 "chips": ["gfx7"], 6999 "map": {"at": 197396, "to": "mm"}, 7000 "name": "CP_CE_INIT_BUFSZ", 7001 "type_ref": "CP_CE_INIT_BUFSZ" 7002 }, 7003 { 7004 "chips": ["gfx7"], 7005 "map": {"at": 197400, "to": "mm"}, 7006 "name": "CP_CE_IB1_BASE_LO", 7007 "type_ref": "CP_CE_IB1_BASE_LO" 7008 }, 7009 { 7010 "chips": ["gfx7"], 7011 "map": {"at": 197404, "to": "mm"}, 7012 "name": "CP_CE_IB1_BASE_HI", 7013 "type_ref": "CP_CE_IB1_BASE_HI" 7014 }, 7015 { 7016 "chips": ["gfx7"], 7017 "map": {"at": 197408, "to": "mm"}, 7018 "name": "CP_CE_IB1_BUFSZ", 7019 "type_ref": "CP_CE_IB1_BUFSZ" 7020 }, 7021 { 7022 "chips": ["gfx7"], 7023 "map": {"at": 197412, "to": "mm"}, 7024 "name": "CP_CE_IB2_BASE_LO", 7025 "type_ref": "CP_CE_IB2_BASE_LO" 7026 }, 7027 { 7028 "chips": ["gfx7"], 7029 "map": {"at": 197416, "to": "mm"}, 7030 "name": "CP_CE_IB2_BASE_HI", 7031 "type_ref": "CP_CE_IB2_BASE_HI" 7032 }, 7033 { 7034 "chips": ["gfx7"], 7035 "map": {"at": 197420, "to": "mm"}, 7036 "name": "CP_CE_IB2_BUFSZ", 7037 "type_ref": "CP_CE_IB2_BUFSZ" 7038 }, 7039 { 7040 "chips": ["gfx7"], 7041 "map": {"at": 197424, "to": "mm"}, 7042 "name": "CP_IB1_BASE_LO", 7043 "type_ref": "CP_CE_IB1_BASE_LO" 7044 }, 7045 { 7046 "chips": ["gfx7"], 7047 "map": {"at": 197428, "to": "mm"}, 7048 "name": "CP_IB1_BASE_HI", 7049 "type_ref": "CP_CE_IB1_BASE_HI" 7050 }, 7051 { 7052 "chips": ["gfx7"], 7053 "map": {"at": 197432, "to": "mm"}, 7054 "name": "CP_IB1_BUFSZ", 7055 "type_ref": "CP_CE_IB1_BUFSZ" 7056 }, 7057 { 7058 "chips": ["gfx7"], 7059 "map": {"at": 197436, "to": "mm"}, 7060 "name": "CP_IB2_BASE_LO", 7061 "type_ref": "CP_CE_IB2_BASE_LO" 7062 }, 7063 { 7064 "chips": ["gfx7"], 7065 "map": {"at": 197440, "to": "mm"}, 7066 "name": "CP_IB2_BASE_HI", 7067 "type_ref": "CP_CE_IB2_BASE_HI" 7068 }, 7069 { 7070 "chips": ["gfx7"], 7071 "map": {"at": 197444, "to": "mm"}, 7072 "name": "CP_IB2_BUFSZ", 7073 "type_ref": "CP_CE_IB2_BUFSZ" 7074 }, 7075 { 7076 "chips": ["gfx7"], 7077 "map": {"at": 197448, "to": "mm"}, 7078 "name": "CP_ST_BASE_LO", 7079 "type_ref": "CP_ST_BASE_LO" 7080 }, 7081 { 7082 "chips": ["gfx7"], 7083 "map": {"at": 197452, "to": "mm"}, 7084 "name": "CP_ST_BASE_HI", 7085 "type_ref": "CP_ST_BASE_HI" 7086 }, 7087 { 7088 "chips": ["gfx7"], 7089 "map": {"at": 197456, "to": "mm"}, 7090 "name": "CP_ST_BUFSZ", 7091 "type_ref": "CP_ST_BUFSZ" 7092 }, 7093 { 7094 "chips": ["gfx7"], 7095 "map": {"at": 197460, "to": "mm"}, 7096 "name": "CP_EOP_DONE_EVENT_CNTL", 7097 "type_ref": "CP_EOP_DONE_EVENT_CNTL" 7098 }, 7099 { 7100 "chips": ["gfx7"], 7101 "map": {"at": 197464, "to": "mm"}, 7102 "name": "CP_EOP_DONE_DATA_CNTL", 7103 "type_ref": "CP_EOP_DONE_DATA_CNTL" 7104 }, 7105 { 7106 "chips": ["gfx7"], 7107 "map": {"at": 198656, "to": "mm"}, 7108 "name": "GRBM_GFX_INDEX", 7109 "type_ref": "GRBM_GFX_INDEX" 7110 }, 7111 { 7112 "chips": ["gfx7"], 7113 "map": {"at": 198912, "to": "mm"}, 7114 "name": "VGT_ESGS_RING_SIZE", 7115 "type_ref": "VGT_ESGS_RING_SIZE" 7116 }, 7117 { 7118 "chips": ["gfx7"], 7119 "map": {"at": 198916, "to": "mm"}, 7120 "name": "VGT_GSVS_RING_SIZE", 7121 "type_ref": "VGT_ESGS_RING_SIZE" 7122 }, 7123 { 7124 "chips": ["gfx7"], 7125 "map": {"at": 198920, "to": "mm"}, 7126 "name": "VGT_PRIMITIVE_TYPE", 7127 "type_ref": "VGT_PRIMITIVE_TYPE" 7128 }, 7129 { 7130 "chips": ["gfx7"], 7131 "map": {"at": 198924, "to": "mm"}, 7132 "name": "VGT_INDEX_TYPE", 7133 "type_ref": "VGT_INDEX_TYPE" 7134 }, 7135 { 7136 "chips": ["gfx7"], 7137 "map": {"at": 198928, "to": "mm"}, 7138 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0", 7139 "type_ref": "COMPUTE_DIM_X" 7140 }, 7141 { 7142 "chips": ["gfx7"], 7143 "map": {"at": 198932, "to": "mm"}, 7144 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1", 7145 "type_ref": "COMPUTE_DIM_X" 7146 }, 7147 { 7148 "chips": ["gfx7"], 7149 "map": {"at": 198936, "to": "mm"}, 7150 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2", 7151 "type_ref": "COMPUTE_DIM_X" 7152 }, 7153 { 7154 "chips": ["gfx7"], 7155 "map": {"at": 198940, "to": "mm"}, 7156 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3", 7157 "type_ref": "COMPUTE_DIM_X" 7158 }, 7159 { 7160 "chips": ["gfx7"], 7161 "map": {"at": 198960, "to": "mm"}, 7162 "name": "VGT_NUM_INDICES", 7163 "type_ref": "VGT_DMA_SIZE" 7164 }, 7165 { 7166 "chips": ["gfx7"], 7167 "map": {"at": 198964, "to": "mm"}, 7168 "name": "VGT_NUM_INSTANCES", 7169 "type_ref": "VGT_DMA_NUM_INSTANCES" 7170 }, 7171 { 7172 "chips": ["gfx7"], 7173 "map": {"at": 198968, "to": "mm"}, 7174 "name": "VGT_TF_RING_SIZE", 7175 "type_ref": "VGT_TF_RING_SIZE" 7176 }, 7177 { 7178 "chips": ["gfx7"], 7179 "map": {"at": 198972, "to": "mm"}, 7180 "name": "VGT_HS_OFFCHIP_PARAM", 7181 "type_ref": "VGT_HS_OFFCHIP_PARAM" 7182 }, 7183 { 7184 "chips": ["gfx7"], 7185 "map": {"at": 198976, "to": "mm"}, 7186 "name": "VGT_TF_MEMORY_BASE", 7187 "type_ref": "VGT_TF_MEMORY_BASE" 7188 }, 7189 { 7190 "chips": ["gfx7"], 7191 "map": {"at": 199168, "to": "mm"}, 7192 "name": "PA_SU_LINE_STIPPLE_VALUE", 7193 "type_ref": "PA_SU_LINE_STIPPLE_VALUE" 7194 }, 7195 { 7196 "chips": ["gfx7"], 7197 "map": {"at": 199172, "to": "mm"}, 7198 "name": "PA_SC_LINE_STIPPLE_STATE", 7199 "type_ref": "PA_SC_LINE_STIPPLE_STATE" 7200 }, 7201 { 7202 "chips": ["gfx7"], 7203 "map": {"at": 199184, "to": "mm"}, 7204 "name": "PA_SC_SCREEN_EXTENT_MIN_0", 7205 "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0" 7206 }, 7207 { 7208 "chips": ["gfx7"], 7209 "map": {"at": 199188, "to": "mm"}, 7210 "name": "PA_SC_SCREEN_EXTENT_MAX_0", 7211 "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0" 7212 }, 7213 { 7214 "chips": ["gfx7"], 7215 "map": {"at": 199192, "to": "mm"}, 7216 "name": "PA_SC_SCREEN_EXTENT_MIN_1", 7217 "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0" 7218 }, 7219 { 7220 "chips": ["gfx7"], 7221 "map": {"at": 199212, "to": "mm"}, 7222 "name": "PA_SC_SCREEN_EXTENT_MAX_1", 7223 "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0" 7224 }, 7225 { 7226 "chips": ["gfx7"], 7227 "map": {"at": 199296, "to": "mm"}, 7228 "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN", 7229 "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN" 7230 }, 7231 { 7232 "chips": ["gfx7"], 7233 "map": {"at": 199300, "to": "mm"}, 7234 "name": "PA_SC_P3D_TRAP_SCREEN_H", 7235 "type_ref": "PA_SC_P3D_TRAP_SCREEN_H" 7236 }, 7237 { 7238 "chips": ["gfx7"], 7239 "map": {"at": 199304, "to": "mm"}, 7240 "name": "PA_SC_P3D_TRAP_SCREEN_V", 7241 "type_ref": "PA_SC_P3D_TRAP_SCREEN_V" 7242 }, 7243 { 7244 "chips": ["gfx7"], 7245 "map": {"at": 199308, "to": "mm"}, 7246 "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE", 7247 "type_ref": "CP_DRAW_OBJECT_COUNTER" 7248 }, 7249 { 7250 "chips": ["gfx7"], 7251 "map": {"at": 199312, "to": "mm"}, 7252 "name": "PA_SC_P3D_TRAP_SCREEN_COUNT", 7253 "type_ref": "CP_DRAW_OBJECT_COUNTER" 7254 }, 7255 { 7256 "chips": ["gfx7"], 7257 "map": {"at": 199328, "to": "mm"}, 7258 "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN", 7259 "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN" 7260 }, 7261 { 7262 "chips": ["gfx7"], 7263 "map": {"at": 199332, "to": "mm"}, 7264 "name": "PA_SC_HP3D_TRAP_SCREEN_H", 7265 "type_ref": "PA_SC_P3D_TRAP_SCREEN_H" 7266 }, 7267 { 7268 "chips": ["gfx7"], 7269 "map": {"at": 199336, "to": "mm"}, 7270 "name": "PA_SC_HP3D_TRAP_SCREEN_V", 7271 "type_ref": "PA_SC_P3D_TRAP_SCREEN_V" 7272 }, 7273 { 7274 "chips": ["gfx7"], 7275 "map": {"at": 199340, "to": "mm"}, 7276 "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE", 7277 "type_ref": "CP_DRAW_OBJECT_COUNTER" 7278 }, 7279 { 7280 "chips": ["gfx7"], 7281 "map": {"at": 199344, "to": "mm"}, 7282 "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT", 7283 "type_ref": "CP_DRAW_OBJECT_COUNTER" 7284 }, 7285 { 7286 "chips": ["gfx7"], 7287 "map": {"at": 199360, "to": "mm"}, 7288 "name": "PA_SC_TRAP_SCREEN_HV_EN", 7289 "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN" 7290 }, 7291 { 7292 "chips": ["gfx7"], 7293 "map": {"at": 199364, "to": "mm"}, 7294 "name": "PA_SC_TRAP_SCREEN_H", 7295 "type_ref": "PA_SC_P3D_TRAP_SCREEN_H" 7296 }, 7297 { 7298 "chips": ["gfx7"], 7299 "map": {"at": 199368, "to": "mm"}, 7300 "name": "PA_SC_TRAP_SCREEN_V", 7301 "type_ref": "PA_SC_P3D_TRAP_SCREEN_V" 7302 }, 7303 { 7304 "chips": ["gfx7"], 7305 "map": {"at": 199372, "to": "mm"}, 7306 "name": "PA_SC_TRAP_SCREEN_OCCURRENCE", 7307 "type_ref": "CP_DRAW_OBJECT_COUNTER" 7308 }, 7309 { 7310 "chips": ["gfx7"], 7311 "map": {"at": 199376, "to": "mm"}, 7312 "name": "PA_SC_TRAP_SCREEN_COUNT", 7313 "type_ref": "CP_DRAW_OBJECT_COUNTER" 7314 }, 7315 { 7316 "chips": ["gfx7"], 7317 "map": {"at": 199936, "to": "mm"}, 7318 "name": "SQ_THREAD_TRACE_USERDATA_0", 7319 "type_ref": "CP_APPEND_DATA" 7320 }, 7321 { 7322 "chips": ["gfx7"], 7323 "map": {"at": 199940, "to": "mm"}, 7324 "name": "SQ_THREAD_TRACE_USERDATA_1", 7325 "type_ref": "CP_APPEND_DATA" 7326 }, 7327 { 7328 "chips": ["gfx7"], 7329 "map": {"at": 199944, "to": "mm"}, 7330 "name": "SQ_THREAD_TRACE_USERDATA_2", 7331 "type_ref": "CP_APPEND_DATA" 7332 }, 7333 { 7334 "chips": ["gfx7"], 7335 "map": {"at": 199948, "to": "mm"}, 7336 "name": "SQ_THREAD_TRACE_USERDATA_3", 7337 "type_ref": "CP_APPEND_DATA" 7338 }, 7339 { 7340 "chips": ["gfx7"], 7341 "map": {"at": 199968, "to": "mm"}, 7342 "name": "SQC_CACHES", 7343 "type_ref": "SQC_CACHES" 7344 }, 7345 { 7346 "chips": ["gfx7"], 7347 "map": {"at": 200192, "to": "mm"}, 7348 "name": "TA_CS_BC_BASE_ADDR", 7349 "type_ref": "TA_BC_BASE_ADDR" 7350 }, 7351 { 7352 "chips": ["gfx7"], 7353 "map": {"at": 200196, "to": "mm"}, 7354 "name": "TA_CS_BC_BASE_ADDR_HI", 7355 "type_ref": "TA_BC_BASE_ADDR_HI" 7356 }, 7357 { 7358 "chips": ["gfx7"], 7359 "map": {"at": 200448, "to": "mm"}, 7360 "name": "DB_OCCLUSION_COUNT0_LOW", 7361 "type_ref": "DB_ZPASS_COUNT_LOW" 7362 }, 7363 { 7364 "chips": ["gfx7"], 7365 "map": {"at": 200452, "to": "mm"}, 7366 "name": "DB_OCCLUSION_COUNT0_HI", 7367 "type_ref": "DB_ZPASS_COUNT_HI" 7368 }, 7369 { 7370 "chips": ["gfx7"], 7371 "map": {"at": 200456, "to": "mm"}, 7372 "name": "DB_OCCLUSION_COUNT1_LOW", 7373 "type_ref": "DB_ZPASS_COUNT_LOW" 7374 }, 7375 { 7376 "chips": ["gfx7"], 7377 "map": {"at": 200460, "to": "mm"}, 7378 "name": "DB_OCCLUSION_COUNT1_HI", 7379 "type_ref": "DB_ZPASS_COUNT_HI" 7380 }, 7381 { 7382 "chips": ["gfx7"], 7383 "map": {"at": 200464, "to": "mm"}, 7384 "name": "DB_OCCLUSION_COUNT2_LOW", 7385 "type_ref": "DB_ZPASS_COUNT_LOW" 7386 }, 7387 { 7388 "chips": ["gfx7"], 7389 "map": {"at": 200468, "to": "mm"}, 7390 "name": "DB_OCCLUSION_COUNT2_HI", 7391 "type_ref": "DB_ZPASS_COUNT_HI" 7392 }, 7393 { 7394 "chips": ["gfx7"], 7395 "map": {"at": 200472, "to": "mm"}, 7396 "name": "DB_OCCLUSION_COUNT3_LOW", 7397 "type_ref": "DB_ZPASS_COUNT_LOW" 7398 }, 7399 { 7400 "chips": ["gfx7"], 7401 "map": {"at": 200476, "to": "mm"}, 7402 "name": "DB_OCCLUSION_COUNT3_HI", 7403 "type_ref": "DB_ZPASS_COUNT_HI" 7404 }, 7405 { 7406 "chips": ["gfx7"], 7407 "map": {"at": 200696, "to": "mm"}, 7408 "name": "DB_ZPASS_COUNT_LOW", 7409 "type_ref": "DB_ZPASS_COUNT_LOW" 7410 }, 7411 { 7412 "chips": ["gfx7"], 7413 "map": {"at": 200700, "to": "mm"}, 7414 "name": "DB_ZPASS_COUNT_HI", 7415 "type_ref": "DB_ZPASS_COUNT_HI" 7416 }, 7417 { 7418 "chips": ["gfx7"], 7419 "map": {"at": 200704, "to": "mm"}, 7420 "name": "GDS_RD_ADDR", 7421 "type_ref": "GDS_RD_ADDR" 7422 }, 7423 { 7424 "chips": ["gfx7"], 7425 "map": {"at": 200708, "to": "mm"}, 7426 "name": "GDS_RD_DATA", 7427 "type_ref": "GDS_RD_DATA" 7428 }, 7429 { 7430 "chips": ["gfx7"], 7431 "map": {"at": 200712, "to": "mm"}, 7432 "name": "GDS_RD_BURST_ADDR", 7433 "type_ref": "GDS_RD_BURST_ADDR" 7434 }, 7435 { 7436 "chips": ["gfx7"], 7437 "map": {"at": 200716, "to": "mm"}, 7438 "name": "GDS_RD_BURST_COUNT", 7439 "type_ref": "GDS_RD_BURST_COUNT" 7440 }, 7441 { 7442 "chips": ["gfx7"], 7443 "map": {"at": 200720, "to": "mm"}, 7444 "name": "GDS_RD_BURST_DATA", 7445 "type_ref": "GDS_RD_BURST_DATA" 7446 }, 7447 { 7448 "chips": ["gfx7"], 7449 "map": {"at": 200724, "to": "mm"}, 7450 "name": "GDS_WR_ADDR", 7451 "type_ref": "GDS_WR_ADDR" 7452 }, 7453 { 7454 "chips": ["gfx7"], 7455 "map": {"at": 200728, "to": "mm"}, 7456 "name": "GDS_WR_DATA", 7457 "type_ref": "GDS_WR_DATA" 7458 }, 7459 { 7460 "chips": ["gfx7"], 7461 "map": {"at": 200732, "to": "mm"}, 7462 "name": "GDS_WR_BURST_ADDR", 7463 "type_ref": "GDS_WR_ADDR" 7464 }, 7465 { 7466 "chips": ["gfx7"], 7467 "map": {"at": 200736, "to": "mm"}, 7468 "name": "GDS_WR_BURST_DATA", 7469 "type_ref": "GDS_WR_DATA" 7470 }, 7471 { 7472 "chips": ["gfx7"], 7473 "map": {"at": 200740, "to": "mm"}, 7474 "name": "GDS_WRITE_COMPLETE", 7475 "type_ref": "GDS_WRITE_COMPLETE" 7476 }, 7477 { 7478 "chips": ["gfx7"], 7479 "map": {"at": 200744, "to": "mm"}, 7480 "name": "GDS_ATOM_CNTL", 7481 "type_ref": "GDS_ATOM_CNTL" 7482 }, 7483 { 7484 "chips": ["gfx7"], 7485 "map": {"at": 200748, "to": "mm"}, 7486 "name": "GDS_ATOM_COMPLETE", 7487 "type_ref": "GDS_ATOM_COMPLETE" 7488 }, 7489 { 7490 "chips": ["gfx7"], 7491 "map": {"at": 200752, "to": "mm"}, 7492 "name": "GDS_ATOM_BASE", 7493 "type_ref": "GDS_ATOM_BASE" 7494 }, 7495 { 7496 "chips": ["gfx7"], 7497 "map": {"at": 200756, "to": "mm"}, 7498 "name": "GDS_ATOM_SIZE", 7499 "type_ref": "GDS_ATOM_SIZE" 7500 }, 7501 { 7502 "chips": ["gfx7"], 7503 "map": {"at": 200760, "to": "mm"}, 7504 "name": "GDS_ATOM_OFFSET0", 7505 "type_ref": "GDS_ATOM_OFFSET0" 7506 }, 7507 { 7508 "chips": ["gfx7"], 7509 "map": {"at": 200764, "to": "mm"}, 7510 "name": "GDS_ATOM_OFFSET1", 7511 "type_ref": "GDS_ATOM_OFFSET1" 7512 }, 7513 { 7514 "chips": ["gfx7"], 7515 "map": {"at": 200768, "to": "mm"}, 7516 "name": "GDS_ATOM_DST", 7517 "type_ref": "GDS_ATOM_DST" 7518 }, 7519 { 7520 "chips": ["gfx7"], 7521 "map": {"at": 200772, "to": "mm"}, 7522 "name": "GDS_ATOM_OP", 7523 "type_ref": "GDS_ATOM_OP" 7524 }, 7525 { 7526 "chips": ["gfx7"], 7527 "map": {"at": 200776, "to": "mm"}, 7528 "name": "GDS_ATOM_SRC0", 7529 "type_ref": "CP_APPEND_DATA" 7530 }, 7531 { 7532 "chips": ["gfx7"], 7533 "map": {"at": 200780, "to": "mm"}, 7534 "name": "GDS_ATOM_SRC0_U", 7535 "type_ref": "CP_APPEND_DATA" 7536 }, 7537 { 7538 "chips": ["gfx7"], 7539 "map": {"at": 200784, "to": "mm"}, 7540 "name": "GDS_ATOM_SRC1", 7541 "type_ref": "CP_APPEND_DATA" 7542 }, 7543 { 7544 "chips": ["gfx7"], 7545 "map": {"at": 200788, "to": "mm"}, 7546 "name": "GDS_ATOM_SRC1_U", 7547 "type_ref": "CP_APPEND_DATA" 7548 }, 7549 { 7550 "chips": ["gfx7"], 7551 "map": {"at": 200792, "to": "mm"}, 7552 "name": "GDS_ATOM_READ0", 7553 "type_ref": "CP_APPEND_DATA" 7554 }, 7555 { 7556 "chips": ["gfx7"], 7557 "map": {"at": 200796, "to": "mm"}, 7558 "name": "GDS_ATOM_READ0_U", 7559 "type_ref": "CP_APPEND_DATA" 7560 }, 7561 { 7562 "chips": ["gfx7"], 7563 "map": {"at": 200800, "to": "mm"}, 7564 "name": "GDS_ATOM_READ1", 7565 "type_ref": "CP_APPEND_DATA" 7566 }, 7567 { 7568 "chips": ["gfx7"], 7569 "map": {"at": 200804, "to": "mm"}, 7570 "name": "GDS_ATOM_READ1_U", 7571 "type_ref": "CP_APPEND_DATA" 7572 }, 7573 { 7574 "chips": ["gfx7"], 7575 "map": {"at": 200808, "to": "mm"}, 7576 "name": "GDS_GWS_RESOURCE_CNTL", 7577 "type_ref": "GDS_GWS_RESOURCE_CNTL" 7578 }, 7579 { 7580 "chips": ["gfx7"], 7581 "map": {"at": 200812, "to": "mm"}, 7582 "name": "GDS_GWS_RESOURCE", 7583 "type_ref": "GDS_GWS_RESOURCE" 7584 }, 7585 { 7586 "chips": ["gfx7"], 7587 "map": {"at": 200816, "to": "mm"}, 7588 "name": "GDS_GWS_RESOURCE_CNT", 7589 "type_ref": "GDS_GWS_RESOURCE_CNT" 7590 }, 7591 { 7592 "chips": ["gfx7"], 7593 "map": {"at": 200820, "to": "mm"}, 7594 "name": "GDS_OA_CNTL", 7595 "type_ref": "GDS_OA_CNTL" 7596 }, 7597 { 7598 "chips": ["gfx7"], 7599 "map": {"at": 200824, "to": "mm"}, 7600 "name": "GDS_OA_COUNTER", 7601 "type_ref": "GDS_OA_COUNTER" 7602 }, 7603 { 7604 "chips": ["gfx7"], 7605 "map": {"at": 200828, "to": "mm"}, 7606 "name": "GDS_OA_ADDRESS", 7607 "type_ref": "GDS_OA_ADDRESS" 7608 }, 7609 { 7610 "chips": ["gfx7"], 7611 "map": {"at": 200832, "to": "mm"}, 7612 "name": "GDS_OA_INCDEC", 7613 "type_ref": "GDS_OA_INCDEC" 7614 }, 7615 { 7616 "chips": ["gfx7"], 7617 "map": {"at": 200836, "to": "mm"}, 7618 "name": "GDS_OA_RING_SIZE", 7619 "type_ref": "GDS_OA_RING_SIZE" 7620 }, 7621 { 7622 "chips": ["gfx7"], 7623 "map": {"at": 212992, "to": "mm"}, 7624 "name": "CPG_PERFCOUNTER1_LO", 7625 "type_ref": "CB_PERFCOUNTER0_LO" 7626 }, 7627 { 7628 "chips": ["gfx7"], 7629 "map": {"at": 212996, "to": "mm"}, 7630 "name": "CPG_PERFCOUNTER1_HI", 7631 "type_ref": "CB_PERFCOUNTER0_HI" 7632 }, 7633 { 7634 "chips": ["gfx7"], 7635 "map": {"at": 213000, "to": "mm"}, 7636 "name": "CPG_PERFCOUNTER0_LO", 7637 "type_ref": "CB_PERFCOUNTER0_LO" 7638 }, 7639 { 7640 "chips": ["gfx7"], 7641 "map": {"at": 213004, "to": "mm"}, 7642 "name": "CPG_PERFCOUNTER0_HI", 7643 "type_ref": "CB_PERFCOUNTER0_HI" 7644 }, 7645 { 7646 "chips": ["gfx7"], 7647 "map": {"at": 213008, "to": "mm"}, 7648 "name": "CPC_PERFCOUNTER1_LO", 7649 "type_ref": "CB_PERFCOUNTER0_LO" 7650 }, 7651 { 7652 "chips": ["gfx7"], 7653 "map": {"at": 213012, "to": "mm"}, 7654 "name": "CPC_PERFCOUNTER1_HI", 7655 "type_ref": "CB_PERFCOUNTER0_HI" 7656 }, 7657 { 7658 "chips": ["gfx7"], 7659 "map": {"at": 213016, "to": "mm"}, 7660 "name": "CPC_PERFCOUNTER0_LO", 7661 "type_ref": "CB_PERFCOUNTER0_LO" 7662 }, 7663 { 7664 "chips": ["gfx7"], 7665 "map": {"at": 213020, "to": "mm"}, 7666 "name": "CPC_PERFCOUNTER0_HI", 7667 "type_ref": "CB_PERFCOUNTER0_HI" 7668 }, 7669 { 7670 "chips": ["gfx7"], 7671 "map": {"at": 213024, "to": "mm"}, 7672 "name": "CPF_PERFCOUNTER1_LO", 7673 "type_ref": "CB_PERFCOUNTER0_LO" 7674 }, 7675 { 7676 "chips": ["gfx7"], 7677 "map": {"at": 213028, "to": "mm"}, 7678 "name": "CPF_PERFCOUNTER1_HI", 7679 "type_ref": "CB_PERFCOUNTER0_HI" 7680 }, 7681 { 7682 "chips": ["gfx7"], 7683 "map": {"at": 213032, "to": "mm"}, 7684 "name": "CPF_PERFCOUNTER0_LO", 7685 "type_ref": "CB_PERFCOUNTER0_LO" 7686 }, 7687 { 7688 "chips": ["gfx7"], 7689 "map": {"at": 213036, "to": "mm"}, 7690 "name": "CPF_PERFCOUNTER0_HI", 7691 "type_ref": "CB_PERFCOUNTER0_HI" 7692 }, 7693 { 7694 "chips": ["gfx7"], 7695 "map": {"at": 213248, "to": "mm"}, 7696 "name": "GRBM_PERFCOUNTER0_LO", 7697 "type_ref": "CB_PERFCOUNTER0_LO" 7698 }, 7699 { 7700 "chips": ["gfx7"], 7701 "map": {"at": 213252, "to": "mm"}, 7702 "name": "GRBM_PERFCOUNTER0_HI", 7703 "type_ref": "CB_PERFCOUNTER0_HI" 7704 }, 7705 { 7706 "chips": ["gfx7"], 7707 "map": {"at": 213260, "to": "mm"}, 7708 "name": "GRBM_PERFCOUNTER1_LO", 7709 "type_ref": "CB_PERFCOUNTER0_LO" 7710 }, 7711 { 7712 "chips": ["gfx7"], 7713 "map": {"at": 213264, "to": "mm"}, 7714 "name": "GRBM_PERFCOUNTER1_HI", 7715 "type_ref": "CB_PERFCOUNTER0_HI" 7716 }, 7717 { 7718 "chips": ["gfx7"], 7719 "map": {"at": 213268, "to": "mm"}, 7720 "name": "GRBM_SE0_PERFCOUNTER_LO", 7721 "type_ref": "CB_PERFCOUNTER0_LO" 7722 }, 7723 { 7724 "chips": ["gfx7"], 7725 "map": {"at": 213272, "to": "mm"}, 7726 "name": "GRBM_SE0_PERFCOUNTER_HI", 7727 "type_ref": "CB_PERFCOUNTER0_HI" 7728 }, 7729 { 7730 "chips": ["gfx7"], 7731 "map": {"at": 213276, "to": "mm"}, 7732 "name": "GRBM_SE1_PERFCOUNTER_LO", 7733 "type_ref": "CB_PERFCOUNTER0_LO" 7734 }, 7735 { 7736 "chips": ["gfx7"], 7737 "map": {"at": 213280, "to": "mm"}, 7738 "name": "GRBM_SE1_PERFCOUNTER_HI", 7739 "type_ref": "CB_PERFCOUNTER0_HI" 7740 }, 7741 { 7742 "chips": ["gfx7"], 7743 "map": {"at": 213284, "to": "mm"}, 7744 "name": "GRBM_SE2_PERFCOUNTER_LO", 7745 "type_ref": "CB_PERFCOUNTER0_LO" 7746 }, 7747 { 7748 "chips": ["gfx7"], 7749 "map": {"at": 213288, "to": "mm"}, 7750 "name": "GRBM_SE2_PERFCOUNTER_HI", 7751 "type_ref": "CB_PERFCOUNTER0_HI" 7752 }, 7753 { 7754 "chips": ["gfx7"], 7755 "map": {"at": 213292, "to": "mm"}, 7756 "name": "GRBM_SE3_PERFCOUNTER_LO", 7757 "type_ref": "CB_PERFCOUNTER0_LO" 7758 }, 7759 { 7760 "chips": ["gfx7"], 7761 "map": {"at": 213296, "to": "mm"}, 7762 "name": "GRBM_SE3_PERFCOUNTER_HI", 7763 "type_ref": "CB_PERFCOUNTER0_HI" 7764 }, 7765 { 7766 "chips": ["gfx7"], 7767 "map": {"at": 213504, "to": "mm"}, 7768 "name": "WD_PERFCOUNTER0_LO", 7769 "type_ref": "CB_PERFCOUNTER0_LO" 7770 }, 7771 { 7772 "chips": ["gfx7"], 7773 "map": {"at": 213508, "to": "mm"}, 7774 "name": "WD_PERFCOUNTER0_HI", 7775 "type_ref": "CB_PERFCOUNTER0_HI" 7776 }, 7777 { 7778 "chips": ["gfx7"], 7779 "map": {"at": 213512, "to": "mm"}, 7780 "name": "WD_PERFCOUNTER1_LO", 7781 "type_ref": "CB_PERFCOUNTER0_LO" 7782 }, 7783 { 7784 "chips": ["gfx7"], 7785 "map": {"at": 213516, "to": "mm"}, 7786 "name": "WD_PERFCOUNTER1_HI", 7787 "type_ref": "CB_PERFCOUNTER0_HI" 7788 }, 7789 { 7790 "chips": ["gfx7"], 7791 "map": {"at": 213520, "to": "mm"}, 7792 "name": "WD_PERFCOUNTER2_LO", 7793 "type_ref": "CB_PERFCOUNTER0_LO" 7794 }, 7795 { 7796 "chips": ["gfx7"], 7797 "map": {"at": 213524, "to": "mm"}, 7798 "name": "WD_PERFCOUNTER2_HI", 7799 "type_ref": "CB_PERFCOUNTER0_HI" 7800 }, 7801 { 7802 "chips": ["gfx7"], 7803 "map": {"at": 213528, "to": "mm"}, 7804 "name": "WD_PERFCOUNTER3_LO", 7805 "type_ref": "CB_PERFCOUNTER0_LO" 7806 }, 7807 { 7808 "chips": ["gfx7"], 7809 "map": {"at": 213532, "to": "mm"}, 7810 "name": "WD_PERFCOUNTER3_HI", 7811 "type_ref": "CB_PERFCOUNTER0_HI" 7812 }, 7813 { 7814 "chips": ["gfx7"], 7815 "map": {"at": 213536, "to": "mm"}, 7816 "name": "IA_PERFCOUNTER0_LO", 7817 "type_ref": "CB_PERFCOUNTER0_LO" 7818 }, 7819 { 7820 "chips": ["gfx7"], 7821 "map": {"at": 213540, "to": "mm"}, 7822 "name": "IA_PERFCOUNTER0_HI", 7823 "type_ref": "CB_PERFCOUNTER0_HI" 7824 }, 7825 { 7826 "chips": ["gfx7"], 7827 "map": {"at": 213544, "to": "mm"}, 7828 "name": "IA_PERFCOUNTER1_LO", 7829 "type_ref": "CB_PERFCOUNTER0_LO" 7830 }, 7831 { 7832 "chips": ["gfx7"], 7833 "map": {"at": 213548, "to": "mm"}, 7834 "name": "IA_PERFCOUNTER1_HI", 7835 "type_ref": "CB_PERFCOUNTER0_HI" 7836 }, 7837 { 7838 "chips": ["gfx7"], 7839 "map": {"at": 213552, "to": "mm"}, 7840 "name": "IA_PERFCOUNTER2_LO", 7841 "type_ref": "CB_PERFCOUNTER0_LO" 7842 }, 7843 { 7844 "chips": ["gfx7"], 7845 "map": {"at": 213556, "to": "mm"}, 7846 "name": "IA_PERFCOUNTER2_HI", 7847 "type_ref": "CB_PERFCOUNTER0_HI" 7848 }, 7849 { 7850 "chips": ["gfx7"], 7851 "map": {"at": 213560, "to": "mm"}, 7852 "name": "IA_PERFCOUNTER3_LO", 7853 "type_ref": "CB_PERFCOUNTER0_LO" 7854 }, 7855 { 7856 "chips": ["gfx7"], 7857 "map": {"at": 213564, "to": "mm"}, 7858 "name": "IA_PERFCOUNTER3_HI", 7859 "type_ref": "CB_PERFCOUNTER0_HI" 7860 }, 7861 { 7862 "chips": ["gfx7"], 7863 "map": {"at": 213568, "to": "mm"}, 7864 "name": "VGT_PERFCOUNTER0_LO", 7865 "type_ref": "CB_PERFCOUNTER0_LO" 7866 }, 7867 { 7868 "chips": ["gfx7"], 7869 "map": {"at": 213572, "to": "mm"}, 7870 "name": "VGT_PERFCOUNTER0_HI", 7871 "type_ref": "CB_PERFCOUNTER0_HI" 7872 }, 7873 { 7874 "chips": ["gfx7"], 7875 "map": {"at": 213576, "to": "mm"}, 7876 "name": "VGT_PERFCOUNTER1_LO", 7877 "type_ref": "CB_PERFCOUNTER0_LO" 7878 }, 7879 { 7880 "chips": ["gfx7"], 7881 "map": {"at": 213580, "to": "mm"}, 7882 "name": "VGT_PERFCOUNTER1_HI", 7883 "type_ref": "CB_PERFCOUNTER0_HI" 7884 }, 7885 { 7886 "chips": ["gfx7"], 7887 "map": {"at": 213584, "to": "mm"}, 7888 "name": "VGT_PERFCOUNTER2_LO", 7889 "type_ref": "CB_PERFCOUNTER0_LO" 7890 }, 7891 { 7892 "chips": ["gfx7"], 7893 "map": {"at": 213588, "to": "mm"}, 7894 "name": "VGT_PERFCOUNTER2_HI", 7895 "type_ref": "CB_PERFCOUNTER0_HI" 7896 }, 7897 { 7898 "chips": ["gfx7"], 7899 "map": {"at": 213592, "to": "mm"}, 7900 "name": "VGT_PERFCOUNTER3_LO", 7901 "type_ref": "CB_PERFCOUNTER0_LO" 7902 }, 7903 { 7904 "chips": ["gfx7"], 7905 "map": {"at": 213596, "to": "mm"}, 7906 "name": "VGT_PERFCOUNTER3_HI", 7907 "type_ref": "CB_PERFCOUNTER0_HI" 7908 }, 7909 { 7910 "chips": ["gfx7"], 7911 "map": {"at": 214016, "to": "mm"}, 7912 "name": "PA_SU_PERFCOUNTER0_LO", 7913 "type_ref": "CB_PERFCOUNTER0_LO" 7914 }, 7915 { 7916 "chips": ["gfx7"], 7917 "map": {"at": 214020, "to": "mm"}, 7918 "name": "PA_SU_PERFCOUNTER0_HI", 7919 "type_ref": "PA_SU_PERFCOUNTER0_HI" 7920 }, 7921 { 7922 "chips": ["gfx7"], 7923 "map": {"at": 214024, "to": "mm"}, 7924 "name": "PA_SU_PERFCOUNTER1_LO", 7925 "type_ref": "CB_PERFCOUNTER0_LO" 7926 }, 7927 { 7928 "chips": ["gfx7"], 7929 "map": {"at": 214028, "to": "mm"}, 7930 "name": "PA_SU_PERFCOUNTER1_HI", 7931 "type_ref": "PA_SU_PERFCOUNTER0_HI" 7932 }, 7933 { 7934 "chips": ["gfx7"], 7935 "map": {"at": 214032, "to": "mm"}, 7936 "name": "PA_SU_PERFCOUNTER2_LO", 7937 "type_ref": "CB_PERFCOUNTER0_LO" 7938 }, 7939 { 7940 "chips": ["gfx7"], 7941 "map": {"at": 214036, "to": "mm"}, 7942 "name": "PA_SU_PERFCOUNTER2_HI", 7943 "type_ref": "PA_SU_PERFCOUNTER0_HI" 7944 }, 7945 { 7946 "chips": ["gfx7"], 7947 "map": {"at": 214040, "to": "mm"}, 7948 "name": "PA_SU_PERFCOUNTER3_LO", 7949 "type_ref": "CB_PERFCOUNTER0_LO" 7950 }, 7951 { 7952 "chips": ["gfx7"], 7953 "map": {"at": 214044, "to": "mm"}, 7954 "name": "PA_SU_PERFCOUNTER3_HI", 7955 "type_ref": "PA_SU_PERFCOUNTER0_HI" 7956 }, 7957 { 7958 "chips": ["gfx7"], 7959 "map": {"at": 214272, "to": "mm"}, 7960 "name": "PA_SC_PERFCOUNTER0_LO", 7961 "type_ref": "CB_PERFCOUNTER0_LO" 7962 }, 7963 { 7964 "chips": ["gfx7"], 7965 "map": {"at": 214276, "to": "mm"}, 7966 "name": "PA_SC_PERFCOUNTER0_HI", 7967 "type_ref": "CB_PERFCOUNTER0_HI" 7968 }, 7969 { 7970 "chips": ["gfx7"], 7971 "map": {"at": 214280, "to": "mm"}, 7972 "name": "PA_SC_PERFCOUNTER1_LO", 7973 "type_ref": "CB_PERFCOUNTER0_LO" 7974 }, 7975 { 7976 "chips": ["gfx7"], 7977 "map": {"at": 214284, "to": "mm"}, 7978 "name": "PA_SC_PERFCOUNTER1_HI", 7979 "type_ref": "CB_PERFCOUNTER0_HI" 7980 }, 7981 { 7982 "chips": ["gfx7"], 7983 "map": {"at": 214288, "to": "mm"}, 7984 "name": "PA_SC_PERFCOUNTER2_LO", 7985 "type_ref": "CB_PERFCOUNTER0_LO" 7986 }, 7987 { 7988 "chips": ["gfx7"], 7989 "map": {"at": 214292, "to": "mm"}, 7990 "name": "PA_SC_PERFCOUNTER2_HI", 7991 "type_ref": "CB_PERFCOUNTER0_HI" 7992 }, 7993 { 7994 "chips": ["gfx7"], 7995 "map": {"at": 214296, "to": "mm"}, 7996 "name": "PA_SC_PERFCOUNTER3_LO", 7997 "type_ref": "CB_PERFCOUNTER0_LO" 7998 }, 7999 { 8000 "chips": ["gfx7"], 8001 "map": {"at": 214300, "to": "mm"}, 8002 "name": "PA_SC_PERFCOUNTER3_HI", 8003 "type_ref": "CB_PERFCOUNTER0_HI" 8004 }, 8005 { 8006 "chips": ["gfx7"], 8007 "map": {"at": 214304, "to": "mm"}, 8008 "name": "PA_SC_PERFCOUNTER4_LO", 8009 "type_ref": "CB_PERFCOUNTER0_LO" 8010 }, 8011 { 8012 "chips": ["gfx7"], 8013 "map": {"at": 214308, "to": "mm"}, 8014 "name": "PA_SC_PERFCOUNTER4_HI", 8015 "type_ref": "CB_PERFCOUNTER0_HI" 8016 }, 8017 { 8018 "chips": ["gfx7"], 8019 "map": {"at": 214312, "to": "mm"}, 8020 "name": "PA_SC_PERFCOUNTER5_LO", 8021 "type_ref": "CB_PERFCOUNTER0_LO" 8022 }, 8023 { 8024 "chips": ["gfx7"], 8025 "map": {"at": 214316, "to": "mm"}, 8026 "name": "PA_SC_PERFCOUNTER5_HI", 8027 "type_ref": "CB_PERFCOUNTER0_HI" 8028 }, 8029 { 8030 "chips": ["gfx7"], 8031 "map": {"at": 214320, "to": "mm"}, 8032 "name": "PA_SC_PERFCOUNTER6_LO", 8033 "type_ref": "CB_PERFCOUNTER0_LO" 8034 }, 8035 { 8036 "chips": ["gfx7"], 8037 "map": {"at": 214324, "to": "mm"}, 8038 "name": "PA_SC_PERFCOUNTER6_HI", 8039 "type_ref": "CB_PERFCOUNTER0_HI" 8040 }, 8041 { 8042 "chips": ["gfx7"], 8043 "map": {"at": 214328, "to": "mm"}, 8044 "name": "PA_SC_PERFCOUNTER7_LO", 8045 "type_ref": "CB_PERFCOUNTER0_LO" 8046 }, 8047 { 8048 "chips": ["gfx7"], 8049 "map": {"at": 214332, "to": "mm"}, 8050 "name": "PA_SC_PERFCOUNTER7_HI", 8051 "type_ref": "CB_PERFCOUNTER0_HI" 8052 }, 8053 { 8054 "chips": ["gfx7"], 8055 "map": {"at": 214528, "to": "mm"}, 8056 "name": "SPI_PERFCOUNTER0_HI", 8057 "type_ref": "CB_PERFCOUNTER0_HI" 8058 }, 8059 { 8060 "chips": ["gfx7"], 8061 "map": {"at": 214532, "to": "mm"}, 8062 "name": "SPI_PERFCOUNTER0_LO", 8063 "type_ref": "CB_PERFCOUNTER0_LO" 8064 }, 8065 { 8066 "chips": ["gfx7"], 8067 "map": {"at": 214536, "to": "mm"}, 8068 "name": "SPI_PERFCOUNTER1_HI", 8069 "type_ref": "CB_PERFCOUNTER0_HI" 8070 }, 8071 { 8072 "chips": ["gfx7"], 8073 "map": {"at": 214540, "to": "mm"}, 8074 "name": "SPI_PERFCOUNTER1_LO", 8075 "type_ref": "CB_PERFCOUNTER0_LO" 8076 }, 8077 { 8078 "chips": ["gfx7"], 8079 "map": {"at": 214544, "to": "mm"}, 8080 "name": "SPI_PERFCOUNTER2_HI", 8081 "type_ref": "CB_PERFCOUNTER0_HI" 8082 }, 8083 { 8084 "chips": ["gfx7"], 8085 "map": {"at": 214548, "to": "mm"}, 8086 "name": "SPI_PERFCOUNTER2_LO", 8087 "type_ref": "CB_PERFCOUNTER0_LO" 8088 }, 8089 { 8090 "chips": ["gfx7"], 8091 "map": {"at": 214552, "to": "mm"}, 8092 "name": "SPI_PERFCOUNTER3_HI", 8093 "type_ref": "CB_PERFCOUNTER0_HI" 8094 }, 8095 { 8096 "chips": ["gfx7"], 8097 "map": {"at": 214556, "to": "mm"}, 8098 "name": "SPI_PERFCOUNTER3_LO", 8099 "type_ref": "CB_PERFCOUNTER0_LO" 8100 }, 8101 { 8102 "chips": ["gfx7"], 8103 "map": {"at": 214560, "to": "mm"}, 8104 "name": "SPI_PERFCOUNTER4_HI", 8105 "type_ref": "CB_PERFCOUNTER0_HI" 8106 }, 8107 { 8108 "chips": ["gfx7"], 8109 "map": {"at": 214564, "to": "mm"}, 8110 "name": "SPI_PERFCOUNTER4_LO", 8111 "type_ref": "CB_PERFCOUNTER0_LO" 8112 }, 8113 { 8114 "chips": ["gfx7"], 8115 "map": {"at": 214568, "to": "mm"}, 8116 "name": "SPI_PERFCOUNTER5_HI", 8117 "type_ref": "CB_PERFCOUNTER0_HI" 8118 }, 8119 { 8120 "chips": ["gfx7"], 8121 "map": {"at": 214572, "to": "mm"}, 8122 "name": "SPI_PERFCOUNTER5_LO", 8123 "type_ref": "CB_PERFCOUNTER0_LO" 8124 }, 8125 { 8126 "chips": ["gfx7"], 8127 "map": {"at": 214784, "to": "mm"}, 8128 "name": "SQ_PERFCOUNTER0_LO", 8129 "type_ref": "CB_PERFCOUNTER0_LO" 8130 }, 8131 { 8132 "chips": ["gfx7"], 8133 "map": {"at": 214788, "to": "mm"}, 8134 "name": "SQ_PERFCOUNTER0_HI", 8135 "type_ref": "CB_PERFCOUNTER0_HI" 8136 }, 8137 { 8138 "chips": ["gfx7"], 8139 "map": {"at": 214792, "to": "mm"}, 8140 "name": "SQ_PERFCOUNTER1_LO", 8141 "type_ref": "CB_PERFCOUNTER0_LO" 8142 }, 8143 { 8144 "chips": ["gfx7"], 8145 "map": {"at": 214796, "to": "mm"}, 8146 "name": "SQ_PERFCOUNTER1_HI", 8147 "type_ref": "CB_PERFCOUNTER0_HI" 8148 }, 8149 { 8150 "chips": ["gfx7"], 8151 "map": {"at": 214800, "to": "mm"}, 8152 "name": "SQ_PERFCOUNTER2_LO", 8153 "type_ref": "CB_PERFCOUNTER0_LO" 8154 }, 8155 { 8156 "chips": ["gfx7"], 8157 "map": {"at": 214804, "to": "mm"}, 8158 "name": "SQ_PERFCOUNTER2_HI", 8159 "type_ref": "CB_PERFCOUNTER0_HI" 8160 }, 8161 { 8162 "chips": ["gfx7"], 8163 "map": {"at": 214808, "to": "mm"}, 8164 "name": "SQ_PERFCOUNTER3_LO", 8165 "type_ref": "CB_PERFCOUNTER0_LO" 8166 }, 8167 { 8168 "chips": ["gfx7"], 8169 "map": {"at": 214812, "to": "mm"}, 8170 "name": "SQ_PERFCOUNTER3_HI", 8171 "type_ref": "CB_PERFCOUNTER0_HI" 8172 }, 8173 { 8174 "chips": ["gfx7"], 8175 "map": {"at": 214816, "to": "mm"}, 8176 "name": "SQ_PERFCOUNTER4_LO", 8177 "type_ref": "CB_PERFCOUNTER0_LO" 8178 }, 8179 { 8180 "chips": ["gfx7"], 8181 "map": {"at": 214820, "to": "mm"}, 8182 "name": "SQ_PERFCOUNTER4_HI", 8183 "type_ref": "CB_PERFCOUNTER0_HI" 8184 }, 8185 { 8186 "chips": ["gfx7"], 8187 "map": {"at": 214824, "to": "mm"}, 8188 "name": "SQ_PERFCOUNTER5_LO", 8189 "type_ref": "CB_PERFCOUNTER0_LO" 8190 }, 8191 { 8192 "chips": ["gfx7"], 8193 "map": {"at": 214828, "to": "mm"}, 8194 "name": "SQ_PERFCOUNTER5_HI", 8195 "type_ref": "CB_PERFCOUNTER0_HI" 8196 }, 8197 { 8198 "chips": ["gfx7"], 8199 "map": {"at": 214832, "to": "mm"}, 8200 "name": "SQ_PERFCOUNTER6_LO", 8201 "type_ref": "CB_PERFCOUNTER0_LO" 8202 }, 8203 { 8204 "chips": ["gfx7"], 8205 "map": {"at": 214836, "to": "mm"}, 8206 "name": "SQ_PERFCOUNTER6_HI", 8207 "type_ref": "CB_PERFCOUNTER0_HI" 8208 }, 8209 { 8210 "chips": ["gfx7"], 8211 "map": {"at": 214840, "to": "mm"}, 8212 "name": "SQ_PERFCOUNTER7_LO", 8213 "type_ref": "CB_PERFCOUNTER0_LO" 8214 }, 8215 { 8216 "chips": ["gfx7"], 8217 "map": {"at": 214844, "to": "mm"}, 8218 "name": "SQ_PERFCOUNTER7_HI", 8219 "type_ref": "CB_PERFCOUNTER0_HI" 8220 }, 8221 { 8222 "chips": ["gfx7"], 8223 "map": {"at": 214848, "to": "mm"}, 8224 "name": "SQ_PERFCOUNTER8_LO", 8225 "type_ref": "CB_PERFCOUNTER0_LO" 8226 }, 8227 { 8228 "chips": ["gfx7"], 8229 "map": {"at": 214852, "to": "mm"}, 8230 "name": "SQ_PERFCOUNTER8_HI", 8231 "type_ref": "CB_PERFCOUNTER0_HI" 8232 }, 8233 { 8234 "chips": ["gfx7"], 8235 "map": {"at": 214856, "to": "mm"}, 8236 "name": "SQ_PERFCOUNTER9_LO", 8237 "type_ref": "CB_PERFCOUNTER0_LO" 8238 }, 8239 { 8240 "chips": ["gfx7"], 8241 "map": {"at": 214860, "to": "mm"}, 8242 "name": "SQ_PERFCOUNTER9_HI", 8243 "type_ref": "CB_PERFCOUNTER0_HI" 8244 }, 8245 { 8246 "chips": ["gfx7"], 8247 "map": {"at": 214864, "to": "mm"}, 8248 "name": "SQ_PERFCOUNTER10_LO", 8249 "type_ref": "CB_PERFCOUNTER0_LO" 8250 }, 8251 { 8252 "chips": ["gfx7"], 8253 "map": {"at": 214868, "to": "mm"}, 8254 "name": "SQ_PERFCOUNTER10_HI", 8255 "type_ref": "CB_PERFCOUNTER0_HI" 8256 }, 8257 { 8258 "chips": ["gfx7"], 8259 "map": {"at": 214872, "to": "mm"}, 8260 "name": "SQ_PERFCOUNTER11_LO", 8261 "type_ref": "CB_PERFCOUNTER0_LO" 8262 }, 8263 { 8264 "chips": ["gfx7"], 8265 "map": {"at": 214876, "to": "mm"}, 8266 "name": "SQ_PERFCOUNTER11_HI", 8267 "type_ref": "CB_PERFCOUNTER0_HI" 8268 }, 8269 { 8270 "chips": ["gfx7"], 8271 "map": {"at": 214880, "to": "mm"}, 8272 "name": "SQ_PERFCOUNTER12_LO", 8273 "type_ref": "CB_PERFCOUNTER0_LO" 8274 }, 8275 { 8276 "chips": ["gfx7"], 8277 "map": {"at": 214884, "to": "mm"}, 8278 "name": "SQ_PERFCOUNTER12_HI", 8279 "type_ref": "CB_PERFCOUNTER0_HI" 8280 }, 8281 { 8282 "chips": ["gfx7"], 8283 "map": {"at": 214888, "to": "mm"}, 8284 "name": "SQ_PERFCOUNTER13_LO", 8285 "type_ref": "CB_PERFCOUNTER0_LO" 8286 }, 8287 { 8288 "chips": ["gfx7"], 8289 "map": {"at": 214892, "to": "mm"}, 8290 "name": "SQ_PERFCOUNTER13_HI", 8291 "type_ref": "CB_PERFCOUNTER0_HI" 8292 }, 8293 { 8294 "chips": ["gfx7"], 8295 "map": {"at": 214896, "to": "mm"}, 8296 "name": "SQ_PERFCOUNTER14_LO", 8297 "type_ref": "CB_PERFCOUNTER0_LO" 8298 }, 8299 { 8300 "chips": ["gfx7"], 8301 "map": {"at": 214900, "to": "mm"}, 8302 "name": "SQ_PERFCOUNTER14_HI", 8303 "type_ref": "CB_PERFCOUNTER0_HI" 8304 }, 8305 { 8306 "chips": ["gfx7"], 8307 "map": {"at": 214904, "to": "mm"}, 8308 "name": "SQ_PERFCOUNTER15_LO", 8309 "type_ref": "CB_PERFCOUNTER0_LO" 8310 }, 8311 { 8312 "chips": ["gfx7"], 8313 "map": {"at": 214908, "to": "mm"}, 8314 "name": "SQ_PERFCOUNTER15_HI", 8315 "type_ref": "CB_PERFCOUNTER0_HI" 8316 }, 8317 { 8318 "chips": ["gfx7"], 8319 "map": {"at": 215296, "to": "mm"}, 8320 "name": "SX_PERFCOUNTER0_LO", 8321 "type_ref": "CB_PERFCOUNTER0_LO" 8322 }, 8323 { 8324 "chips": ["gfx7"], 8325 "map": {"at": 215300, "to": "mm"}, 8326 "name": "SX_PERFCOUNTER0_HI", 8327 "type_ref": "CB_PERFCOUNTER0_HI" 8328 }, 8329 { 8330 "chips": ["gfx7"], 8331 "map": {"at": 215304, "to": "mm"}, 8332 "name": "SX_PERFCOUNTER1_LO", 8333 "type_ref": "CB_PERFCOUNTER0_LO" 8334 }, 8335 { 8336 "chips": ["gfx7"], 8337 "map": {"at": 215308, "to": "mm"}, 8338 "name": "SX_PERFCOUNTER1_HI", 8339 "type_ref": "CB_PERFCOUNTER0_HI" 8340 }, 8341 { 8342 "chips": ["gfx7"], 8343 "map": {"at": 215312, "to": "mm"}, 8344 "name": "SX_PERFCOUNTER2_LO", 8345 "type_ref": "CB_PERFCOUNTER0_LO" 8346 }, 8347 { 8348 "chips": ["gfx7"], 8349 "map": {"at": 215316, "to": "mm"}, 8350 "name": "SX_PERFCOUNTER2_HI", 8351 "type_ref": "CB_PERFCOUNTER0_HI" 8352 }, 8353 { 8354 "chips": ["gfx7"], 8355 "map": {"at": 215320, "to": "mm"}, 8356 "name": "SX_PERFCOUNTER3_LO", 8357 "type_ref": "CB_PERFCOUNTER0_LO" 8358 }, 8359 { 8360 "chips": ["gfx7"], 8361 "map": {"at": 215324, "to": "mm"}, 8362 "name": "SX_PERFCOUNTER3_HI", 8363 "type_ref": "CB_PERFCOUNTER0_HI" 8364 }, 8365 { 8366 "chips": ["gfx7"], 8367 "map": {"at": 215552, "to": "mm"}, 8368 "name": "GDS_PERFCOUNTER0_LO", 8369 "type_ref": "CB_PERFCOUNTER0_LO" 8370 }, 8371 { 8372 "chips": ["gfx7"], 8373 "map": {"at": 215556, "to": "mm"}, 8374 "name": "GDS_PERFCOUNTER0_HI", 8375 "type_ref": "CB_PERFCOUNTER0_HI" 8376 }, 8377 { 8378 "chips": ["gfx7"], 8379 "map": {"at": 215560, "to": "mm"}, 8380 "name": "GDS_PERFCOUNTER1_LO", 8381 "type_ref": "CB_PERFCOUNTER0_LO" 8382 }, 8383 { 8384 "chips": ["gfx7"], 8385 "map": {"at": 215564, "to": "mm"}, 8386 "name": "GDS_PERFCOUNTER1_HI", 8387 "type_ref": "CB_PERFCOUNTER0_HI" 8388 }, 8389 { 8390 "chips": ["gfx7"], 8391 "map": {"at": 215568, "to": "mm"}, 8392 "name": "GDS_PERFCOUNTER2_LO", 8393 "type_ref": "CB_PERFCOUNTER0_LO" 8394 }, 8395 { 8396 "chips": ["gfx7"], 8397 "map": {"at": 215572, "to": "mm"}, 8398 "name": "GDS_PERFCOUNTER2_HI", 8399 "type_ref": "CB_PERFCOUNTER0_HI" 8400 }, 8401 { 8402 "chips": ["gfx7"], 8403 "map": {"at": 215576, "to": "mm"}, 8404 "name": "GDS_PERFCOUNTER3_LO", 8405 "type_ref": "CB_PERFCOUNTER0_LO" 8406 }, 8407 { 8408 "chips": ["gfx7"], 8409 "map": {"at": 215580, "to": "mm"}, 8410 "name": "GDS_PERFCOUNTER3_HI", 8411 "type_ref": "CB_PERFCOUNTER0_HI" 8412 }, 8413 { 8414 "chips": ["gfx7"], 8415 "map": {"at": 215808, "to": "mm"}, 8416 "name": "TA_PERFCOUNTER0_LO", 8417 "type_ref": "CB_PERFCOUNTER0_LO" 8418 }, 8419 { 8420 "chips": ["gfx7"], 8421 "map": {"at": 215812, "to": "mm"}, 8422 "name": "TA_PERFCOUNTER0_HI", 8423 "type_ref": "CB_PERFCOUNTER0_HI" 8424 }, 8425 { 8426 "chips": ["gfx7"], 8427 "map": {"at": 215816, "to": "mm"}, 8428 "name": "TA_PERFCOUNTER1_LO", 8429 "type_ref": "CB_PERFCOUNTER0_LO" 8430 }, 8431 { 8432 "chips": ["gfx7"], 8433 "map": {"at": 215820, "to": "mm"}, 8434 "name": "TA_PERFCOUNTER1_HI", 8435 "type_ref": "CB_PERFCOUNTER0_HI" 8436 }, 8437 { 8438 "chips": ["gfx7"], 8439 "map": {"at": 216064, "to": "mm"}, 8440 "name": "TD_PERFCOUNTER0_LO", 8441 "type_ref": "CB_PERFCOUNTER0_LO" 8442 }, 8443 { 8444 "chips": ["gfx7"], 8445 "map": {"at": 216068, "to": "mm"}, 8446 "name": "TD_PERFCOUNTER0_HI", 8447 "type_ref": "CB_PERFCOUNTER0_HI" 8448 }, 8449 { 8450 "chips": ["gfx7"], 8451 "map": {"at": 216072, "to": "mm"}, 8452 "name": "TD_PERFCOUNTER1_LO", 8453 "type_ref": "CB_PERFCOUNTER0_LO" 8454 }, 8455 { 8456 "chips": ["gfx7"], 8457 "map": {"at": 216076, "to": "mm"}, 8458 "name": "TD_PERFCOUNTER1_HI", 8459 "type_ref": "CB_PERFCOUNTER0_HI" 8460 }, 8461 { 8462 "chips": ["gfx7"], 8463 "map": {"at": 216320, "to": "mm"}, 8464 "name": "TCP_PERFCOUNTER0_LO", 8465 "type_ref": "CB_PERFCOUNTER0_LO" 8466 }, 8467 { 8468 "chips": ["gfx7"], 8469 "map": {"at": 216324, "to": "mm"}, 8470 "name": "TCP_PERFCOUNTER0_HI", 8471 "type_ref": "CB_PERFCOUNTER0_HI" 8472 }, 8473 { 8474 "chips": ["gfx7"], 8475 "map": {"at": 216328, "to": "mm"}, 8476 "name": "TCP_PERFCOUNTER1_LO", 8477 "type_ref": "CB_PERFCOUNTER0_LO" 8478 }, 8479 { 8480 "chips": ["gfx7"], 8481 "map": {"at": 216332, "to": "mm"}, 8482 "name": "TCP_PERFCOUNTER1_HI", 8483 "type_ref": "CB_PERFCOUNTER0_HI" 8484 }, 8485 { 8486 "chips": ["gfx7"], 8487 "map": {"at": 216336, "to": "mm"}, 8488 "name": "TCP_PERFCOUNTER2_LO", 8489 "type_ref": "CB_PERFCOUNTER0_LO" 8490 }, 8491 { 8492 "chips": ["gfx7"], 8493 "map": {"at": 216340, "to": "mm"}, 8494 "name": "TCP_PERFCOUNTER2_HI", 8495 "type_ref": "CB_PERFCOUNTER0_HI" 8496 }, 8497 { 8498 "chips": ["gfx7"], 8499 "map": {"at": 216344, "to": "mm"}, 8500 "name": "TCP_PERFCOUNTER3_LO", 8501 "type_ref": "CB_PERFCOUNTER0_LO" 8502 }, 8503 { 8504 "chips": ["gfx7"], 8505 "map": {"at": 216348, "to": "mm"}, 8506 "name": "TCP_PERFCOUNTER3_HI", 8507 "type_ref": "CB_PERFCOUNTER0_HI" 8508 }, 8509 { 8510 "chips": ["gfx7"], 8511 "map": {"at": 216576, "to": "mm"}, 8512 "name": "TCC_PERFCOUNTER0_LO", 8513 "type_ref": "CB_PERFCOUNTER0_LO" 8514 }, 8515 { 8516 "chips": ["gfx7"], 8517 "map": {"at": 216580, "to": "mm"}, 8518 "name": "TCC_PERFCOUNTER0_HI", 8519 "type_ref": "CB_PERFCOUNTER0_HI" 8520 }, 8521 { 8522 "chips": ["gfx7"], 8523 "map": {"at": 216584, "to": "mm"}, 8524 "name": "TCC_PERFCOUNTER1_LO", 8525 "type_ref": "CB_PERFCOUNTER0_LO" 8526 }, 8527 { 8528 "chips": ["gfx7"], 8529 "map": {"at": 216588, "to": "mm"}, 8530 "name": "TCC_PERFCOUNTER1_HI", 8531 "type_ref": "CB_PERFCOUNTER0_HI" 8532 }, 8533 { 8534 "chips": ["gfx7"], 8535 "map": {"at": 216592, "to": "mm"}, 8536 "name": "TCC_PERFCOUNTER2_LO", 8537 "type_ref": "CB_PERFCOUNTER0_LO" 8538 }, 8539 { 8540 "chips": ["gfx7"], 8541 "map": {"at": 216596, "to": "mm"}, 8542 "name": "TCC_PERFCOUNTER2_HI", 8543 "type_ref": "CB_PERFCOUNTER0_HI" 8544 }, 8545 { 8546 "chips": ["gfx7"], 8547 "map": {"at": 216600, "to": "mm"}, 8548 "name": "TCC_PERFCOUNTER3_LO", 8549 "type_ref": "CB_PERFCOUNTER0_LO" 8550 }, 8551 { 8552 "chips": ["gfx7"], 8553 "map": {"at": 216604, "to": "mm"}, 8554 "name": "TCC_PERFCOUNTER3_HI", 8555 "type_ref": "CB_PERFCOUNTER0_HI" 8556 }, 8557 { 8558 "chips": ["gfx7"], 8559 "map": {"at": 216640, "to": "mm"}, 8560 "name": "TCA_PERFCOUNTER0_LO", 8561 "type_ref": "CB_PERFCOUNTER0_LO" 8562 }, 8563 { 8564 "chips": ["gfx7"], 8565 "map": {"at": 216644, "to": "mm"}, 8566 "name": "TCA_PERFCOUNTER0_HI", 8567 "type_ref": "CB_PERFCOUNTER0_HI" 8568 }, 8569 { 8570 "chips": ["gfx7"], 8571 "map": {"at": 216648, "to": "mm"}, 8572 "name": "TCA_PERFCOUNTER1_LO", 8573 "type_ref": "CB_PERFCOUNTER0_LO" 8574 }, 8575 { 8576 "chips": ["gfx7"], 8577 "map": {"at": 216652, "to": "mm"}, 8578 "name": "TCA_PERFCOUNTER1_HI", 8579 "type_ref": "CB_PERFCOUNTER0_HI" 8580 }, 8581 { 8582 "chips": ["gfx7"], 8583 "map": {"at": 216656, "to": "mm"}, 8584 "name": "TCA_PERFCOUNTER2_LO", 8585 "type_ref": "CB_PERFCOUNTER0_LO" 8586 }, 8587 { 8588 "chips": ["gfx7"], 8589 "map": {"at": 216660, "to": "mm"}, 8590 "name": "TCA_PERFCOUNTER2_HI", 8591 "type_ref": "CB_PERFCOUNTER0_HI" 8592 }, 8593 { 8594 "chips": ["gfx7"], 8595 "map": {"at": 216664, "to": "mm"}, 8596 "name": "TCA_PERFCOUNTER3_LO", 8597 "type_ref": "CB_PERFCOUNTER0_LO" 8598 }, 8599 { 8600 "chips": ["gfx7"], 8601 "map": {"at": 216668, "to": "mm"}, 8602 "name": "TCA_PERFCOUNTER3_HI", 8603 "type_ref": "CB_PERFCOUNTER0_HI" 8604 }, 8605 { 8606 "chips": ["gfx7"], 8607 "map": {"at": 216704, "to": "mm"}, 8608 "name": "TCS_PERFCOUNTER0_LO", 8609 "type_ref": "CB_PERFCOUNTER0_LO" 8610 }, 8611 { 8612 "chips": ["gfx7"], 8613 "map": {"at": 216708, "to": "mm"}, 8614 "name": "TCS_PERFCOUNTER0_HI", 8615 "type_ref": "CB_PERFCOUNTER0_HI" 8616 }, 8617 { 8618 "chips": ["gfx7"], 8619 "map": {"at": 216712, "to": "mm"}, 8620 "name": "TCS_PERFCOUNTER1_LO", 8621 "type_ref": "CB_PERFCOUNTER0_LO" 8622 }, 8623 { 8624 "chips": ["gfx7"], 8625 "map": {"at": 216716, "to": "mm"}, 8626 "name": "TCS_PERFCOUNTER1_HI", 8627 "type_ref": "CB_PERFCOUNTER0_HI" 8628 }, 8629 { 8630 "chips": ["gfx7"], 8631 "map": {"at": 216720, "to": "mm"}, 8632 "name": "TCS_PERFCOUNTER2_LO", 8633 "type_ref": "CB_PERFCOUNTER0_LO" 8634 }, 8635 { 8636 "chips": ["gfx7"], 8637 "map": {"at": 216724, "to": "mm"}, 8638 "name": "TCS_PERFCOUNTER2_HI", 8639 "type_ref": "CB_PERFCOUNTER0_HI" 8640 }, 8641 { 8642 "chips": ["gfx7"], 8643 "map": {"at": 216728, "to": "mm"}, 8644 "name": "TCS_PERFCOUNTER3_LO", 8645 "type_ref": "CB_PERFCOUNTER0_LO" 8646 }, 8647 { 8648 "chips": ["gfx7"], 8649 "map": {"at": 216732, "to": "mm"}, 8650 "name": "TCS_PERFCOUNTER3_HI", 8651 "type_ref": "CB_PERFCOUNTER0_HI" 8652 }, 8653 { 8654 "chips": ["gfx7"], 8655 "map": {"at": 217112, "to": "mm"}, 8656 "name": "CB_PERFCOUNTER0_LO", 8657 "type_ref": "CB_PERFCOUNTER0_LO" 8658 }, 8659 { 8660 "chips": ["gfx7"], 8661 "map": {"at": 217116, "to": "mm"}, 8662 "name": "CB_PERFCOUNTER0_HI", 8663 "type_ref": "CB_PERFCOUNTER0_HI" 8664 }, 8665 { 8666 "chips": ["gfx7"], 8667 "map": {"at": 217120, "to": "mm"}, 8668 "name": "CB_PERFCOUNTER1_LO", 8669 "type_ref": "CB_PERFCOUNTER0_LO" 8670 }, 8671 { 8672 "chips": ["gfx7"], 8673 "map": {"at": 217124, "to": "mm"}, 8674 "name": "CB_PERFCOUNTER1_HI", 8675 "type_ref": "CB_PERFCOUNTER0_HI" 8676 }, 8677 { 8678 "chips": ["gfx7"], 8679 "map": {"at": 217128, "to": "mm"}, 8680 "name": "CB_PERFCOUNTER2_LO", 8681 "type_ref": "CB_PERFCOUNTER0_LO" 8682 }, 8683 { 8684 "chips": ["gfx7"], 8685 "map": {"at": 217132, "to": "mm"}, 8686 "name": "CB_PERFCOUNTER2_HI", 8687 "type_ref": "CB_PERFCOUNTER0_HI" 8688 }, 8689 { 8690 "chips": ["gfx7"], 8691 "map": {"at": 217136, "to": "mm"}, 8692 "name": "CB_PERFCOUNTER3_LO", 8693 "type_ref": "CB_PERFCOUNTER0_LO" 8694 }, 8695 { 8696 "chips": ["gfx7"], 8697 "map": {"at": 217140, "to": "mm"}, 8698 "name": "CB_PERFCOUNTER3_HI", 8699 "type_ref": "CB_PERFCOUNTER0_HI" 8700 }, 8701 { 8702 "chips": ["gfx7"], 8703 "map": {"at": 217344, "to": "mm"}, 8704 "name": "DB_PERFCOUNTER0_LO", 8705 "type_ref": "CB_PERFCOUNTER0_LO" 8706 }, 8707 { 8708 "chips": ["gfx7"], 8709 "map": {"at": 217348, "to": "mm"}, 8710 "name": "DB_PERFCOUNTER0_HI", 8711 "type_ref": "CB_PERFCOUNTER0_HI" 8712 }, 8713 { 8714 "chips": ["gfx7"], 8715 "map": {"at": 217352, "to": "mm"}, 8716 "name": "DB_PERFCOUNTER1_LO", 8717 "type_ref": "CB_PERFCOUNTER0_LO" 8718 }, 8719 { 8720 "chips": ["gfx7"], 8721 "map": {"at": 217356, "to": "mm"}, 8722 "name": "DB_PERFCOUNTER1_HI", 8723 "type_ref": "CB_PERFCOUNTER0_HI" 8724 }, 8725 { 8726 "chips": ["gfx7"], 8727 "map": {"at": 217360, "to": "mm"}, 8728 "name": "DB_PERFCOUNTER2_LO", 8729 "type_ref": "CB_PERFCOUNTER0_LO" 8730 }, 8731 { 8732 "chips": ["gfx7"], 8733 "map": {"at": 217364, "to": "mm"}, 8734 "name": "DB_PERFCOUNTER2_HI", 8735 "type_ref": "CB_PERFCOUNTER0_HI" 8736 }, 8737 { 8738 "chips": ["gfx7"], 8739 "map": {"at": 217368, "to": "mm"}, 8740 "name": "DB_PERFCOUNTER3_LO", 8741 "type_ref": "CB_PERFCOUNTER0_LO" 8742 }, 8743 { 8744 "chips": ["gfx7"], 8745 "map": {"at": 217372, "to": "mm"}, 8746 "name": "DB_PERFCOUNTER3_HI", 8747 "type_ref": "CB_PERFCOUNTER0_HI" 8748 }, 8749 { 8750 "chips": ["gfx7"], 8751 "map": {"at": 217600, "to": "mm"}, 8752 "name": "RLC_PERFCOUNTER0_LO", 8753 "type_ref": "CB_PERFCOUNTER0_LO" 8754 }, 8755 { 8756 "chips": ["gfx7"], 8757 "map": {"at": 217604, "to": "mm"}, 8758 "name": "RLC_PERFCOUNTER0_HI", 8759 "type_ref": "CB_PERFCOUNTER0_HI" 8760 }, 8761 { 8762 "chips": ["gfx7"], 8763 "map": {"at": 217608, "to": "mm"}, 8764 "name": "RLC_PERFCOUNTER1_LO", 8765 "type_ref": "CB_PERFCOUNTER0_LO" 8766 }, 8767 { 8768 "chips": ["gfx7"], 8769 "map": {"at": 217612, "to": "mm"}, 8770 "name": "RLC_PERFCOUNTER1_HI", 8771 "type_ref": "CB_PERFCOUNTER0_HI" 8772 }, 8773 { 8774 "chips": ["gfx7"], 8775 "map": {"at": 221184, "to": "mm"}, 8776 "name": "CPG_PERFCOUNTER1_SELECT", 8777 "type_ref": "CPG_PERFCOUNTER1_SELECT" 8778 }, 8779 { 8780 "chips": ["gfx7"], 8781 "map": {"at": 221188, "to": "mm"}, 8782 "name": "CPG_PERFCOUNTER0_SELECT1", 8783 "type_ref": "CPG_PERFCOUNTER0_SELECT1" 8784 }, 8785 { 8786 "chips": ["gfx7"], 8787 "map": {"at": 221192, "to": "mm"}, 8788 "name": "CPG_PERFCOUNTER0_SELECT", 8789 "type_ref": "CPG_PERFCOUNTER0_SELECT" 8790 }, 8791 { 8792 "chips": ["gfx7"], 8793 "map": {"at": 221196, "to": "mm"}, 8794 "name": "CPC_PERFCOUNTER1_SELECT", 8795 "type_ref": "CPG_PERFCOUNTER1_SELECT" 8796 }, 8797 { 8798 "chips": ["gfx7"], 8799 "map": {"at": 221200, "to": "mm"}, 8800 "name": "CPC_PERFCOUNTER0_SELECT1", 8801 "type_ref": "CPG_PERFCOUNTER0_SELECT1" 8802 }, 8803 { 8804 "chips": ["gfx7"], 8805 "map": {"at": 221204, "to": "mm"}, 8806 "name": "CPF_PERFCOUNTER1_SELECT", 8807 "type_ref": "CPG_PERFCOUNTER1_SELECT" 8808 }, 8809 { 8810 "chips": ["gfx7"], 8811 "map": {"at": 221208, "to": "mm"}, 8812 "name": "CPF_PERFCOUNTER0_SELECT1", 8813 "type_ref": "CPG_PERFCOUNTER0_SELECT1" 8814 }, 8815 { 8816 "chips": ["gfx7"], 8817 "map": {"at": 221212, "to": "mm"}, 8818 "name": "CPF_PERFCOUNTER0_SELECT", 8819 "type_ref": "CPG_PERFCOUNTER0_SELECT" 8820 }, 8821 { 8822 "chips": ["gfx7"], 8823 "map": {"at": 221216, "to": "mm"}, 8824 "name": "CP_PERFMON_CNTL", 8825 "type_ref": "CP_PERFMON_CNTL" 8826 }, 8827 { 8828 "chips": ["gfx7"], 8829 "map": {"at": 221220, "to": "mm"}, 8830 "name": "CPC_PERFCOUNTER0_SELECT", 8831 "type_ref": "CPG_PERFCOUNTER0_SELECT" 8832 }, 8833 { 8834 "chips": ["gfx7"], 8835 "map": {"at": 221248, "to": "mm"}, 8836 "name": "CP_DRAW_OBJECT", 8837 "type_ref": "CP_DRAW_OBJECT" 8838 }, 8839 { 8840 "chips": ["gfx7"], 8841 "map": {"at": 221252, "to": "mm"}, 8842 "name": "CP_DRAW_OBJECT_COUNTER", 8843 "type_ref": "CP_DRAW_OBJECT_COUNTER" 8844 }, 8845 { 8846 "chips": ["gfx7"], 8847 "map": {"at": 221256, "to": "mm"}, 8848 "name": "CP_DRAW_WINDOW_MASK_HI", 8849 "type_ref": "CP_DRAW_WINDOW_MASK_HI" 8850 }, 8851 { 8852 "chips": ["gfx7"], 8853 "map": {"at": 221260, "to": "mm"}, 8854 "name": "CP_DRAW_WINDOW_HI", 8855 "type_ref": "CP_DRAW_WINDOW_HI" 8856 }, 8857 { 8858 "chips": ["gfx7"], 8859 "map": {"at": 221264, "to": "mm"}, 8860 "name": "CP_DRAW_WINDOW_LO", 8861 "type_ref": "CP_DRAW_WINDOW_LO" 8862 }, 8863 { 8864 "chips": ["gfx7"], 8865 "map": {"at": 221268, "to": "mm"}, 8866 "name": "CP_DRAW_WINDOW_CNTL", 8867 "type_ref": "CP_DRAW_WINDOW_CNTL" 8868 }, 8869 { 8870 "chips": ["gfx7"], 8871 "map": {"at": 221440, "to": "mm"}, 8872 "name": "GRBM_PERFCOUNTER0_SELECT", 8873 "type_ref": "GRBM_PERFCOUNTER0_SELECT" 8874 }, 8875 { 8876 "chips": ["gfx7"], 8877 "map": {"at": 221444, "to": "mm"}, 8878 "name": "GRBM_PERFCOUNTER1_SELECT", 8879 "type_ref": "GRBM_PERFCOUNTER0_SELECT" 8880 }, 8881 { 8882 "chips": ["gfx7"], 8883 "map": {"at": 221448, "to": "mm"}, 8884 "name": "GRBM_SE0_PERFCOUNTER_SELECT", 8885 "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT" 8886 }, 8887 { 8888 "chips": ["gfx7"], 8889 "map": {"at": 221452, "to": "mm"}, 8890 "name": "GRBM_SE1_PERFCOUNTER_SELECT", 8891 "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT" 8892 }, 8893 { 8894 "chips": ["gfx7"], 8895 "map": {"at": 221456, "to": "mm"}, 8896 "name": "GRBM_SE2_PERFCOUNTER_SELECT", 8897 "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT" 8898 }, 8899 { 8900 "chips": ["gfx7"], 8901 "map": {"at": 221460, "to": "mm"}, 8902 "name": "GRBM_SE3_PERFCOUNTER_SELECT", 8903 "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT" 8904 }, 8905 { 8906 "chips": ["gfx7"], 8907 "map": {"at": 221696, "to": "mm"}, 8908 "name": "WD_PERFCOUNTER0_SELECT", 8909 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8910 }, 8911 { 8912 "chips": ["gfx7"], 8913 "map": {"at": 221700, "to": "mm"}, 8914 "name": "WD_PERFCOUNTER1_SELECT", 8915 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8916 }, 8917 { 8918 "chips": ["gfx7"], 8919 "map": {"at": 221704, "to": "mm"}, 8920 "name": "WD_PERFCOUNTER2_SELECT", 8921 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8922 }, 8923 { 8924 "chips": ["gfx7"], 8925 "map": {"at": 221708, "to": "mm"}, 8926 "name": "WD_PERFCOUNTER3_SELECT", 8927 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8928 }, 8929 { 8930 "chips": ["gfx7"], 8931 "map": {"at": 221712, "to": "mm"}, 8932 "name": "IA_PERFCOUNTER0_SELECT", 8933 "type_ref": "DB_PERFCOUNTER0_SELECT" 8934 }, 8935 { 8936 "chips": ["gfx7"], 8937 "map": {"at": 221716, "to": "mm"}, 8938 "name": "IA_PERFCOUNTER1_SELECT", 8939 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8940 }, 8941 { 8942 "chips": ["gfx7"], 8943 "map": {"at": 221720, "to": "mm"}, 8944 "name": "IA_PERFCOUNTER2_SELECT", 8945 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8946 }, 8947 { 8948 "chips": ["gfx7"], 8949 "map": {"at": 221724, "to": "mm"}, 8950 "name": "IA_PERFCOUNTER3_SELECT", 8951 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8952 }, 8953 { 8954 "chips": ["gfx7"], 8955 "map": {"at": 221728, "to": "mm"}, 8956 "name": "IA_PERFCOUNTER0_SELECT1", 8957 "type_ref": "DB_PERFCOUNTER0_SELECT1" 8958 }, 8959 { 8960 "chips": ["gfx7"], 8961 "map": {"at": 221744, "to": "mm"}, 8962 "name": "VGT_PERFCOUNTER0_SELECT", 8963 "type_ref": "DB_PERFCOUNTER0_SELECT" 8964 }, 8965 { 8966 "chips": ["gfx7"], 8967 "map": {"at": 221748, "to": "mm"}, 8968 "name": "VGT_PERFCOUNTER1_SELECT", 8969 "type_ref": "DB_PERFCOUNTER0_SELECT" 8970 }, 8971 { 8972 "chips": ["gfx7"], 8973 "map": {"at": 221752, "to": "mm"}, 8974 "name": "VGT_PERFCOUNTER2_SELECT", 8975 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8976 }, 8977 { 8978 "chips": ["gfx7"], 8979 "map": {"at": 221756, "to": "mm"}, 8980 "name": "VGT_PERFCOUNTER3_SELECT", 8981 "type_ref": "VGT_PERFCOUNTER2_SELECT" 8982 }, 8983 { 8984 "chips": ["gfx7"], 8985 "map": {"at": 221760, "to": "mm"}, 8986 "name": "VGT_PERFCOUNTER0_SELECT1", 8987 "type_ref": "DB_PERFCOUNTER0_SELECT1" 8988 }, 8989 { 8990 "chips": ["gfx7"], 8991 "map": {"at": 221764, "to": "mm"}, 8992 "name": "VGT_PERFCOUNTER1_SELECT1", 8993 "type_ref": "DB_PERFCOUNTER0_SELECT1" 8994 }, 8995 { 8996 "chips": ["gfx7"], 8997 "map": {"at": 221776, "to": "mm"}, 8998 "name": "VGT_PERFCOUNTER_SEID_MASK", 8999 "type_ref": "VGT_PERFCOUNTER_SEID_MASK" 9000 }, 9001 { 9002 "chips": ["gfx7"], 9003 "map": {"at": 222208, "to": "mm"}, 9004 "name": "PA_SU_PERFCOUNTER0_SELECT", 9005 "type_ref": "PA_SU_PERFCOUNTER0_SELECT" 9006 }, 9007 { 9008 "chips": ["gfx7"], 9009 "map": {"at": 222212, "to": "mm"}, 9010 "name": "PA_SU_PERFCOUNTER0_SELECT1", 9011 "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" 9012 }, 9013 { 9014 "chips": ["gfx7"], 9015 "map": {"at": 222216, "to": "mm"}, 9016 "name": "PA_SU_PERFCOUNTER1_SELECT", 9017 "type_ref": "PA_SU_PERFCOUNTER0_SELECT" 9018 }, 9019 { 9020 "chips": ["gfx7"], 9021 "map": {"at": 222220, "to": "mm"}, 9022 "name": "PA_SU_PERFCOUNTER1_SELECT1", 9023 "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" 9024 }, 9025 { 9026 "chips": ["gfx7"], 9027 "map": {"at": 222224, "to": "mm"}, 9028 "name": "PA_SU_PERFCOUNTER2_SELECT", 9029 "type_ref": "PA_SU_PERFCOUNTER2_SELECT" 9030 }, 9031 { 9032 "chips": ["gfx7"], 9033 "map": {"at": 222228, "to": "mm"}, 9034 "name": "PA_SU_PERFCOUNTER3_SELECT", 9035 "type_ref": "PA_SU_PERFCOUNTER2_SELECT" 9036 }, 9037 { 9038 "chips": ["gfx7"], 9039 "map": {"at": 222464, "to": "mm"}, 9040 "name": "PA_SC_PERFCOUNTER0_SELECT", 9041 "type_ref": "PA_SU_PERFCOUNTER0_SELECT" 9042 }, 9043 { 9044 "chips": ["gfx7"], 9045 "map": {"at": 222468, "to": "mm"}, 9046 "name": "PA_SC_PERFCOUNTER0_SELECT1", 9047 "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" 9048 }, 9049 { 9050 "chips": ["gfx7"], 9051 "map": {"at": 222472, "to": "mm"}, 9052 "name": "PA_SC_PERFCOUNTER1_SELECT", 9053 "type_ref": "PA_SC_PERFCOUNTER1_SELECT" 9054 }, 9055 { 9056 "chips": ["gfx7"], 9057 "map": {"at": 222476, "to": "mm"}, 9058 "name": "PA_SC_PERFCOUNTER2_SELECT", 9059 "type_ref": "PA_SC_PERFCOUNTER1_SELECT" 9060 }, 9061 { 9062 "chips": ["gfx7"], 9063 "map": {"at": 222480, "to": "mm"}, 9064 "name": "PA_SC_PERFCOUNTER3_SELECT", 9065 "type_ref": "PA_SC_PERFCOUNTER1_SELECT" 9066 }, 9067 { 9068 "chips": ["gfx7"], 9069 "map": {"at": 222484, "to": "mm"}, 9070 "name": "PA_SC_PERFCOUNTER4_SELECT", 9071 "type_ref": "PA_SC_PERFCOUNTER1_SELECT" 9072 }, 9073 { 9074 "chips": ["gfx7"], 9075 "map": {"at": 222488, "to": "mm"}, 9076 "name": "PA_SC_PERFCOUNTER5_SELECT", 9077 "type_ref": "PA_SC_PERFCOUNTER1_SELECT" 9078 }, 9079 { 9080 "chips": ["gfx7"], 9081 "map": {"at": 222492, "to": "mm"}, 9082 "name": "PA_SC_PERFCOUNTER6_SELECT", 9083 "type_ref": "PA_SC_PERFCOUNTER1_SELECT" 9084 }, 9085 { 9086 "chips": ["gfx7"], 9087 "map": {"at": 222496, "to": "mm"}, 9088 "name": "PA_SC_PERFCOUNTER7_SELECT", 9089 "type_ref": "PA_SC_PERFCOUNTER1_SELECT" 9090 }, 9091 { 9092 "chips": ["gfx7"], 9093 "map": {"at": 222720, "to": "mm"}, 9094 "name": "SPI_PERFCOUNTER0_SELECT", 9095 "type_ref": "PA_SU_PERFCOUNTER0_SELECT" 9096 }, 9097 { 9098 "chips": ["gfx7"], 9099 "map": {"at": 222724, "to": "mm"}, 9100 "name": "SPI_PERFCOUNTER1_SELECT", 9101 "type_ref": "PA_SU_PERFCOUNTER0_SELECT" 9102 }, 9103 { 9104 "chips": ["gfx7"], 9105 "map": {"at": 222728, "to": "mm"}, 9106 "name": "SPI_PERFCOUNTER2_SELECT", 9107 "type_ref": "PA_SU_PERFCOUNTER0_SELECT" 9108 }, 9109 { 9110 "chips": ["gfx7"], 9111 "map": {"at": 222732, "to": "mm"}, 9112 "name": "SPI_PERFCOUNTER3_SELECT", 9113 "type_ref": "PA_SU_PERFCOUNTER0_SELECT" 9114 }, 9115 { 9116 "chips": ["gfx7"], 9117 "map": {"at": 222736, "to": "mm"}, 9118 "name": "SPI_PERFCOUNTER0_SELECT1", 9119 "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" 9120 }, 9121 { 9122 "chips": ["gfx7"], 9123 "map": {"at": 222740, "to": "mm"}, 9124 "name": "SPI_PERFCOUNTER1_SELECT1", 9125 "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" 9126 }, 9127 { 9128 "chips": ["gfx7"], 9129 "map": {"at": 222744, "to": "mm"}, 9130 "name": "SPI_PERFCOUNTER2_SELECT1", 9131 "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" 9132 }, 9133 { 9134 "chips": ["gfx7"], 9135 "map": {"at": 222748, "to": "mm"}, 9136 "name": "SPI_PERFCOUNTER3_SELECT1", 9137 "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" 9138 }, 9139 { 9140 "chips": ["gfx7"], 9141 "map": {"at": 222752, "to": "mm"}, 9142 "name": "SPI_PERFCOUNTER4_SELECT", 9143 "type_ref": "SPI_PERFCOUNTER4_SELECT" 9144 }, 9145 { 9146 "chips": ["gfx7"], 9147 "map": {"at": 222756, "to": "mm"}, 9148 "name": "SPI_PERFCOUNTER5_SELECT", 9149 "type_ref": "SPI_PERFCOUNTER4_SELECT" 9150 }, 9151 { 9152 "chips": ["gfx7"], 9153 "map": {"at": 222760, "to": "mm"}, 9154 "name": "SPI_PERFCOUNTER_BINS", 9155 "type_ref": "SPI_PERFCOUNTER_BINS" 9156 }, 9157 { 9158 "chips": ["gfx7"], 9159 "map": {"at": 222976, "to": "mm"}, 9160 "name": "SQ_PERFCOUNTER0_SELECT", 9161 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9162 }, 9163 { 9164 "chips": ["gfx7"], 9165 "map": {"at": 222980, "to": "mm"}, 9166 "name": "SQ_PERFCOUNTER1_SELECT", 9167 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9168 }, 9169 { 9170 "chips": ["gfx7"], 9171 "map": {"at": 222984, "to": "mm"}, 9172 "name": "SQ_PERFCOUNTER2_SELECT", 9173 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9174 }, 9175 { 9176 "chips": ["gfx7"], 9177 "map": {"at": 222988, "to": "mm"}, 9178 "name": "SQ_PERFCOUNTER3_SELECT", 9179 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9180 }, 9181 { 9182 "chips": ["gfx7"], 9183 "map": {"at": 222992, "to": "mm"}, 9184 "name": "SQ_PERFCOUNTER4_SELECT", 9185 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9186 }, 9187 { 9188 "chips": ["gfx7"], 9189 "map": {"at": 222996, "to": "mm"}, 9190 "name": "SQ_PERFCOUNTER5_SELECT", 9191 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9192 }, 9193 { 9194 "chips": ["gfx7"], 9195 "map": {"at": 223000, "to": "mm"}, 9196 "name": "SQ_PERFCOUNTER6_SELECT", 9197 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9198 }, 9199 { 9200 "chips": ["gfx7"], 9201 "map": {"at": 223004, "to": "mm"}, 9202 "name": "SQ_PERFCOUNTER7_SELECT", 9203 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9204 }, 9205 { 9206 "chips": ["gfx7"], 9207 "map": {"at": 223008, "to": "mm"}, 9208 "name": "SQ_PERFCOUNTER8_SELECT", 9209 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9210 }, 9211 { 9212 "chips": ["gfx7"], 9213 "map": {"at": 223012, "to": "mm"}, 9214 "name": "SQ_PERFCOUNTER9_SELECT", 9215 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9216 }, 9217 { 9218 "chips": ["gfx7"], 9219 "map": {"at": 223016, "to": "mm"}, 9220 "name": "SQ_PERFCOUNTER10_SELECT", 9221 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9222 }, 9223 { 9224 "chips": ["gfx7"], 9225 "map": {"at": 223020, "to": "mm"}, 9226 "name": "SQ_PERFCOUNTER11_SELECT", 9227 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9228 }, 9229 { 9230 "chips": ["gfx7"], 9231 "map": {"at": 223024, "to": "mm"}, 9232 "name": "SQ_PERFCOUNTER12_SELECT", 9233 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9234 }, 9235 { 9236 "chips": ["gfx7"], 9237 "map": {"at": 223028, "to": "mm"}, 9238 "name": "SQ_PERFCOUNTER13_SELECT", 9239 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9240 }, 9241 { 9242 "chips": ["gfx7"], 9243 "map": {"at": 223032, "to": "mm"}, 9244 "name": "SQ_PERFCOUNTER14_SELECT", 9245 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9246 }, 9247 { 9248 "chips": ["gfx7"], 9249 "map": {"at": 223036, "to": "mm"}, 9250 "name": "SQ_PERFCOUNTER15_SELECT", 9251 "type_ref": "SQ_PERFCOUNTER0_SELECT" 9252 }, 9253 { 9254 "chips": ["gfx7"], 9255 "map": {"at": 223104, "to": "mm"}, 9256 "name": "SQ_PERFCOUNTER_CTRL", 9257 "type_ref": "SQ_PERFCOUNTER_CTRL" 9258 }, 9259 { 9260 "chips": ["gfx7"], 9261 "map": {"at": 223108, "to": "mm"}, 9262 "name": "SQ_PERFCOUNTER_MASK", 9263 "type_ref": "SQ_PERFCOUNTER_MASK" 9264 }, 9265 { 9266 "chips": ["gfx7"], 9267 "map": {"at": 223112, "to": "mm"}, 9268 "name": "SQ_PERFCOUNTER_CTRL2", 9269 "type_ref": "SQ_PERFCOUNTER_CTRL2" 9270 }, 9271 { 9272 "chips": ["gfx7"], 9273 "map": {"at": 223488, "to": "mm"}, 9274 "name": "SX_PERFCOUNTER0_SELECT", 9275 "type_ref": "SX_PERFCOUNTER0_SELECT" 9276 }, 9277 { 9278 "chips": ["gfx7"], 9279 "map": {"at": 223492, "to": "mm"}, 9280 "name": "SX_PERFCOUNTER1_SELECT", 9281 "type_ref": "SX_PERFCOUNTER0_SELECT" 9282 }, 9283 { 9284 "chips": ["gfx7"], 9285 "map": {"at": 223496, "to": "mm"}, 9286 "name": "SX_PERFCOUNTER2_SELECT", 9287 "type_ref": "SX_PERFCOUNTER0_SELECT" 9288 }, 9289 { 9290 "chips": ["gfx7"], 9291 "map": {"at": 223500, "to": "mm"}, 9292 "name": "SX_PERFCOUNTER3_SELECT", 9293 "type_ref": "SX_PERFCOUNTER0_SELECT" 9294 }, 9295 { 9296 "chips": ["gfx7"], 9297 "map": {"at": 223504, "to": "mm"}, 9298 "name": "SX_PERFCOUNTER0_SELECT1", 9299 "type_ref": "SX_PERFCOUNTER0_SELECT1" 9300 }, 9301 { 9302 "chips": ["gfx7"], 9303 "map": {"at": 223508, "to": "mm"}, 9304 "name": "SX_PERFCOUNTER1_SELECT1", 9305 "type_ref": "SX_PERFCOUNTER0_SELECT1" 9306 }, 9307 { 9308 "chips": ["gfx7"], 9309 "map": {"at": 223744, "to": "mm"}, 9310 "name": "GDS_PERFCOUNTER0_SELECT", 9311 "type_ref": "SX_PERFCOUNTER0_SELECT" 9312 }, 9313 { 9314 "chips": ["gfx7"], 9315 "map": {"at": 223748, "to": "mm"}, 9316 "name": "GDS_PERFCOUNTER1_SELECT", 9317 "type_ref": "SX_PERFCOUNTER0_SELECT" 9318 }, 9319 { 9320 "chips": ["gfx7"], 9321 "map": {"at": 223752, "to": "mm"}, 9322 "name": "GDS_PERFCOUNTER2_SELECT", 9323 "type_ref": "SX_PERFCOUNTER0_SELECT" 9324 }, 9325 { 9326 "chips": ["gfx7"], 9327 "map": {"at": 223756, "to": "mm"}, 9328 "name": "GDS_PERFCOUNTER3_SELECT", 9329 "type_ref": "SX_PERFCOUNTER0_SELECT" 9330 }, 9331 { 9332 "chips": ["gfx7"], 9333 "map": {"at": 223760, "to": "mm"}, 9334 "name": "GDS_PERFCOUNTER0_SELECT1", 9335 "type_ref": "SX_PERFCOUNTER0_SELECT1" 9336 }, 9337 { 9338 "chips": ["gfx7"], 9339 "map": {"at": 224000, "to": "mm"}, 9340 "name": "TA_PERFCOUNTER0_SELECT", 9341 "type_ref": "TD_PERFCOUNTER0_SELECT" 9342 }, 9343 { 9344 "chips": ["gfx7"], 9345 "map": {"at": 224004, "to": "mm"}, 9346 "name": "TA_PERFCOUNTER0_SELECT1", 9347 "type_ref": "TD_PERFCOUNTER0_SELECT1" 9348 }, 9349 { 9350 "chips": ["gfx7"], 9351 "map": {"at": 224008, "to": "mm"}, 9352 "name": "TA_PERFCOUNTER1_SELECT", 9353 "type_ref": "TD_PERFCOUNTER0_SELECT" 9354 }, 9355 { 9356 "chips": ["gfx7"], 9357 "map": {"at": 224256, "to": "mm"}, 9358 "name": "TD_PERFCOUNTER0_SELECT", 9359 "type_ref": "TD_PERFCOUNTER0_SELECT" 9360 }, 9361 { 9362 "chips": ["gfx7"], 9363 "map": {"at": 224260, "to": "mm"}, 9364 "name": "TD_PERFCOUNTER0_SELECT1", 9365 "type_ref": "TD_PERFCOUNTER0_SELECT1" 9366 }, 9367 { 9368 "chips": ["gfx7"], 9369 "map": {"at": 224264, "to": "mm"}, 9370 "name": "TD_PERFCOUNTER1_SELECT", 9371 "type_ref": "TD_PERFCOUNTER0_SELECT" 9372 }, 9373 { 9374 "chips": ["gfx7"], 9375 "map": {"at": 224512, "to": "mm"}, 9376 "name": "TCP_PERFCOUNTER0_SELECT", 9377 "type_ref": "DB_PERFCOUNTER0_SELECT" 9378 }, 9379 { 9380 "chips": ["gfx7"], 9381 "map": {"at": 224516, "to": "mm"}, 9382 "name": "TCP_PERFCOUNTER0_SELECT1", 9383 "type_ref": "DB_PERFCOUNTER0_SELECT1" 9384 }, 9385 { 9386 "chips": ["gfx7"], 9387 "map": {"at": 224520, "to": "mm"}, 9388 "name": "TCP_PERFCOUNTER1_SELECT", 9389 "type_ref": "DB_PERFCOUNTER0_SELECT" 9390 }, 9391 { 9392 "chips": ["gfx7"], 9393 "map": {"at": 224524, "to": "mm"}, 9394 "name": "TCP_PERFCOUNTER1_SELECT1", 9395 "type_ref": "DB_PERFCOUNTER0_SELECT1" 9396 }, 9397 { 9398 "chips": ["gfx7"], 9399 "map": {"at": 224528, "to": "mm"}, 9400 "name": "TCP_PERFCOUNTER2_SELECT", 9401 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9402 }, 9403 { 9404 "chips": ["gfx7"], 9405 "map": {"at": 224532, "to": "mm"}, 9406 "name": "TCP_PERFCOUNTER3_SELECT", 9407 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9408 }, 9409 { 9410 "chips": ["gfx7"], 9411 "map": {"at": 224768, "to": "mm"}, 9412 "name": "TCC_PERFCOUNTER0_SELECT", 9413 "type_ref": "DB_PERFCOUNTER0_SELECT" 9414 }, 9415 { 9416 "chips": ["gfx7"], 9417 "map": {"at": 224772, "to": "mm"}, 9418 "name": "TCC_PERFCOUNTER0_SELECT1", 9419 "type_ref": "TCC_PERFCOUNTER0_SELECT1" 9420 }, 9421 { 9422 "chips": ["gfx7"], 9423 "map": {"at": 224776, "to": "mm"}, 9424 "name": "TCC_PERFCOUNTER1_SELECT", 9425 "type_ref": "DB_PERFCOUNTER0_SELECT" 9426 }, 9427 { 9428 "chips": ["gfx7"], 9429 "map": {"at": 224780, "to": "mm"}, 9430 "name": "TCC_PERFCOUNTER1_SELECT1", 9431 "type_ref": "TCC_PERFCOUNTER0_SELECT1" 9432 }, 9433 { 9434 "chips": ["gfx7"], 9435 "map": {"at": 224784, "to": "mm"}, 9436 "name": "TCC_PERFCOUNTER2_SELECT", 9437 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9438 }, 9439 { 9440 "chips": ["gfx7"], 9441 "map": {"at": 224788, "to": "mm"}, 9442 "name": "TCC_PERFCOUNTER3_SELECT", 9443 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9444 }, 9445 { 9446 "chips": ["gfx7"], 9447 "map": {"at": 224832, "to": "mm"}, 9448 "name": "TCA_PERFCOUNTER0_SELECT", 9449 "type_ref": "DB_PERFCOUNTER0_SELECT" 9450 }, 9451 { 9452 "chips": ["gfx7"], 9453 "map": {"at": 224836, "to": "mm"}, 9454 "name": "TCA_PERFCOUNTER0_SELECT1", 9455 "type_ref": "TCC_PERFCOUNTER0_SELECT1" 9456 }, 9457 { 9458 "chips": ["gfx7"], 9459 "map": {"at": 224840, "to": "mm"}, 9460 "name": "TCA_PERFCOUNTER1_SELECT", 9461 "type_ref": "DB_PERFCOUNTER0_SELECT" 9462 }, 9463 { 9464 "chips": ["gfx7"], 9465 "map": {"at": 224844, "to": "mm"}, 9466 "name": "TCA_PERFCOUNTER1_SELECT1", 9467 "type_ref": "TCC_PERFCOUNTER0_SELECT1" 9468 }, 9469 { 9470 "chips": ["gfx7"], 9471 "map": {"at": 224848, "to": "mm"}, 9472 "name": "TCA_PERFCOUNTER2_SELECT", 9473 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9474 }, 9475 { 9476 "chips": ["gfx7"], 9477 "map": {"at": 224852, "to": "mm"}, 9478 "name": "TCA_PERFCOUNTER3_SELECT", 9479 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9480 }, 9481 { 9482 "chips": ["gfx7"], 9483 "map": {"at": 224896, "to": "mm"}, 9484 "name": "TCS_PERFCOUNTER0_SELECT", 9485 "type_ref": "DB_PERFCOUNTER0_SELECT" 9486 }, 9487 { 9488 "chips": ["gfx7"], 9489 "map": {"at": 224900, "to": "mm"}, 9490 "name": "TCS_PERFCOUNTER0_SELECT1", 9491 "type_ref": "TCC_PERFCOUNTER0_SELECT1" 9492 }, 9493 { 9494 "chips": ["gfx7"], 9495 "map": {"at": 224904, "to": "mm"}, 9496 "name": "TCS_PERFCOUNTER1_SELECT", 9497 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9498 }, 9499 { 9500 "chips": ["gfx7"], 9501 "map": {"at": 224908, "to": "mm"}, 9502 "name": "TCS_PERFCOUNTER2_SELECT", 9503 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9504 }, 9505 { 9506 "chips": ["gfx7"], 9507 "map": {"at": 224912, "to": "mm"}, 9508 "name": "TCS_PERFCOUNTER3_SELECT", 9509 "type_ref": "TCC_PERFCOUNTER2_SELECT" 9510 }, 9511 { 9512 "chips": ["gfx7"], 9513 "map": {"at": 225280, "to": "mm"}, 9514 "name": "CB_PERFCOUNTER_FILTER", 9515 "type_ref": "CB_PERFCOUNTER_FILTER" 9516 }, 9517 { 9518 "chips": ["gfx7"], 9519 "map": {"at": 225284, "to": "mm"}, 9520 "name": "CB_PERFCOUNTER0_SELECT", 9521 "type_ref": "CB_PERFCOUNTER0_SELECT" 9522 }, 9523 { 9524 "chips": ["gfx7"], 9525 "map": {"at": 225288, "to": "mm"}, 9526 "name": "CB_PERFCOUNTER0_SELECT1", 9527 "type_ref": "CB_PERFCOUNTER0_SELECT1" 9528 }, 9529 { 9530 "chips": ["gfx7"], 9531 "map": {"at": 225292, "to": "mm"}, 9532 "name": "CB_PERFCOUNTER1_SELECT", 9533 "type_ref": "CB_PERFCOUNTER1_SELECT" 9534 }, 9535 { 9536 "chips": ["gfx7"], 9537 "map": {"at": 225296, "to": "mm"}, 9538 "name": "CB_PERFCOUNTER2_SELECT", 9539 "type_ref": "CB_PERFCOUNTER1_SELECT" 9540 }, 9541 { 9542 "chips": ["gfx7"], 9543 "map": {"at": 225300, "to": "mm"}, 9544 "name": "CB_PERFCOUNTER3_SELECT", 9545 "type_ref": "CB_PERFCOUNTER1_SELECT" 9546 }, 9547 { 9548 "chips": ["gfx7"], 9549 "map": {"at": 225536, "to": "mm"}, 9550 "name": "DB_PERFCOUNTER0_SELECT", 9551 "type_ref": "DB_PERFCOUNTER0_SELECT" 9552 }, 9553 { 9554 "chips": ["gfx7"], 9555 "map": {"at": 225540, "to": "mm"}, 9556 "name": "DB_PERFCOUNTER0_SELECT1", 9557 "type_ref": "DB_PERFCOUNTER0_SELECT1" 9558 }, 9559 { 9560 "chips": ["gfx7"], 9561 "map": {"at": 225544, "to": "mm"}, 9562 "name": "DB_PERFCOUNTER1_SELECT", 9563 "type_ref": "DB_PERFCOUNTER0_SELECT" 9564 }, 9565 { 9566 "chips": ["gfx7"], 9567 "map": {"at": 225548, "to": "mm"}, 9568 "name": "DB_PERFCOUNTER1_SELECT1", 9569 "type_ref": "DB_PERFCOUNTER0_SELECT1" 9570 }, 9571 { 9572 "chips": ["gfx7"], 9573 "map": {"at": 225552, "to": "mm"}, 9574 "name": "DB_PERFCOUNTER2_SELECT", 9575 "type_ref": "DB_PERFCOUNTER0_SELECT" 9576 }, 9577 { 9578 "chips": ["gfx7"], 9579 "map": {"at": 225560, "to": "mm"}, 9580 "name": "DB_PERFCOUNTER3_SELECT", 9581 "type_ref": "DB_PERFCOUNTER0_SELECT" 9582 }, 9583 { 9584 "chips": ["gfx7"], 9585 "map": {"at": 225792, "to": "mm"}, 9586 "name": "RLC_SPM_PERFMON_CNTL", 9587 "type_ref": "RLC_SPM_PERFMON_CNTL" 9588 }, 9589 { 9590 "chips": ["gfx7"], 9591 "map": {"at": 225796, "to": "mm"}, 9592 "name": "RLC_SPM_PERFMON_RING_BASE_LO", 9593 "type_ref": "RLC_SPM_PERFMON_RING_BASE_LO" 9594 }, 9595 { 9596 "chips": ["gfx7"], 9597 "map": {"at": 225800, "to": "mm"}, 9598 "name": "RLC_SPM_PERFMON_RING_BASE_HI", 9599 "type_ref": "RLC_SPM_PERFMON_RING_BASE_HI" 9600 }, 9601 { 9602 "chips": ["gfx7"], 9603 "map": {"at": 225804, "to": "mm"}, 9604 "name": "RLC_SPM_PERFMON_RING_SIZE", 9605 "type_ref": "RLC_SPM_PERFMON_RING_SIZE" 9606 }, 9607 { 9608 "chips": ["gfx7"], 9609 "map": {"at": 225808, "to": "mm"}, 9610 "name": "RLC_SPM_PERFMON_SEGMENT_SIZE", 9611 "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE" 9612 }, 9613 { 9614 "chips": ["gfx7"], 9615 "map": {"at": 225812, "to": "mm"}, 9616 "name": "RLC_SPM_SE_MUXSEL_ADDR", 9617 "type_ref": "RLC_SPM_SE_MUXSEL_ADDR" 9618 }, 9619 { 9620 "chips": ["gfx7"], 9621 "map": {"at": 225816, "to": "mm"}, 9622 "name": "RLC_SPM_SE_MUXSEL_DATA", 9623 "type_ref": "RLC_SPM_SE_MUXSEL_DATA" 9624 }, 9625 { 9626 "chips": ["gfx7"], 9627 "map": {"at": 225820, "to": "mm"}, 9628 "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY", 9629 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9630 }, 9631 { 9632 "chips": ["gfx7"], 9633 "map": {"at": 225824, "to": "mm"}, 9634 "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY", 9635 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9636 }, 9637 { 9638 "chips": ["gfx7"], 9639 "map": {"at": 225828, "to": "mm"}, 9640 "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY", 9641 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9642 }, 9643 { 9644 "chips": ["gfx7"], 9645 "map": {"at": 225832, "to": "mm"}, 9646 "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY", 9647 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9648 }, 9649 { 9650 "chips": ["gfx7"], 9651 "map": {"at": 225836, "to": "mm"}, 9652 "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY", 9653 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9654 }, 9655 { 9656 "chips": ["gfx7"], 9657 "map": {"at": 225840, "to": "mm"}, 9658 "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY", 9659 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9660 }, 9661 { 9662 "chips": ["gfx7"], 9663 "map": {"at": 225844, "to": "mm"}, 9664 "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY", 9665 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9666 }, 9667 { 9668 "chips": ["gfx7"], 9669 "map": {"at": 225848, "to": "mm"}, 9670 "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY", 9671 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9672 }, 9673 { 9674 "chips": ["gfx7"], 9675 "map": {"at": 225856, "to": "mm"}, 9676 "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY", 9677 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9678 }, 9679 { 9680 "chips": ["gfx7"], 9681 "map": {"at": 225860, "to": "mm"}, 9682 "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY", 9683 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9684 }, 9685 { 9686 "chips": ["gfx7"], 9687 "map": {"at": 225864, "to": "mm"}, 9688 "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY", 9689 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9690 }, 9691 { 9692 "chips": ["gfx7"], 9693 "map": {"at": 225868, "to": "mm"}, 9694 "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY", 9695 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9696 }, 9697 { 9698 "chips": ["gfx7"], 9699 "map": {"at": 225872, "to": "mm"}, 9700 "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY", 9701 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9702 }, 9703 { 9704 "chips": ["gfx7"], 9705 "map": {"at": 225876, "to": "mm"}, 9706 "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY", 9707 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9708 }, 9709 { 9710 "chips": ["gfx7"], 9711 "map": {"at": 225880, "to": "mm"}, 9712 "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY", 9713 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9714 }, 9715 { 9716 "chips": ["gfx7"], 9717 "map": {"at": 225884, "to": "mm"}, 9718 "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY", 9719 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9720 }, 9721 { 9722 "chips": ["gfx7"], 9723 "map": {"at": 225888, "to": "mm"}, 9724 "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY", 9725 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9726 }, 9727 { 9728 "chips": ["gfx7"], 9729 "map": {"at": 225892, "to": "mm"}, 9730 "name": "RLC_SPM_TCS_PERFMON_SAMPLE_DELAY", 9731 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9732 }, 9733 { 9734 "chips": ["gfx7"], 9735 "map": {"at": 225896, "to": "mm"}, 9736 "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY", 9737 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9738 }, 9739 { 9740 "chips": ["gfx7"], 9741 "map": {"at": 225900, "to": "mm"}, 9742 "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR", 9743 "type_ref": "RLC_SPM_SE_MUXSEL_ADDR" 9744 }, 9745 { 9746 "chips": ["gfx7"], 9747 "map": {"at": 225904, "to": "mm"}, 9748 "name": "RLC_SPM_GLOBAL_MUXSEL_DATA", 9749 "type_ref": "RLC_SPM_SE_MUXSEL_DATA" 9750 }, 9751 { 9752 "chips": ["gfx7"], 9753 "map": {"at": 225908, "to": "mm"}, 9754 "name": "RLC_SPM_RING_RDPTR", 9755 "type_ref": "RLC_SPM_RING_RDPTR" 9756 }, 9757 { 9758 "chips": ["gfx7"], 9759 "map": {"at": 225912, "to": "mm"}, 9760 "name": "RLC_SPM_SEGMENT_THRESHOLD", 9761 "type_ref": "RLC_SPM_SEGMENT_THRESHOLD" 9762 }, 9763 { 9764 "chips": ["gfx7"], 9765 "map": {"at": 225916, "to": "mm"}, 9766 "name": "RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY", 9767 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9768 }, 9769 { 9770 "chips": ["gfx7"], 9771 "map": {"at": 225920, "to": "mm"}, 9772 "name": "RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY", 9773 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9774 }, 9775 { 9776 "chips": ["gfx7"], 9777 "map": {"at": 225924, "to": "mm"}, 9778 "name": "RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY", 9779 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9780 }, 9781 { 9782 "chips": ["gfx7"], 9783 "map": {"at": 225928, "to": "mm"}, 9784 "name": "RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY", 9785 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY" 9786 }, 9787 { 9788 "chips": ["gfx7"], 9789 "map": {"at": 226048, "to": "mm"}, 9790 "name": "RLC_PERFMON_CNTL", 9791 "type_ref": "RLC_PERFMON_CNTL" 9792 }, 9793 { 9794 "chips": ["gfx7"], 9795 "map": {"at": 226052, "to": "mm"}, 9796 "name": "RLC_PERFCOUNTER0_SELECT", 9797 "type_ref": "RLC_PERFCOUNTER0_SELECT" 9798 }, 9799 { 9800 "chips": ["gfx7"], 9801 "map": {"at": 226056, "to": "mm"}, 9802 "name": "RLC_PERFCOUNTER1_SELECT", 9803 "type_ref": "RLC_PERFCOUNTER0_SELECT" 9804 } 9805 ], 9806 "register_types": { 9807 "CB_BLEND0_CONTROL": { 9808 "fields": [ 9809 {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"}, 9810 {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"}, 9811 {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"}, 9812 {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"}, 9813 {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"}, 9814 {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"}, 9815 {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"}, 9816 {"bits": [30, 30], "name": "ENABLE"}, 9817 {"bits": [31, 31], "name": "DISABLE_ROP3"} 9818 ] 9819 }, 9820 "CB_BLEND_ALPHA": { 9821 "fields": [ 9822 {"bits": [0, 31], "name": "BLEND_ALPHA"} 9823 ] 9824 }, 9825 "CB_BLEND_BLUE": { 9826 "fields": [ 9827 {"bits": [0, 31], "name": "BLEND_BLUE"} 9828 ] 9829 }, 9830 "CB_BLEND_GREEN": { 9831 "fields": [ 9832 {"bits": [0, 31], "name": "BLEND_GREEN"} 9833 ] 9834 }, 9835 "CB_BLEND_RED": { 9836 "fields": [ 9837 {"bits": [0, 31], "name": "BLEND_RED"} 9838 ] 9839 }, 9840 "CB_COLOR0_ATTRIB": { 9841 "fields": [ 9842 {"bits": [0, 4], "name": "TILE_MODE_INDEX"}, 9843 {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"}, 9844 {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"}, 9845 {"bits": [12, 14], "name": "NUM_SAMPLES"}, 9846 {"bits": [15, 16], "name": "NUM_FRAGMENTS"}, 9847 {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"} 9848 ] 9849 }, 9850 "CB_COLOR0_BASE": { 9851 "fields": [ 9852 {"bits": [0, 31], "name": "BASE_256B"} 9853 ] 9854 }, 9855 "CB_COLOR0_CLEAR_WORD0": { 9856 "fields": [ 9857 {"bits": [0, 31], "name": "CLEAR_WORD0"} 9858 ] 9859 }, 9860 "CB_COLOR0_CLEAR_WORD1": { 9861 "fields": [ 9862 {"bits": [0, 31], "name": "CLEAR_WORD1"} 9863 ] 9864 }, 9865 "CB_COLOR0_CMASK_SLICE": { 9866 "fields": [ 9867 {"bits": [0, 13], "name": "TILE_MAX"} 9868 ] 9869 }, 9870 "CB_COLOR0_INFO": { 9871 "fields": [ 9872 {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"}, 9873 {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"}, 9874 {"bits": [7, 7], "name": "LINEAR_GENERAL"}, 9875 {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"}, 9876 {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"}, 9877 {"bits": [13, 13], "name": "FAST_CLEAR"}, 9878 {"bits": [14, 14], "name": "COMPRESSION"}, 9879 {"bits": [15, 15], "name": "BLEND_CLAMP"}, 9880 {"bits": [16, 16], "name": "BLEND_BYPASS"}, 9881 {"bits": [17, 17], "name": "SIMPLE_FLOAT"}, 9882 {"bits": [18, 18], "name": "ROUND_MODE"}, 9883 {"bits": [19, 19], "name": "CMASK_IS_LINEAR"}, 9884 {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"}, 9885 {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"}, 9886 {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"} 9887 ] 9888 }, 9889 "CB_COLOR0_PITCH": { 9890 "fields": [ 9891 {"bits": [0, 10], "name": "TILE_MAX"}, 9892 {"bits": [20, 30], "name": "FMASK_TILE_MAX"} 9893 ] 9894 }, 9895 "CB_COLOR0_SLICE": { 9896 "fields": [ 9897 {"bits": [0, 21], "name": "TILE_MAX"} 9898 ] 9899 }, 9900 "CB_COLOR0_VIEW": { 9901 "fields": [ 9902 {"bits": [0, 10], "name": "SLICE_START"}, 9903 {"bits": [13, 23], "name": "SLICE_MAX"} 9904 ] 9905 }, 9906 "CB_COLOR_CONTROL": { 9907 "fields": [ 9908 {"bits": [3, 3], "name": "DEGAMMA_ENABLE"}, 9909 {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"}, 9910 {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"} 9911 ] 9912 }, 9913 "CB_PERFCOUNTER0_HI": { 9914 "fields": [ 9915 {"bits": [0, 31], "name": "PERFCOUNTER_HI"} 9916 ] 9917 }, 9918 "CB_PERFCOUNTER0_LO": { 9919 "fields": [ 9920 {"bits": [0, 31], "name": "PERFCOUNTER_LO"} 9921 ] 9922 }, 9923 "CB_PERFCOUNTER0_SELECT": { 9924 "fields": [ 9925 {"bits": [0, 8], "name": "PERF_SEL"}, 9926 {"bits": [10, 18], "name": "PERF_SEL1"}, 9927 {"bits": [20, 23], "name": "CNTR_MODE"}, 9928 {"bits": [24, 27], "name": "PERF_MODE1"}, 9929 {"bits": [28, 31], "name": "PERF_MODE"} 9930 ] 9931 }, 9932 "CB_PERFCOUNTER0_SELECT1": { 9933 "fields": [ 9934 {"bits": [0, 8], "name": "PERF_SEL2"}, 9935 {"bits": [10, 18], "name": "PERF_SEL3"}, 9936 {"bits": [24, 27], "name": "PERF_MODE3"}, 9937 {"bits": [28, 31], "name": "PERF_MODE2"} 9938 ] 9939 }, 9940 "CB_PERFCOUNTER1_SELECT": { 9941 "fields": [ 9942 {"bits": [0, 8], "name": "PERF_SEL"}, 9943 {"bits": [28, 31], "name": "PERF_MODE"} 9944 ] 9945 }, 9946 "CB_PERFCOUNTER_FILTER": { 9947 "fields": [ 9948 {"bits": [0, 0], "name": "OP_FILTER_ENABLE"}, 9949 {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"}, 9950 {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"}, 9951 {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"}, 9952 {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"}, 9953 {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"}, 9954 {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"}, 9955 {"bits": [13, 15], "name": "MRT_FILTER_SEL"}, 9956 {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"}, 9957 {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"}, 9958 {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"}, 9959 {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"} 9960 ] 9961 }, 9962 "CB_SHADER_MASK": { 9963 "fields": [ 9964 {"bits": [0, 3], "name": "OUTPUT0_ENABLE"}, 9965 {"bits": [4, 7], "name": "OUTPUT1_ENABLE"}, 9966 {"bits": [8, 11], "name": "OUTPUT2_ENABLE"}, 9967 {"bits": [12, 15], "name": "OUTPUT3_ENABLE"}, 9968 {"bits": [16, 19], "name": "OUTPUT4_ENABLE"}, 9969 {"bits": [20, 23], "name": "OUTPUT5_ENABLE"}, 9970 {"bits": [24, 27], "name": "OUTPUT6_ENABLE"}, 9971 {"bits": [28, 31], "name": "OUTPUT7_ENABLE"} 9972 ] 9973 }, 9974 "CB_TARGET_MASK": { 9975 "fields": [ 9976 {"bits": [0, 3], "name": "TARGET0_ENABLE"}, 9977 {"bits": [4, 7], "name": "TARGET1_ENABLE"}, 9978 {"bits": [8, 11], "name": "TARGET2_ENABLE"}, 9979 {"bits": [12, 15], "name": "TARGET3_ENABLE"}, 9980 {"bits": [16, 19], "name": "TARGET4_ENABLE"}, 9981 {"bits": [20, 23], "name": "TARGET5_ENABLE"}, 9982 {"bits": [24, 27], "name": "TARGET6_ENABLE"}, 9983 {"bits": [28, 31], "name": "TARGET7_ENABLE"} 9984 ] 9985 }, 9986 "COHER_DEST_BASE_0": { 9987 "fields": [ 9988 {"bits": [0, 31], "name": "DEST_BASE_256B"} 9989 ] 9990 }, 9991 "COHER_DEST_BASE_HI_0": { 9992 "fields": [ 9993 {"bits": [0, 31], "name": "DEST_BASE_HI_256B"} 9994 ] 9995 }, 9996 "COMPUTE_DIM_X": { 9997 "fields": [ 9998 {"bits": [0, 31], "name": "SIZE"} 9999 ] 10000 }, 10001 "COMPUTE_DISPATCH_INITIATOR": { 10002 "fields": [ 10003 {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"}, 10004 {"bits": [1, 1], "name": "PARTIAL_TG_EN"}, 10005 {"bits": [2, 2], "name": "FORCE_START_AT_000"}, 10006 {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"}, 10007 {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"}, 10008 {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"}, 10009 {"bits": [6, 6], "name": "ORDER_MODE"}, 10010 {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"}, 10011 {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"}, 10012 {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"}, 10013 {"bits": [12, 12], "name": "DATA_ATC"}, 10014 {"bits": [14, 14], "name": "RESTORE"} 10015 ] 10016 }, 10017 "COMPUTE_MISC_RESERVED": { 10018 "fields": [ 10019 {"bits": [0, 1], "name": "SEND_SEID"}, 10020 {"bits": [2, 2], "name": "RESERVED2"}, 10021 {"bits": [3, 3], "name": "RESERVED3"}, 10022 {"bits": [4, 4], "name": "RESERVED4"} 10023 ] 10024 }, 10025 "COMPUTE_NUM_THREAD_X": { 10026 "fields": [ 10027 {"bits": [0, 15], "name": "NUM_THREAD_FULL"}, 10028 {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"} 10029 ] 10030 }, 10031 "COMPUTE_PERFCOUNT_ENABLE": { 10032 "fields": [ 10033 {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"} 10034 ] 10035 }, 10036 "COMPUTE_PGM_HI": { 10037 "fields": [ 10038 {"bits": [0, 7], "name": "DATA"}, 10039 {"bits": [8, 8], "name": "INST_ATC"} 10040 ] 10041 }, 10042 "COMPUTE_PGM_RSRC1": { 10043 "fields": [ 10044 {"bits": [0, 5], "name": "VGPRS"}, 10045 {"bits": [6, 9], "name": "SGPRS"}, 10046 {"bits": [10, 11], "name": "PRIORITY"}, 10047 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, 10048 {"bits": [20, 20], "name": "PRIV"}, 10049 {"bits": [21, 21], "name": "DX10_CLAMP"}, 10050 {"bits": [22, 22], "name": "DEBUG_MODE"}, 10051 {"bits": [23, 23], "name": "IEEE_MODE"}, 10052 {"bits": [24, 24], "name": "BULKY"}, 10053 {"bits": [25, 25], "name": "CDBG_USER"} 10054 ] 10055 }, 10056 "COMPUTE_PGM_RSRC2": { 10057 "fields": [ 10058 {"bits": [0, 0], "name": "SCRATCH_EN"}, 10059 {"bits": [1, 5], "name": "USER_SGPR"}, 10060 {"bits": [6, 6], "name": "TRAP_PRESENT"}, 10061 {"bits": [7, 7], "name": "TGID_X_EN"}, 10062 {"bits": [8, 8], "name": "TGID_Y_EN"}, 10063 {"bits": [9, 9], "name": "TGID_Z_EN"}, 10064 {"bits": [10, 10], "name": "TG_SIZE_EN"}, 10065 {"bits": [11, 12], "name": "TIDIG_COMP_CNT"}, 10066 {"bits": [13, 14], "name": "EXCP_EN_MSB"}, 10067 {"bits": [15, 23], "name": "LDS_SIZE"}, 10068 {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"} 10069 ] 10070 }, 10071 "COMPUTE_PIPELINESTAT_ENABLE": { 10072 "fields": [ 10073 {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"} 10074 ] 10075 }, 10076 "COMPUTE_RESOURCE_LIMITS": { 10077 "fields": [ 10078 {"bits": [0, 9], "name": "WAVES_PER_SH"}, 10079 {"bits": [12, 15], "name": "TG_PER_CU"}, 10080 {"bits": [16, 21], "name": "LOCK_THRESHOLD"}, 10081 {"bits": [22, 22], "name": "SIMD_DEST_CNTL"}, 10082 {"bits": [23, 23], "name": "FORCE_SIMD_DIST"}, 10083 {"bits": [24, 26], "name": "CU_GROUP_COUNT"} 10084 ] 10085 }, 10086 "COMPUTE_RESTART_X": { 10087 "fields": [ 10088 {"bits": [0, 31], "name": "RESTART"} 10089 ] 10090 }, 10091 "COMPUTE_START_X": { 10092 "fields": [ 10093 {"bits": [0, 31], "name": "START"} 10094 ] 10095 }, 10096 "COMPUTE_STATIC_THREAD_MGMT_SE0": { 10097 "fields": [ 10098 {"bits": [0, 15], "name": "SH0_CU_EN"}, 10099 {"bits": [16, 31], "name": "SH1_CU_EN"} 10100 ] 10101 }, 10102 "COMPUTE_TBA_HI": { 10103 "fields": [ 10104 {"bits": [0, 7], "name": "DATA"} 10105 ] 10106 }, 10107 "COMPUTE_THREAD_TRACE_ENABLE": { 10108 "fields": [ 10109 {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"} 10110 ] 10111 }, 10112 "COMPUTE_TMPRING_SIZE": { 10113 "fields": [ 10114 {"bits": [0, 11], "name": "WAVES"}, 10115 {"bits": [12, 24], "name": "WAVESIZE"} 10116 ] 10117 }, 10118 "COMPUTE_VMID": { 10119 "fields": [ 10120 {"bits": [0, 3], "name": "DATA"} 10121 ] 10122 }, 10123 "CPG_PERFCOUNTER0_SELECT": { 10124 "fields": [ 10125 {"bits": [0, 5], "name": "PERF_SEL"}, 10126 {"bits": [10, 15], "name": "PERF_SEL1"}, 10127 {"bits": [20, 23], "name": "CNTR_MODE"} 10128 ] 10129 }, 10130 "CPG_PERFCOUNTER0_SELECT1": { 10131 "fields": [ 10132 {"bits": [0, 5], "name": "PERF_SEL2"}, 10133 {"bits": [10, 15], "name": "PERF_SEL3"} 10134 ] 10135 }, 10136 "CPG_PERFCOUNTER1_SELECT": { 10137 "fields": [ 10138 {"bits": [0, 5], "name": "PERF_SEL"} 10139 ] 10140 }, 10141 "CP_APPEND_ADDR_HI": { 10142 "fields": [ 10143 {"bits": [0, 15], "name": "MEM_ADDR_HI"}, 10144 {"bits": [16, 16], "name": "CS_PS_SEL"}, 10145 {"bits": [29, 31], "name": "COMMAND"} 10146 ] 10147 }, 10148 "CP_APPEND_ADDR_LO": { 10149 "fields": [ 10150 {"bits": [2, 31], "name": "MEM_ADDR_LO"} 10151 ] 10152 }, 10153 "CP_APPEND_DATA": { 10154 "fields": [ 10155 {"bits": [0, 31], "name": "DATA"} 10156 ] 10157 }, 10158 "CP_APPEND_LAST_CS_FENCE": { 10159 "fields": [ 10160 {"bits": [0, 31], "name": "LAST_FENCE"} 10161 ] 10162 }, 10163 "CP_CE_COUNTER": { 10164 "fields": [ 10165 {"bits": [0, 31], "name": "CONST_ENGINE_COUNT"} 10166 ] 10167 }, 10168 "CP_CE_IB1_BASE_HI": { 10169 "fields": [ 10170 {"bits": [0, 15], "name": "IB1_BASE_HI"} 10171 ] 10172 }, 10173 "CP_CE_IB1_BASE_LO": { 10174 "fields": [ 10175 {"bits": [2, 31], "name": "IB1_BASE_LO"} 10176 ] 10177 }, 10178 "CP_CE_IB1_BUFSZ": { 10179 "fields": [ 10180 {"bits": [0, 19], "name": "IB1_BUFSZ"} 10181 ] 10182 }, 10183 "CP_CE_IB2_BASE_HI": { 10184 "fields": [ 10185 {"bits": [0, 15], "name": "IB2_BASE_HI"} 10186 ] 10187 }, 10188 "CP_CE_IB2_BASE_LO": { 10189 "fields": [ 10190 {"bits": [2, 31], "name": "IB2_BASE_LO"} 10191 ] 10192 }, 10193 "CP_CE_IB2_BUFSZ": { 10194 "fields": [ 10195 {"bits": [0, 19], "name": "IB2_BUFSZ"} 10196 ] 10197 }, 10198 "CP_CE_INIT_BASE_HI": { 10199 "fields": [ 10200 {"bits": [0, 15], "name": "INIT_BASE_HI"} 10201 ] 10202 }, 10203 "CP_CE_INIT_BASE_LO": { 10204 "fields": [ 10205 {"bits": [5, 31], "name": "INIT_BASE_LO"} 10206 ] 10207 }, 10208 "CP_CE_INIT_BUFSZ": { 10209 "fields": [ 10210 {"bits": [0, 11], "name": "INIT_BUFSZ"} 10211 ] 10212 }, 10213 "CP_COHER_BASE": { 10214 "fields": [ 10215 {"bits": [0, 31], "name": "COHER_BASE_256B"} 10216 ] 10217 }, 10218 "CP_COHER_BASE_HI": { 10219 "fields": [ 10220 {"bits": [0, 7], "name": "COHER_BASE_HI_256B"} 10221 ] 10222 }, 10223 "CP_COHER_CNTL": { 10224 "fields": [ 10225 {"bits": [0, 0], "name": "DEST_BASE_0_ENA"}, 10226 {"bits": [1, 1], "name": "DEST_BASE_1_ENA"}, 10227 {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"}, 10228 {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"}, 10229 {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"}, 10230 {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"}, 10231 {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"}, 10232 {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"}, 10233 {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"}, 10234 {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"}, 10235 {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"}, 10236 {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"}, 10237 {"bits": [16, 16], "name": "TC_VOL_ACTION_ENA"}, 10238 {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"}, 10239 {"bits": [19, 19], "name": "DEST_BASE_2_ENA"}, 10240 {"bits": [21, 21], "name": "DEST_BASE_3_ENA"}, 10241 {"bits": [22, 22], "name": "TCL1_ACTION_ENA"}, 10242 {"bits": [23, 23], "name": "TC_ACTION_ENA"}, 10243 {"bits": [25, 25], "name": "CB_ACTION_ENA"}, 10244 {"bits": [26, 26], "name": "DB_ACTION_ENA"}, 10245 {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"}, 10246 {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"}, 10247 {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"} 10248 ] 10249 }, 10250 "CP_COHER_SIZE": { 10251 "fields": [ 10252 {"bits": [0, 31], "name": "COHER_SIZE_256B"} 10253 ] 10254 }, 10255 "CP_COHER_SIZE_HI": { 10256 "fields": [ 10257 {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"} 10258 ] 10259 }, 10260 "CP_COHER_START_DELAY": { 10261 "fields": [ 10262 {"bits": [0, 5], "name": "START_DELAY_COUNT"} 10263 ] 10264 }, 10265 "CP_COHER_STATUS": { 10266 "fields": [ 10267 {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"}, 10268 {"bits": [24, 25], "name": "MEID"}, 10269 {"bits": [30, 30], "name": "PHASE1_STATUS"}, 10270 {"bits": [31, 31], "name": "STATUS"} 10271 ] 10272 }, 10273 "CP_CPC_BUSY_STAT": { 10274 "fields": [ 10275 {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"}, 10276 {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"}, 10277 {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"}, 10278 {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"}, 10279 {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"}, 10280 {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"}, 10281 {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"}, 10282 {"bits": [7, 7], "name": "MEC1_TC_BUSY"}, 10283 {"bits": [8, 8], "name": "MEC1_DMA_BUSY"}, 10284 {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"}, 10285 {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"}, 10286 {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"}, 10287 {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"}, 10288 {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"}, 10289 {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"}, 10290 {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"}, 10291 {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"}, 10292 {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"}, 10293 {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"}, 10294 {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"}, 10295 {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"}, 10296 {"bits": [23, 23], "name": "MEC2_TC_BUSY"}, 10297 {"bits": [24, 24], "name": "MEC2_DMA_BUSY"}, 10298 {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"}, 10299 {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"}, 10300 {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"}, 10301 {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"}, 10302 {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"} 10303 ] 10304 }, 10305 "CP_CPC_GRBM_FREE_COUNT": { 10306 "fields": [ 10307 {"bits": [0, 5], "name": "FREE_COUNT"} 10308 ] 10309 }, 10310 "CP_CPC_HALT_HYST_COUNT": { 10311 "fields": [ 10312 {"bits": [0, 3], "name": "COUNT"} 10313 ] 10314 }, 10315 "CP_CPC_MC_CNTL": { 10316 "fields": [ 10317 {"bits": [0, 4], "name": "PACK_DELAY_CNT"} 10318 ] 10319 }, 10320 "CP_CPC_SCRATCH_DATA": { 10321 "fields": [ 10322 {"bits": [0, 31], "name": "SCRATCH_DATA"} 10323 ] 10324 }, 10325 "CP_CPC_SCRATCH_INDEX": { 10326 "fields": [ 10327 {"bits": [0, 7], "name": "SCRATCH_INDEX"} 10328 ] 10329 }, 10330 "CP_CPC_STALLED_STAT1": { 10331 "fields": [ 10332 {"bits": [0, 0], "name": "MIU_RDREQ_FREE_STALL"}, 10333 {"bits": [1, 1], "name": "MIU_WRREQ_FREE_STALL"}, 10334 {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"}, 10335 {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"}, 10336 {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"}, 10337 {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"}, 10338 {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"}, 10339 {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"}, 10340 {"bits": [11, 11], "name": "MEC1_WAIT_ON_MC_READ"}, 10341 {"bits": [12, 12], "name": "MEC1_WAIT_ON_MC_WR_ACK"}, 10342 {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"}, 10343 {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"}, 10344 {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"}, 10345 {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"}, 10346 {"bits": [19, 19], "name": "MEC2_WAIT_ON_MC_READ"}, 10347 {"bits": [20, 20], "name": "MEC2_WAIT_ON_MC_WR_ACK"}, 10348 {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"} 10349 ] 10350 }, 10351 "CP_CPC_STATUS": { 10352 "fields": [ 10353 {"bits": [0, 0], "name": "MEC1_BUSY"}, 10354 {"bits": [1, 1], "name": "MEC2_BUSY"}, 10355 {"bits": [2, 2], "name": "DC0_BUSY"}, 10356 {"bits": [3, 3], "name": "DC1_BUSY"}, 10357 {"bits": [4, 4], "name": "RCIU1_BUSY"}, 10358 {"bits": [5, 5], "name": "RCIU2_BUSY"}, 10359 {"bits": [6, 6], "name": "ROQ1_BUSY"}, 10360 {"bits": [7, 7], "name": "ROQ2_BUSY"}, 10361 {"bits": [8, 8], "name": "MIU_RDREQ_BUSY"}, 10362 {"bits": [9, 9], "name": "MIU_WRREQ_BUSY"}, 10363 {"bits": [10, 10], "name": "TCIU_BUSY"}, 10364 {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"}, 10365 {"bits": [12, 12], "name": "QU_BUSY"}, 10366 {"bits": [29, 29], "name": "CPG_CPC_BUSY"}, 10367 {"bits": [30, 30], "name": "CPF_CPC_BUSY"}, 10368 {"bits": [31, 31], "name": "CPC_BUSY"} 10369 ] 10370 }, 10371 "CP_CPF_BUSY_STAT": { 10372 "fields": [ 10373 {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"}, 10374 {"bits": [1, 1], "name": "CSF_RING_BUSY"}, 10375 {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"}, 10376 {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"}, 10377 {"bits": [4, 4], "name": "CSF_STATE_BUSY"}, 10378 {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"}, 10379 {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"}, 10380 {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"}, 10381 {"bits": [8, 8], "name": "CSF_INPUT_BUSY"}, 10382 {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"}, 10383 {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"}, 10384 {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"}, 10385 {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"}, 10386 {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"}, 10387 {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"}, 10388 {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"}, 10389 {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"}, 10390 {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"}, 10391 {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"}, 10392 {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"}, 10393 {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"}, 10394 {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"}, 10395 {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"}, 10396 {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"}, 10397 {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"}, 10398 {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"}, 10399 {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"}, 10400 {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"}, 10401 {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"}, 10402 {"bits": [30, 30], "name": "HQD_PQ_BUSY"}, 10403 {"bits": [31, 31], "name": "HQD_IB_BUSY"} 10404 ] 10405 }, 10406 "CP_CPF_STALLED_STAT1": { 10407 "fields": [ 10408 {"bits": [0, 0], "name": "RING_FETCHING_DATA"}, 10409 {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"}, 10410 {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"}, 10411 {"bits": [3, 3], "name": "STATE_FETCHING_DATA"}, 10412 {"bits": [4, 4], "name": "MIU_WAITING_ON_RDREQ_FREE"}, 10413 {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"}, 10414 {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"} 10415 ] 10416 }, 10417 "CP_CPF_STATUS": { 10418 "fields": [ 10419 {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"}, 10420 {"bits": [1, 1], "name": "CSF_BUSY"}, 10421 {"bits": [2, 2], "name": "MIU_RDREQ_BUSY"}, 10422 {"bits": [3, 3], "name": "MIU_WRREQ_BUSY"}, 10423 {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"}, 10424 {"bits": [5, 5], "name": "ROQ_RING_BUSY"}, 10425 {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"}, 10426 {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"}, 10427 {"bits": [8, 8], "name": "ROQ_STATE_BUSY"}, 10428 {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"}, 10429 {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"}, 10430 {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"}, 10431 {"bits": [12, 12], "name": "SEMAPHORE_BUSY"}, 10432 {"bits": [13, 13], "name": "INTERRUPT_BUSY"}, 10433 {"bits": [14, 14], "name": "TCIU_BUSY"}, 10434 {"bits": [15, 15], "name": "HQD_BUSY"}, 10435 {"bits": [30, 30], "name": "CPC_CPF_BUSY"}, 10436 {"bits": [31, 31], "name": "CPF_BUSY"} 10437 ] 10438 }, 10439 "CP_DMA_CNTL": { 10440 "fields": [ 10441 {"bits": [4, 5], "name": "MIN_AVAILSZ"}, 10442 {"bits": [16, 19], "name": "BUFFER_DEPTH"}, 10443 {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"}, 10444 {"bits": [29, 29], "name": "PIO_FIFO_FULL"}, 10445 {"bits": [30, 31], "name": "PIO_COUNT"} 10446 ] 10447 }, 10448 "CP_DMA_ME_COMMAND": { 10449 "fields": [ 10450 {"bits": [0, 20], "name": "BYTE_COUNT"}, 10451 {"bits": [21, 21], "name": "DIS_WC"}, 10452 {"bits": [22, 23], "name": "SRC_SWAP"}, 10453 {"bits": [24, 25], "name": "DST_SWAP"}, 10454 {"bits": [26, 26], "name": "SAS"}, 10455 {"bits": [27, 27], "name": "DAS"}, 10456 {"bits": [28, 28], "name": "SAIC"}, 10457 {"bits": [29, 29], "name": "DAIC"}, 10458 {"bits": [30, 30], "name": "RAW_WAIT"} 10459 ] 10460 }, 10461 "CP_DMA_ME_CONTROL": { 10462 "fields": [ 10463 {"bits": [12, 12], "name": "SRC_ATC"}, 10464 {"bits": [13, 14], "name": "SRC_CACHE_POLICY"}, 10465 {"bits": [15, 15], "name": "SRC_VOLATILE"}, 10466 {"bits": [20, 21], "name": "DST_SELECT"}, 10467 {"bits": [24, 24], "name": "DST_ATC"}, 10468 {"bits": [25, 26], "name": "DST_CACHE_POLICY"}, 10469 {"bits": [27, 27], "name": "DST_VOLATILE"}, 10470 {"bits": [29, 30], "name": "SRC_SELECT"} 10471 ] 10472 }, 10473 "CP_DMA_ME_DST_ADDR": { 10474 "fields": [ 10475 {"bits": [0, 31], "name": "DST_ADDR"} 10476 ] 10477 }, 10478 "CP_DMA_ME_DST_ADDR_HI": { 10479 "fields": [ 10480 {"bits": [0, 15], "name": "DST_ADDR_HI"} 10481 ] 10482 }, 10483 "CP_DMA_ME_SRC_ADDR": { 10484 "fields": [ 10485 {"bits": [0, 31], "name": "SRC_ADDR"} 10486 ] 10487 }, 10488 "CP_DMA_ME_SRC_ADDR_HI": { 10489 "fields": [ 10490 {"bits": [0, 15], "name": "SRC_ADDR_HI"} 10491 ] 10492 }, 10493 "CP_DMA_READ_TAGS": { 10494 "fields": [ 10495 {"bits": [0, 25], "name": "DMA_READ_TAG"}, 10496 {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"} 10497 ] 10498 }, 10499 "CP_DRAW_OBJECT": { 10500 "fields": [ 10501 {"bits": [0, 31], "name": "OBJECT"} 10502 ] 10503 }, 10504 "CP_DRAW_OBJECT_COUNTER": { 10505 "fields": [ 10506 {"bits": [0, 15], "name": "COUNT"} 10507 ] 10508 }, 10509 "CP_DRAW_WINDOW_CNTL": { 10510 "fields": [ 10511 {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"}, 10512 {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"}, 10513 {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"}, 10514 {"bits": [8, 8], "name": "MODE"} 10515 ] 10516 }, 10517 "CP_DRAW_WINDOW_HI": { 10518 "fields": [ 10519 {"bits": [0, 31], "name": "WINDOW_HI"} 10520 ] 10521 }, 10522 "CP_DRAW_WINDOW_LO": { 10523 "fields": [ 10524 {"bits": [0, 15], "name": "MIN"}, 10525 {"bits": [16, 31], "name": "MAX"} 10526 ] 10527 }, 10528 "CP_DRAW_WINDOW_MASK_HI": { 10529 "fields": [ 10530 {"bits": [0, 31], "name": "WINDOW_MASK_HI"} 10531 ] 10532 }, 10533 "CP_EOP_DONE_ADDR_HI": { 10534 "fields": [ 10535 {"bits": [0, 15], "name": "ADDR_HI"} 10536 ] 10537 }, 10538 "CP_EOP_DONE_ADDR_LO": { 10539 "fields": [ 10540 {"bits": [0, 1], "name": "ADDR_SWAP"}, 10541 {"bits": [2, 31], "name": "ADDR_LO"} 10542 ] 10543 }, 10544 "CP_EOP_DONE_DATA_CNTL": { 10545 "fields": [ 10546 {"bits": [0, 15], "name": "CNTX_ID"}, 10547 {"bits": [16, 17], "name": "DST_SEL"}, 10548 {"bits": [24, 26], "name": "INT_SEL"}, 10549 {"bits": [29, 31], "name": "DATA_SEL"} 10550 ] 10551 }, 10552 "CP_EOP_DONE_DATA_HI": { 10553 "fields": [ 10554 {"bits": [0, 31], "name": "DATA_HI"} 10555 ] 10556 }, 10557 "CP_EOP_DONE_DATA_LO": { 10558 "fields": [ 10559 {"bits": [0, 31], "name": "DATA_LO"} 10560 ] 10561 }, 10562 "CP_EOP_DONE_EVENT_CNTL": { 10563 "fields": [ 10564 {"bits": [0, 6], "name": "WBINV_TC_OP"}, 10565 {"bits": [12, 17], "name": "WBINV_ACTION_ENA"}, 10566 {"bits": [25, 26], "name": "CACHE_CONTROL"}, 10567 {"bits": [27, 27], "name": "EOP_VOLATILE"} 10568 ] 10569 }, 10570 "CP_EOP_LAST_FENCE_HI": { 10571 "fields": [ 10572 {"bits": [0, 31], "name": "LAST_FENCE_HI"} 10573 ] 10574 }, 10575 "CP_EOP_LAST_FENCE_LO": { 10576 "fields": [ 10577 {"bits": [0, 31], "name": "LAST_FENCE_LO"} 10578 ] 10579 }, 10580 "CP_IB1_OFFSET": { 10581 "fields": [ 10582 {"bits": [0, 19], "name": "IB1_OFFSET"} 10583 ] 10584 }, 10585 "CP_IB1_PREAMBLE_BEGIN": { 10586 "fields": [ 10587 {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"} 10588 ] 10589 }, 10590 "CP_IB1_PREAMBLE_END": { 10591 "fields": [ 10592 {"bits": [0, 19], "name": "IB1_PREAMBLE_END"} 10593 ] 10594 }, 10595 "CP_IB2_OFFSET": { 10596 "fields": [ 10597 {"bits": [0, 19], "name": "IB2_OFFSET"} 10598 ] 10599 }, 10600 "CP_IB2_PREAMBLE_BEGIN": { 10601 "fields": [ 10602 {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"} 10603 ] 10604 }, 10605 "CP_IB2_PREAMBLE_END": { 10606 "fields": [ 10607 {"bits": [0, 19], "name": "IB2_PREAMBLE_END"} 10608 ] 10609 }, 10610 "CP_ME_MC_RADDR_HI": { 10611 "fields": [ 10612 {"bits": [0, 15], "name": "ME_MC_RADDR_HI"} 10613 ] 10614 }, 10615 "CP_ME_MC_RADDR_LO": { 10616 "fields": [ 10617 {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"}, 10618 {"bits": [2, 31], "name": "ME_MC_RADDR_LO"} 10619 ] 10620 }, 10621 "CP_ME_MC_WADDR_HI": { 10622 "fields": [ 10623 {"bits": [0, 15], "name": "ME_MC_WADDR_HI"} 10624 ] 10625 }, 10626 "CP_ME_MC_WADDR_LO": { 10627 "fields": [ 10628 {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"}, 10629 {"bits": [2, 31], "name": "ME_MC_WADDR_LO"} 10630 ] 10631 }, 10632 "CP_ME_MC_WDATA_HI": { 10633 "fields": [ 10634 {"bits": [0, 31], "name": "ME_MC_WDATA_HI"} 10635 ] 10636 }, 10637 "CP_ME_MC_WDATA_LO": { 10638 "fields": [ 10639 {"bits": [0, 31], "name": "ME_MC_WDATA_LO"} 10640 ] 10641 }, 10642 "CP_NUM_PRIM_NEEDED_COUNT0_HI": { 10643 "fields": [ 10644 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_HI"} 10645 ] 10646 }, 10647 "CP_NUM_PRIM_NEEDED_COUNT0_LO": { 10648 "fields": [ 10649 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_LO"} 10650 ] 10651 }, 10652 "CP_NUM_PRIM_NEEDED_COUNT1_HI": { 10653 "fields": [ 10654 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_HI"} 10655 ] 10656 }, 10657 "CP_NUM_PRIM_NEEDED_COUNT1_LO": { 10658 "fields": [ 10659 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_LO"} 10660 ] 10661 }, 10662 "CP_NUM_PRIM_NEEDED_COUNT2_HI": { 10663 "fields": [ 10664 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_HI"} 10665 ] 10666 }, 10667 "CP_NUM_PRIM_NEEDED_COUNT2_LO": { 10668 "fields": [ 10669 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_LO"} 10670 ] 10671 }, 10672 "CP_NUM_PRIM_NEEDED_COUNT3_HI": { 10673 "fields": [ 10674 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_HI"} 10675 ] 10676 }, 10677 "CP_NUM_PRIM_NEEDED_COUNT3_LO": { 10678 "fields": [ 10679 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_LO"} 10680 ] 10681 }, 10682 "CP_NUM_PRIM_WRITTEN_COUNT0_HI": { 10683 "fields": [ 10684 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_HI"} 10685 ] 10686 }, 10687 "CP_NUM_PRIM_WRITTEN_COUNT0_LO": { 10688 "fields": [ 10689 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_LO"} 10690 ] 10691 }, 10692 "CP_NUM_PRIM_WRITTEN_COUNT1_HI": { 10693 "fields": [ 10694 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_HI"} 10695 ] 10696 }, 10697 "CP_NUM_PRIM_WRITTEN_COUNT1_LO": { 10698 "fields": [ 10699 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_LO"} 10700 ] 10701 }, 10702 "CP_NUM_PRIM_WRITTEN_COUNT2_HI": { 10703 "fields": [ 10704 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_HI"} 10705 ] 10706 }, 10707 "CP_NUM_PRIM_WRITTEN_COUNT2_LO": { 10708 "fields": [ 10709 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_LO"} 10710 ] 10711 }, 10712 "CP_NUM_PRIM_WRITTEN_COUNT3_HI": { 10713 "fields": [ 10714 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_HI"} 10715 ] 10716 }, 10717 "CP_NUM_PRIM_WRITTEN_COUNT3_LO": { 10718 "fields": [ 10719 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_LO"} 10720 ] 10721 }, 10722 "CP_PA_CINVOC_COUNT_HI": { 10723 "fields": [ 10724 {"bits": [0, 31], "name": "CINVOC_COUNT_HI"} 10725 ] 10726 }, 10727 "CP_PA_CINVOC_COUNT_LO": { 10728 "fields": [ 10729 {"bits": [0, 31], "name": "CINVOC_COUNT_LO"} 10730 ] 10731 }, 10732 "CP_PA_CPRIM_COUNT_HI": { 10733 "fields": [ 10734 {"bits": [0, 31], "name": "CPRIM_COUNT_HI"} 10735 ] 10736 }, 10737 "CP_PA_CPRIM_COUNT_LO": { 10738 "fields": [ 10739 {"bits": [0, 31], "name": "CPRIM_COUNT_LO"} 10740 ] 10741 }, 10742 "CP_PERFMON_CNTL": { 10743 "fields": [ 10744 {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"}, 10745 {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"}, 10746 {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"}, 10747 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"} 10748 ] 10749 }, 10750 "CP_PERFMON_CNTX_CNTL": { 10751 "fields": [ 10752 {"bits": [31, 31], "name": "PERFMON_ENABLE"} 10753 ] 10754 }, 10755 "CP_PFP_ATOMIC_PREOP_HI": { 10756 "fields": [ 10757 {"bits": [0, 31], "name": "ATOMIC_PREOP_HI"} 10758 ] 10759 }, 10760 "CP_PFP_ATOMIC_PREOP_LO": { 10761 "fields": [ 10762 {"bits": [0, 31], "name": "ATOMIC_PREOP_LO"} 10763 ] 10764 }, 10765 "CP_PFP_GDS_ATOMIC0_PREOP_HI": { 10766 "fields": [ 10767 {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_HI"} 10768 ] 10769 }, 10770 "CP_PFP_GDS_ATOMIC0_PREOP_LO": { 10771 "fields": [ 10772 {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_LO"} 10773 ] 10774 }, 10775 "CP_PFP_GDS_ATOMIC1_PREOP_HI": { 10776 "fields": [ 10777 {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_HI"} 10778 ] 10779 }, 10780 "CP_PFP_GDS_ATOMIC1_PREOP_LO": { 10781 "fields": [ 10782 {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_LO"} 10783 ] 10784 }, 10785 "CP_PFP_IB_CONTROL": { 10786 "fields": [ 10787 {"bits": [0, 7], "name": "IB_EN"} 10788 ] 10789 }, 10790 "CP_PFP_LOAD_CONTROL": { 10791 "fields": [ 10792 {"bits": [0, 0], "name": "CONFIG_REG_EN"}, 10793 {"bits": [1, 1], "name": "CNTX_REG_EN"}, 10794 {"bits": [15, 15], "name": "UCONFIG_REG_EN"}, 10795 {"bits": [16, 16], "name": "SH_GFX_REG_EN"}, 10796 {"bits": [24, 24], "name": "SH_CS_REG_EN"} 10797 ] 10798 }, 10799 "CP_PIPE_STATS_ADDR_HI": { 10800 "fields": [ 10801 {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"} 10802 ] 10803 }, 10804 "CP_PIPE_STATS_ADDR_LO": { 10805 "fields": [ 10806 {"bits": [0, 1], "name": "PIPE_STATS_ADDR_SWAP"}, 10807 {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"} 10808 ] 10809 }, 10810 "CP_RB_OFFSET": { 10811 "fields": [ 10812 {"bits": [0, 19], "name": "RB_OFFSET"} 10813 ] 10814 }, 10815 "CP_RINGID": { 10816 "fields": [ 10817 {"bits": [0, 1], "name": "RINGID"} 10818 ] 10819 }, 10820 "CP_SC_PSINVOC_COUNT0_HI": { 10821 "fields": [ 10822 {"bits": [0, 31], "name": "PSINVOC_COUNT0_HI"} 10823 ] 10824 }, 10825 "CP_SC_PSINVOC_COUNT0_LO": { 10826 "fields": [ 10827 {"bits": [0, 31], "name": "PSINVOC_COUNT0_LO"} 10828 ] 10829 }, 10830 "CP_SC_PSINVOC_COUNT1_LO": { 10831 "fields": [ 10832 {"bits": [0, 31], "name": "OBSOLETE"} 10833 ] 10834 }, 10835 "CP_SEM_WAIT_TIMER": { 10836 "fields": [ 10837 {"bits": [0, 31], "name": "SEM_WAIT_TIMER"} 10838 ] 10839 }, 10840 "CP_SIG_SEM_ADDR_HI": { 10841 "fields": [ 10842 {"bits": [0, 15], "name": "SEM_ADDR_HI"}, 10843 {"bits": [16, 16], "name": "SEM_USE_MAILBOX"}, 10844 {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"}, 10845 {"bits": [24, 25], "name": "SEM_CLIENT_CODE"}, 10846 {"bits": [29, 31], "name": "SEM_SELECT"} 10847 ] 10848 }, 10849 "CP_SIG_SEM_ADDR_LO": { 10850 "fields": [ 10851 {"bits": [0, 1], "name": "SEM_ADDR_SWAP"}, 10852 {"bits": [3, 31], "name": "SEM_ADDR_LO"} 10853 ] 10854 }, 10855 "CP_STREAM_OUT_ADDR_HI": { 10856 "fields": [ 10857 {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"} 10858 ] 10859 }, 10860 "CP_STREAM_OUT_ADDR_LO": { 10861 "fields": [ 10862 {"bits": [0, 1], "name": "STREAM_OUT_ADDR_SWAP"}, 10863 {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"} 10864 ] 10865 }, 10866 "CP_STRMOUT_CNTL": { 10867 "fields": [ 10868 {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"} 10869 ] 10870 }, 10871 "CP_ST_BASE_HI": { 10872 "fields": [ 10873 {"bits": [0, 15], "name": "ST_BASE_HI"} 10874 ] 10875 }, 10876 "CP_ST_BASE_LO": { 10877 "fields": [ 10878 {"bits": [2, 31], "name": "ST_BASE_LO"} 10879 ] 10880 }, 10881 "CP_ST_BUFSZ": { 10882 "fields": [ 10883 {"bits": [0, 19], "name": "ST_BUFSZ"} 10884 ] 10885 }, 10886 "CP_VGT_CSINVOC_COUNT_HI": { 10887 "fields": [ 10888 {"bits": [0, 31], "name": "CSINVOC_COUNT_HI"} 10889 ] 10890 }, 10891 "CP_VGT_CSINVOC_COUNT_LO": { 10892 "fields": [ 10893 {"bits": [0, 31], "name": "CSINVOC_COUNT_LO"} 10894 ] 10895 }, 10896 "CP_VGT_DSINVOC_COUNT_HI": { 10897 "fields": [ 10898 {"bits": [0, 31], "name": "DSINVOC_COUNT_HI"} 10899 ] 10900 }, 10901 "CP_VGT_DSINVOC_COUNT_LO": { 10902 "fields": [ 10903 {"bits": [0, 31], "name": "DSINVOC_COUNT_LO"} 10904 ] 10905 }, 10906 "CP_VGT_GSINVOC_COUNT_HI": { 10907 "fields": [ 10908 {"bits": [0, 31], "name": "GSINVOC_COUNT_HI"} 10909 ] 10910 }, 10911 "CP_VGT_GSINVOC_COUNT_LO": { 10912 "fields": [ 10913 {"bits": [0, 31], "name": "GSINVOC_COUNT_LO"} 10914 ] 10915 }, 10916 "CP_VGT_GSPRIM_COUNT_HI": { 10917 "fields": [ 10918 {"bits": [0, 31], "name": "GSPRIM_COUNT_HI"} 10919 ] 10920 }, 10921 "CP_VGT_GSPRIM_COUNT_LO": { 10922 "fields": [ 10923 {"bits": [0, 31], "name": "GSPRIM_COUNT_LO"} 10924 ] 10925 }, 10926 "CP_VGT_HSINVOC_COUNT_HI": { 10927 "fields": [ 10928 {"bits": [0, 31], "name": "HSINVOC_COUNT_HI"} 10929 ] 10930 }, 10931 "CP_VGT_HSINVOC_COUNT_LO": { 10932 "fields": [ 10933 {"bits": [0, 31], "name": "HSINVOC_COUNT_LO"} 10934 ] 10935 }, 10936 "CP_VGT_IAPRIM_COUNT_HI": { 10937 "fields": [ 10938 {"bits": [0, 31], "name": "IAPRIM_COUNT_HI"} 10939 ] 10940 }, 10941 "CP_VGT_IAPRIM_COUNT_LO": { 10942 "fields": [ 10943 {"bits": [0, 31], "name": "IAPRIM_COUNT_LO"} 10944 ] 10945 }, 10946 "CP_VGT_IAVERT_COUNT_HI": { 10947 "fields": [ 10948 {"bits": [0, 31], "name": "IAVERT_COUNT_HI"} 10949 ] 10950 }, 10951 "CP_VGT_IAVERT_COUNT_LO": { 10952 "fields": [ 10953 {"bits": [0, 31], "name": "IAVERT_COUNT_LO"} 10954 ] 10955 }, 10956 "CP_VGT_VSINVOC_COUNT_HI": { 10957 "fields": [ 10958 {"bits": [0, 31], "name": "VSINVOC_COUNT_HI"} 10959 ] 10960 }, 10961 "CP_VGT_VSINVOC_COUNT_LO": { 10962 "fields": [ 10963 {"bits": [0, 31], "name": "VSINVOC_COUNT_LO"} 10964 ] 10965 }, 10966 "CP_VMID": { 10967 "fields": [ 10968 {"bits": [0, 3], "name": "VMID"} 10969 ] 10970 }, 10971 "CP_WAIT_REG_MEM_TIMEOUT": { 10972 "fields": [ 10973 {"bits": [0, 31], "name": "WAIT_REG_MEM_TIMEOUT"} 10974 ] 10975 }, 10976 "CS_COPY_STATE": { 10977 "fields": [ 10978 {"bits": [0, 2], "name": "SRC_STATE_ID"} 10979 ] 10980 }, 10981 "DB_ALPHA_TO_MASK": { 10982 "fields": [ 10983 {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"}, 10984 {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"}, 10985 {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"}, 10986 {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"}, 10987 {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"}, 10988 {"bits": [16, 16], "name": "OFFSET_ROUND"} 10989 ] 10990 }, 10991 "DB_COUNT_CONTROL": { 10992 "fields": [ 10993 {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"}, 10994 {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"}, 10995 {"bits": [4, 6], "name": "SAMPLE_RATE"}, 10996 {"bits": [8, 11], "name": "ZPASS_ENABLE"}, 10997 {"bits": [12, 15], "name": "ZFAIL_ENABLE"}, 10998 {"bits": [16, 19], "name": "SFAIL_ENABLE"}, 10999 {"bits": [20, 23], "name": "DBFAIL_ENABLE"}, 11000 {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"}, 11001 {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"} 11002 ] 11003 }, 11004 "DB_DEPTH_BOUNDS_MAX": { 11005 "fields": [ 11006 {"bits": [0, 31], "name": "MAX"} 11007 ] 11008 }, 11009 "DB_DEPTH_BOUNDS_MIN": { 11010 "fields": [ 11011 {"bits": [0, 31], "name": "MIN"} 11012 ] 11013 }, 11014 "DB_DEPTH_CLEAR": { 11015 "fields": [ 11016 {"bits": [0, 31], "name": "DEPTH_CLEAR"} 11017 ] 11018 }, 11019 "DB_DEPTH_CONTROL": { 11020 "fields": [ 11021 {"bits": [0, 0], "name": "STENCIL_ENABLE"}, 11022 {"bits": [1, 1], "name": "Z_ENABLE"}, 11023 {"bits": [2, 2], "name": "Z_WRITE_ENABLE"}, 11024 {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"}, 11025 {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"}, 11026 {"bits": [7, 7], "name": "BACKFACE_ENABLE"}, 11027 {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"}, 11028 {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"}, 11029 {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"}, 11030 {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"} 11031 ] 11032 }, 11033 "DB_DEPTH_INFO": { 11034 "fields": [ 11035 {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"}, 11036 {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"}, 11037 {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"}, 11038 {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"}, 11039 {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"}, 11040 {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"}, 11041 {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"} 11042 ] 11043 }, 11044 "DB_DEPTH_SIZE": { 11045 "fields": [ 11046 {"bits": [0, 10], "name": "PITCH_TILE_MAX"}, 11047 {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"} 11048 ] 11049 }, 11050 "DB_DEPTH_SLICE": { 11051 "fields": [ 11052 {"bits": [0, 21], "name": "SLICE_TILE_MAX"} 11053 ] 11054 }, 11055 "DB_DEPTH_VIEW": { 11056 "fields": [ 11057 {"bits": [0, 10], "name": "SLICE_START"}, 11058 {"bits": [13, 23], "name": "SLICE_MAX"}, 11059 {"bits": [24, 24], "name": "Z_READ_ONLY"}, 11060 {"bits": [25, 25], "name": "STENCIL_READ_ONLY"} 11061 ] 11062 }, 11063 "DB_EQAA": { 11064 "fields": [ 11065 {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"}, 11066 {"bits": [4, 6], "name": "PS_ITER_SAMPLES"}, 11067 {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"}, 11068 {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"}, 11069 {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"}, 11070 {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"}, 11071 {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"}, 11072 {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"}, 11073 {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"}, 11074 {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"}, 11075 {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"}, 11076 {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"} 11077 ] 11078 }, 11079 "DB_HTILE_SURFACE": { 11080 "fields": [ 11081 {"bits": [0, 0], "name": "LINEAR"}, 11082 {"bits": [1, 1], "name": "FULL_CACHE"}, 11083 {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"}, 11084 {"bits": [3, 3], "name": "PRELOAD"}, 11085 {"bits": [4, 9], "name": "PREFETCH_WIDTH"}, 11086 {"bits": [10, 15], "name": "PREFETCH_HEIGHT"}, 11087 {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"} 11088 ] 11089 }, 11090 "DB_PERFCOUNTER0_SELECT": { 11091 "fields": [ 11092 {"bits": [0, 9], "name": "PERF_SEL"}, 11093 {"bits": [10, 19], "name": "PERF_SEL1"}, 11094 {"bits": [20, 23], "name": "CNTR_MODE"}, 11095 {"bits": [24, 27], "name": "PERF_MODE1"}, 11096 {"bits": [28, 31], "name": "PERF_MODE"} 11097 ] 11098 }, 11099 "DB_PERFCOUNTER0_SELECT1": { 11100 "fields": [ 11101 {"bits": [0, 9], "name": "PERF_SEL2"}, 11102 {"bits": [10, 19], "name": "PERF_SEL3"}, 11103 {"bits": [24, 27], "name": "PERF_MODE3"}, 11104 {"bits": [28, 31], "name": "PERF_MODE2"} 11105 ] 11106 }, 11107 "DB_PRELOAD_CONTROL": { 11108 "fields": [ 11109 {"bits": [0, 7], "name": "START_X"}, 11110 {"bits": [8, 15], "name": "START_Y"}, 11111 {"bits": [16, 23], "name": "MAX_X"}, 11112 {"bits": [24, 31], "name": "MAX_Y"} 11113 ] 11114 }, 11115 "DB_RENDER_CONTROL": { 11116 "fields": [ 11117 {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"}, 11118 {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"}, 11119 {"bits": [2, 2], "name": "DEPTH_COPY"}, 11120 {"bits": [3, 3], "name": "STENCIL_COPY"}, 11121 {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"}, 11122 {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"}, 11123 {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"}, 11124 {"bits": [7, 7], "name": "COPY_CENTROID"}, 11125 {"bits": [8, 11], "name": "COPY_SAMPLE"} 11126 ] 11127 }, 11128 "DB_RENDER_OVERRIDE": { 11129 "fields": [ 11130 {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"}, 11131 {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"}, 11132 {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"}, 11133 {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"}, 11134 {"bits": [7, 7], "name": "FAST_Z_DISABLE"}, 11135 {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"}, 11136 {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"}, 11137 {"bits": [10, 10], "name": "FORCE_COLOR_KILL"}, 11138 {"bits": [11, 11], "name": "FORCE_Z_READ"}, 11139 {"bits": [12, 12], "name": "FORCE_STENCIL_READ"}, 11140 {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"}, 11141 {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"}, 11142 {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"}, 11143 {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"}, 11144 {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"}, 11145 {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"}, 11146 {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"}, 11147 {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"}, 11148 {"bits": [27, 27], "name": "FORCE_Z_DIRTY"}, 11149 {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"}, 11150 {"bits": [29, 29], "name": "FORCE_Z_VALID"}, 11151 {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"}, 11152 {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"} 11153 ] 11154 }, 11155 "DB_RENDER_OVERRIDE2": { 11156 "fields": [ 11157 {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"}, 11158 {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"}, 11159 {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"}, 11160 {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"}, 11161 {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"}, 11162 {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"}, 11163 {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"}, 11164 {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"}, 11165 {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"}, 11166 {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"}, 11167 {"bits": [15, 17], "name": "HIS_SFUNC_FF"}, 11168 {"bits": [18, 20], "name": "HIS_SFUNC_BF"}, 11169 {"bits": [21, 21], "name": "PRESERVE_ZRANGE"}, 11170 {"bits": [22, 22], "name": "PRESERVE_SRESULTS"}, 11171 {"bits": [23, 23], "name": "DISABLE_FAST_PASS"} 11172 ] 11173 }, 11174 "DB_SHADER_CONTROL": { 11175 "fields": [ 11176 {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"}, 11177 {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"}, 11178 {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"}, 11179 {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"}, 11180 {"bits": [6, 6], "name": "KILL_ENABLE"}, 11181 {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"}, 11182 {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"}, 11183 {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"}, 11184 {"bits": [10, 10], "name": "EXEC_ON_NOOP"}, 11185 {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"}, 11186 {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"}, 11187 {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"} 11188 ] 11189 }, 11190 "DB_SRESULTS_COMPARE_STATE0": { 11191 "fields": [ 11192 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"}, 11193 {"bits": [4, 11], "name": "COMPAREVALUE0"}, 11194 {"bits": [12, 19], "name": "COMPAREMASK0"}, 11195 {"bits": [24, 24], "name": "ENABLE0"} 11196 ] 11197 }, 11198 "DB_SRESULTS_COMPARE_STATE1": { 11199 "fields": [ 11200 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"}, 11201 {"bits": [4, 11], "name": "COMPAREVALUE1"}, 11202 {"bits": [12, 19], "name": "COMPAREMASK1"}, 11203 {"bits": [24, 24], "name": "ENABLE1"} 11204 ] 11205 }, 11206 "DB_STENCILREFMASK": { 11207 "fields": [ 11208 {"bits": [0, 7], "name": "STENCILTESTVAL"}, 11209 {"bits": [8, 15], "name": "STENCILMASK"}, 11210 {"bits": [16, 23], "name": "STENCILWRITEMASK"}, 11211 {"bits": [24, 31], "name": "STENCILOPVAL"} 11212 ] 11213 }, 11214 "DB_STENCILREFMASK_BF": { 11215 "fields": [ 11216 {"bits": [0, 7], "name": "STENCILTESTVAL_BF"}, 11217 {"bits": [8, 15], "name": "STENCILMASK_BF"}, 11218 {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"}, 11219 {"bits": [24, 31], "name": "STENCILOPVAL_BF"} 11220 ] 11221 }, 11222 "DB_STENCIL_CLEAR": { 11223 "fields": [ 11224 {"bits": [0, 7], "name": "CLEAR"} 11225 ] 11226 }, 11227 "DB_STENCIL_CONTROL": { 11228 "fields": [ 11229 {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"}, 11230 {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"}, 11231 {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"}, 11232 {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"}, 11233 {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"}, 11234 {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"} 11235 ] 11236 }, 11237 "DB_STENCIL_INFO": { 11238 "fields": [ 11239 {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"}, 11240 {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"}, 11241 {"bits": [20, 22], "name": "TILE_MODE_INDEX"}, 11242 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"}, 11243 {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"} 11244 ] 11245 }, 11246 "DB_ZPASS_COUNT_HI": { 11247 "fields": [ 11248 {"bits": [0, 30], "name": "COUNT_HI"} 11249 ] 11250 }, 11251 "DB_ZPASS_COUNT_LOW": { 11252 "fields": [ 11253 {"bits": [0, 31], "name": "COUNT_LOW"} 11254 ] 11255 }, 11256 "DB_Z_INFO": { 11257 "fields": [ 11258 {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"}, 11259 {"bits": [2, 3], "name": "NUM_SAMPLES"}, 11260 {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"}, 11261 {"bits": [20, 22], "name": "TILE_MODE_INDEX"}, 11262 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"}, 11263 {"bits": [28, 28], "name": "READ_SIZE"}, 11264 {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"}, 11265 {"bits": [31, 31], "name": "ZRANGE_PRECISION"} 11266 ] 11267 }, 11268 "GB_ADDR_CONFIG": { 11269 "fields": [ 11270 {"bits": [0, 2], "name": "NUM_PIPES"}, 11271 {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"}, 11272 {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"}, 11273 {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"}, 11274 {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"}, 11275 {"bits": [20, 22], "name": "NUM_GPUS"}, 11276 {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"}, 11277 {"bits": [28, 29], "name": "ROW_SIZE"}, 11278 {"bits": [30, 30], "name": "NUM_LOWER_PIPES"} 11279 ] 11280 }, 11281 "GB_MACROTILE_MODE0": { 11282 "fields": [ 11283 {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"}, 11284 {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"}, 11285 {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"}, 11286 {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"} 11287 ] 11288 }, 11289 "GB_TILE_MODE0": { 11290 "fields": [ 11291 {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"}, 11292 {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"}, 11293 {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"}, 11294 {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"}, 11295 {"bits": [25, 26], "name": "SAMPLE_SPLIT"} 11296 ] 11297 }, 11298 "GDS_ATOM_BASE": { 11299 "fields": [ 11300 {"bits": [0, 15], "name": "BASE"}, 11301 {"bits": [16, 31], "name": "UNUSED"} 11302 ] 11303 }, 11304 "GDS_ATOM_CNTL": { 11305 "fields": [ 11306 {"bits": [0, 5], "name": "AINC"}, 11307 {"bits": [6, 7], "name": "UNUSED1"}, 11308 {"bits": [8, 8], "name": "DMODE"}, 11309 {"bits": [9, 31], "name": "UNUSED2"} 11310 ] 11311 }, 11312 "GDS_ATOM_COMPLETE": { 11313 "fields": [ 11314 {"bits": [0, 0], "name": "COMPLETE"}, 11315 {"bits": [1, 31], "name": "UNUSED"} 11316 ] 11317 }, 11318 "GDS_ATOM_DST": { 11319 "fields": [ 11320 {"bits": [0, 31], "name": "DST"} 11321 ] 11322 }, 11323 "GDS_ATOM_OFFSET0": { 11324 "fields": [ 11325 {"bits": [0, 7], "name": "OFFSET0"}, 11326 {"bits": [8, 31], "name": "UNUSED"} 11327 ] 11328 }, 11329 "GDS_ATOM_OFFSET1": { 11330 "fields": [ 11331 {"bits": [0, 7], "name": "OFFSET1"}, 11332 {"bits": [8, 31], "name": "UNUSED"} 11333 ] 11334 }, 11335 "GDS_ATOM_OP": { 11336 "fields": [ 11337 {"bits": [0, 7], "name": "OP"}, 11338 {"bits": [8, 31], "name": "UNUSED"} 11339 ] 11340 }, 11341 "GDS_ATOM_SIZE": { 11342 "fields": [ 11343 {"bits": [0, 15], "name": "SIZE"}, 11344 {"bits": [16, 31], "name": "UNUSED"} 11345 ] 11346 }, 11347 "GDS_GWS_RESOURCE": { 11348 "fields": [ 11349 {"bits": [0, 0], "name": "FLAG"}, 11350 {"bits": [1, 12], "name": "COUNTER"}, 11351 {"bits": [13, 13], "name": "TYPE"}, 11352 {"bits": [14, 14], "name": "DED"}, 11353 {"bits": [15, 15], "name": "RELEASE_ALL"}, 11354 {"bits": [16, 26], "name": "HEAD_QUEUE"}, 11355 {"bits": [27, 27], "name": "HEAD_VALID"}, 11356 {"bits": [28, 28], "name": "HEAD_FLAG"}, 11357 {"bits": [29, 31], "name": "UNUSED1"} 11358 ] 11359 }, 11360 "GDS_GWS_RESOURCE_CNT": { 11361 "fields": [ 11362 {"bits": [0, 15], "name": "RESOURCE_CNT"}, 11363 {"bits": [16, 31], "name": "UNUSED"} 11364 ] 11365 }, 11366 "GDS_GWS_RESOURCE_CNTL": { 11367 "fields": [ 11368 {"bits": [0, 5], "name": "INDEX"}, 11369 {"bits": [6, 31], "name": "UNUSED"} 11370 ] 11371 }, 11372 "GDS_OA_ADDRESS": { 11373 "fields": [ 11374 {"bits": [0, 15], "name": "DS_ADDRESS"}, 11375 {"bits": [16, 19], "name": "CRAWLER_TYPE"}, 11376 {"bits": [20, 23], "name": "CRAWLER"}, 11377 {"bits": [24, 29], "name": "UNUSED"}, 11378 {"bits": [30, 30], "name": "NO_ALLOC"}, 11379 {"bits": [31, 31], "name": "ENABLE"} 11380 ] 11381 }, 11382 "GDS_OA_CNTL": { 11383 "fields": [ 11384 {"bits": [0, 3], "name": "INDEX"}, 11385 {"bits": [4, 31], "name": "UNUSED"} 11386 ] 11387 }, 11388 "GDS_OA_COUNTER": { 11389 "fields": [ 11390 {"bits": [0, 31], "name": "SPACE_AVAILABLE"} 11391 ] 11392 }, 11393 "GDS_OA_INCDEC": { 11394 "fields": [ 11395 {"bits": [0, 30], "name": "VALUE"}, 11396 {"bits": [31, 31], "name": "INCDEC"} 11397 ] 11398 }, 11399 "GDS_OA_RING_SIZE": { 11400 "fields": [ 11401 {"bits": [0, 31], "name": "RING_SIZE"} 11402 ] 11403 }, 11404 "GDS_RD_ADDR": { 11405 "fields": [ 11406 {"bits": [0, 31], "name": "READ_ADDR"} 11407 ] 11408 }, 11409 "GDS_RD_BURST_ADDR": { 11410 "fields": [ 11411 {"bits": [0, 31], "name": "BURST_ADDR"} 11412 ] 11413 }, 11414 "GDS_RD_BURST_COUNT": { 11415 "fields": [ 11416 {"bits": [0, 31], "name": "BURST_COUNT"} 11417 ] 11418 }, 11419 "GDS_RD_BURST_DATA": { 11420 "fields": [ 11421 {"bits": [0, 31], "name": "BURST_DATA"} 11422 ] 11423 }, 11424 "GDS_RD_DATA": { 11425 "fields": [ 11426 {"bits": [0, 31], "name": "READ_DATA"} 11427 ] 11428 }, 11429 "GDS_WRITE_COMPLETE": { 11430 "fields": [ 11431 {"bits": [0, 31], "name": "WRITE_COMPLETE"} 11432 ] 11433 }, 11434 "GDS_WR_ADDR": { 11435 "fields": [ 11436 {"bits": [0, 31], "name": "WRITE_ADDR"} 11437 ] 11438 }, 11439 "GDS_WR_DATA": { 11440 "fields": [ 11441 {"bits": [0, 31], "name": "WRITE_DATA"} 11442 ] 11443 }, 11444 "GRBM_GFX_INDEX": { 11445 "fields": [ 11446 {"bits": [0, 7], "name": "INSTANCE_INDEX"}, 11447 {"bits": [8, 15], "name": "SH_INDEX"}, 11448 {"bits": [16, 23], "name": "SE_INDEX"}, 11449 {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"}, 11450 {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"}, 11451 {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"} 11452 ] 11453 }, 11454 "GRBM_PERFCOUNTER0_SELECT": { 11455 "fields": [ 11456 {"bits": [0, 5], "name": "PERF_SEL"}, 11457 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"}, 11458 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"}, 11459 {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"}, 11460 {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"}, 11461 {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"}, 11462 {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"}, 11463 {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"}, 11464 {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"}, 11465 {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"}, 11466 {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"}, 11467 {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"}, 11468 {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"}, 11469 {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"}, 11470 {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"}, 11471 {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"}, 11472 {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"}, 11473 {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"}, 11474 {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"} 11475 ] 11476 }, 11477 "GRBM_SE0_PERFCOUNTER_SELECT": { 11478 "fields": [ 11479 {"bits": [0, 5], "name": "PERF_SEL"}, 11480 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"}, 11481 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"}, 11482 {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"}, 11483 {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"}, 11484 {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"}, 11485 {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"}, 11486 {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"}, 11487 {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"}, 11488 {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"}, 11489 {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"}, 11490 {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"} 11491 ] 11492 }, 11493 "GRBM_STATUS": { 11494 "fields": [ 11495 {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"}, 11496 {"bits": [5, 5], "name": "SRBM_RQ_PENDING"}, 11497 {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"}, 11498 {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"}, 11499 {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"}, 11500 {"bits": [12, 12], "name": "DB_CLEAN"}, 11501 {"bits": [13, 13], "name": "CB_CLEAN"}, 11502 {"bits": [14, 14], "name": "TA_BUSY"}, 11503 {"bits": [15, 15], "name": "GDS_BUSY"}, 11504 {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"}, 11505 {"bits": [17, 17], "name": "VGT_BUSY"}, 11506 {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"}, 11507 {"bits": [19, 19], "name": "IA_BUSY"}, 11508 {"bits": [20, 20], "name": "SX_BUSY"}, 11509 {"bits": [21, 21], "name": "WD_BUSY"}, 11510 {"bits": [22, 22], "name": "SPI_BUSY"}, 11511 {"bits": [23, 23], "name": "BCI_BUSY"}, 11512 {"bits": [24, 24], "name": "SC_BUSY"}, 11513 {"bits": [25, 25], "name": "PA_BUSY"}, 11514 {"bits": [26, 26], "name": "DB_BUSY"}, 11515 {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"}, 11516 {"bits": [29, 29], "name": "CP_BUSY"}, 11517 {"bits": [30, 30], "name": "CB_BUSY"}, 11518 {"bits": [31, 31], "name": "GUI_ACTIVE"} 11519 ] 11520 }, 11521 "GRBM_STATUS2": { 11522 "fields": [ 11523 {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"}, 11524 {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"}, 11525 {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"}, 11526 {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"}, 11527 {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"}, 11528 {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"}, 11529 {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"}, 11530 {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"}, 11531 {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"}, 11532 {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"}, 11533 {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"}, 11534 {"bits": [14, 14], "name": "RLC_RQ_PENDING"}, 11535 {"bits": [24, 24], "name": "RLC_BUSY"}, 11536 {"bits": [25, 25], "name": "TC_BUSY"}, 11537 {"bits": [28, 28], "name": "CPF_BUSY"}, 11538 {"bits": [29, 29], "name": "CPC_BUSY"}, 11539 {"bits": [30, 30], "name": "CPG_BUSY"} 11540 ] 11541 }, 11542 "GRBM_STATUS_SE0": { 11543 "fields": [ 11544 {"bits": [1, 1], "name": "DB_CLEAN"}, 11545 {"bits": [2, 2], "name": "CB_CLEAN"}, 11546 {"bits": [22, 22], "name": "BCI_BUSY"}, 11547 {"bits": [23, 23], "name": "VGT_BUSY"}, 11548 {"bits": [24, 24], "name": "PA_BUSY"}, 11549 {"bits": [25, 25], "name": "TA_BUSY"}, 11550 {"bits": [26, 26], "name": "SX_BUSY"}, 11551 {"bits": [27, 27], "name": "SPI_BUSY"}, 11552 {"bits": [29, 29], "name": "SC_BUSY"}, 11553 {"bits": [30, 30], "name": "DB_BUSY"}, 11554 {"bits": [31, 31], "name": "CB_BUSY"} 11555 ] 11556 }, 11557 "IA_ENHANCE": { 11558 "fields": [ 11559 {"bits": [0, 31], "name": "MISC"} 11560 ] 11561 }, 11562 "IA_MULTI_VGT_PARAM": { 11563 "fields": [ 11564 {"bits": [0, 15], "name": "PRIMGROUP_SIZE"}, 11565 {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"}, 11566 {"bits": [17, 17], "name": "SWITCH_ON_EOP"}, 11567 {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"}, 11568 {"bits": [19, 19], "name": "SWITCH_ON_EOI"}, 11569 {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"} 11570 ] 11571 }, 11572 "PA_CL_CLIP_CNTL": { 11573 "fields": [ 11574 {"bits": [0, 0], "name": "UCP_ENA_0"}, 11575 {"bits": [1, 1], "name": "UCP_ENA_1"}, 11576 {"bits": [2, 2], "name": "UCP_ENA_2"}, 11577 {"bits": [3, 3], "name": "UCP_ENA_3"}, 11578 {"bits": [4, 4], "name": "UCP_ENA_4"}, 11579 {"bits": [5, 5], "name": "UCP_ENA_5"}, 11580 {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"}, 11581 {"bits": [14, 15], "name": "PS_UCP_MODE"}, 11582 {"bits": [16, 16], "name": "CLIP_DISABLE"}, 11583 {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"}, 11584 {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"}, 11585 {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"}, 11586 {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"}, 11587 {"bits": [21, 21], "name": "VTX_KILL_OR"}, 11588 {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"}, 11589 {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"}, 11590 {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"}, 11591 {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"}, 11592 {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"} 11593 ] 11594 }, 11595 "PA_CL_GB_VERT_CLIP_ADJ": { 11596 "fields": [ 11597 {"bits": [0, 31], "name": "DATA_REGISTER"} 11598 ] 11599 }, 11600 "PA_CL_NANINF_CNTL": { 11601 "fields": [ 11602 {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"}, 11603 {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"}, 11604 {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"}, 11605 {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"}, 11606 {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"}, 11607 {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"}, 11608 {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"}, 11609 {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"}, 11610 {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"}, 11611 {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"}, 11612 {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"}, 11613 {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"}, 11614 {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"}, 11615 {"bits": [13, 13], "name": "VS_W_INF_RETAIN"}, 11616 {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"}, 11617 {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"} 11618 ] 11619 }, 11620 "PA_CL_VPORT_XOFFSET": { 11621 "fields": [ 11622 {"bits": [0, 31], "name": "VPORT_XOFFSET"} 11623 ] 11624 }, 11625 "PA_CL_VPORT_XSCALE": { 11626 "fields": [ 11627 {"bits": [0, 31], "name": "VPORT_XSCALE"} 11628 ] 11629 }, 11630 "PA_CL_VPORT_YOFFSET": { 11631 "fields": [ 11632 {"bits": [0, 31], "name": "VPORT_YOFFSET"} 11633 ] 11634 }, 11635 "PA_CL_VPORT_YSCALE": { 11636 "fields": [ 11637 {"bits": [0, 31], "name": "VPORT_YSCALE"} 11638 ] 11639 }, 11640 "PA_CL_VPORT_ZOFFSET": { 11641 "fields": [ 11642 {"bits": [0, 31], "name": "VPORT_ZOFFSET"} 11643 ] 11644 }, 11645 "PA_CL_VPORT_ZSCALE": { 11646 "fields": [ 11647 {"bits": [0, 31], "name": "VPORT_ZSCALE"} 11648 ] 11649 }, 11650 "PA_CL_VS_OUT_CNTL": { 11651 "fields": [ 11652 {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"}, 11653 {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"}, 11654 {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"}, 11655 {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"}, 11656 {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"}, 11657 {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"}, 11658 {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"}, 11659 {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"}, 11660 {"bits": [8, 8], "name": "CULL_DIST_ENA_0"}, 11661 {"bits": [9, 9], "name": "CULL_DIST_ENA_1"}, 11662 {"bits": [10, 10], "name": "CULL_DIST_ENA_2"}, 11663 {"bits": [11, 11], "name": "CULL_DIST_ENA_3"}, 11664 {"bits": [12, 12], "name": "CULL_DIST_ENA_4"}, 11665 {"bits": [13, 13], "name": "CULL_DIST_ENA_5"}, 11666 {"bits": [14, 14], "name": "CULL_DIST_ENA_6"}, 11667 {"bits": [15, 15], "name": "CULL_DIST_ENA_7"}, 11668 {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"}, 11669 {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"}, 11670 {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"}, 11671 {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"}, 11672 {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"}, 11673 {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"}, 11674 {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"}, 11675 {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"}, 11676 {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"}, 11677 {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"} 11678 ] 11679 }, 11680 "PA_CL_VTE_CNTL": { 11681 "fields": [ 11682 {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"}, 11683 {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"}, 11684 {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"}, 11685 {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"}, 11686 {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"}, 11687 {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"}, 11688 {"bits": [8, 8], "name": "VTX_XY_FMT"}, 11689 {"bits": [9, 9], "name": "VTX_Z_FMT"}, 11690 {"bits": [10, 10], "name": "VTX_W0_FMT"}, 11691 {"bits": [11, 11], "name": "PERFCOUNTER_REF"} 11692 ] 11693 }, 11694 "PA_SC_AA_CONFIG": { 11695 "fields": [ 11696 {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"}, 11697 {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"}, 11698 {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"}, 11699 {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"}, 11700 {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"} 11701 ] 11702 }, 11703 "PA_SC_AA_MASK_X0Y0_X1Y0": { 11704 "fields": [ 11705 {"bits": [0, 15], "name": "AA_MASK_X0Y0"}, 11706 {"bits": [16, 31], "name": "AA_MASK_X1Y0"} 11707 ] 11708 }, 11709 "PA_SC_AA_MASK_X0Y1_X1Y1": { 11710 "fields": [ 11711 {"bits": [0, 15], "name": "AA_MASK_X0Y1"}, 11712 {"bits": [16, 31], "name": "AA_MASK_X1Y1"} 11713 ] 11714 }, 11715 "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0": { 11716 "fields": [ 11717 {"bits": [0, 3], "name": "S0_X"}, 11718 {"bits": [4, 7], "name": "S0_Y"}, 11719 {"bits": [8, 11], "name": "S1_X"}, 11720 {"bits": [12, 15], "name": "S1_Y"}, 11721 {"bits": [16, 19], "name": "S2_X"}, 11722 {"bits": [20, 23], "name": "S2_Y"}, 11723 {"bits": [24, 27], "name": "S3_X"}, 11724 {"bits": [28, 31], "name": "S3_Y"} 11725 ] 11726 }, 11727 "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1": { 11728 "fields": [ 11729 {"bits": [0, 3], "name": "S4_X"}, 11730 {"bits": [4, 7], "name": "S4_Y"}, 11731 {"bits": [8, 11], "name": "S5_X"}, 11732 {"bits": [12, 15], "name": "S5_Y"}, 11733 {"bits": [16, 19], "name": "S6_X"}, 11734 {"bits": [20, 23], "name": "S6_Y"}, 11735 {"bits": [24, 27], "name": "S7_X"}, 11736 {"bits": [28, 31], "name": "S7_Y"} 11737 ] 11738 }, 11739 "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2": { 11740 "fields": [ 11741 {"bits": [0, 3], "name": "S8_X"}, 11742 {"bits": [4, 7], "name": "S8_Y"}, 11743 {"bits": [8, 11], "name": "S9_X"}, 11744 {"bits": [12, 15], "name": "S9_Y"}, 11745 {"bits": [16, 19], "name": "S10_X"}, 11746 {"bits": [20, 23], "name": "S10_Y"}, 11747 {"bits": [24, 27], "name": "S11_X"}, 11748 {"bits": [28, 31], "name": "S11_Y"} 11749 ] 11750 }, 11751 "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3": { 11752 "fields": [ 11753 {"bits": [0, 3], "name": "S12_X"}, 11754 {"bits": [4, 7], "name": "S12_Y"}, 11755 {"bits": [8, 11], "name": "S13_X"}, 11756 {"bits": [12, 15], "name": "S13_Y"}, 11757 {"bits": [16, 19], "name": "S14_X"}, 11758 {"bits": [20, 23], "name": "S14_Y"}, 11759 {"bits": [24, 27], "name": "S15_X"}, 11760 {"bits": [28, 31], "name": "S15_Y"} 11761 ] 11762 }, 11763 "PA_SC_CENTROID_PRIORITY_0": { 11764 "fields": [ 11765 {"bits": [0, 3], "name": "DISTANCE_0"}, 11766 {"bits": [4, 7], "name": "DISTANCE_1"}, 11767 {"bits": [8, 11], "name": "DISTANCE_2"}, 11768 {"bits": [12, 15], "name": "DISTANCE_3"}, 11769 {"bits": [16, 19], "name": "DISTANCE_4"}, 11770 {"bits": [20, 23], "name": "DISTANCE_5"}, 11771 {"bits": [24, 27], "name": "DISTANCE_6"}, 11772 {"bits": [28, 31], "name": "DISTANCE_7"} 11773 ] 11774 }, 11775 "PA_SC_CENTROID_PRIORITY_1": { 11776 "fields": [ 11777 {"bits": [0, 3], "name": "DISTANCE_8"}, 11778 {"bits": [4, 7], "name": "DISTANCE_9"}, 11779 {"bits": [8, 11], "name": "DISTANCE_10"}, 11780 {"bits": [12, 15], "name": "DISTANCE_11"}, 11781 {"bits": [16, 19], "name": "DISTANCE_12"}, 11782 {"bits": [20, 23], "name": "DISTANCE_13"}, 11783 {"bits": [24, 27], "name": "DISTANCE_14"}, 11784 {"bits": [28, 31], "name": "DISTANCE_15"} 11785 ] 11786 }, 11787 "PA_SC_CLIPRECT_0_BR": { 11788 "fields": [ 11789 {"bits": [0, 14], "name": "BR_X"}, 11790 {"bits": [16, 30], "name": "BR_Y"} 11791 ] 11792 }, 11793 "PA_SC_CLIPRECT_0_TL": { 11794 "fields": [ 11795 {"bits": [0, 14], "name": "TL_X"}, 11796 {"bits": [16, 30], "name": "TL_Y"} 11797 ] 11798 }, 11799 "PA_SC_CLIPRECT_RULE": { 11800 "fields": [ 11801 {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"} 11802 ] 11803 }, 11804 "PA_SC_EDGERULE": { 11805 "fields": [ 11806 {"bits": [0, 3], "name": "ER_TRI"}, 11807 {"bits": [4, 7], "name": "ER_POINT"}, 11808 {"bits": [8, 11], "name": "ER_RECT"}, 11809 {"bits": [12, 17], "name": "ER_LINE_LR"}, 11810 {"bits": [18, 23], "name": "ER_LINE_RL"}, 11811 {"bits": [24, 27], "name": "ER_LINE_TB"}, 11812 {"bits": [28, 31], "name": "ER_LINE_BT"} 11813 ] 11814 }, 11815 "PA_SC_GENERIC_SCISSOR_TL": { 11816 "fields": [ 11817 {"bits": [0, 14], "name": "TL_X"}, 11818 {"bits": [16, 30], "name": "TL_Y"}, 11819 {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"} 11820 ] 11821 }, 11822 "PA_SC_LINE_CNTL": { 11823 "fields": [ 11824 {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"}, 11825 {"bits": [10, 10], "name": "LAST_PIXEL"}, 11826 {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"}, 11827 {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"} 11828 ] 11829 }, 11830 "PA_SC_LINE_STIPPLE": { 11831 "fields": [ 11832 {"bits": [0, 15], "name": "LINE_PATTERN"}, 11833 {"bits": [16, 23], "name": "REPEAT_COUNT"}, 11834 {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"}, 11835 {"bits": [29, 30], "name": "AUTO_RESET_CNTL"} 11836 ] 11837 }, 11838 "PA_SC_LINE_STIPPLE_STATE": { 11839 "fields": [ 11840 {"bits": [0, 3], "name": "CURRENT_PTR"}, 11841 {"bits": [8, 15], "name": "CURRENT_COUNT"} 11842 ] 11843 }, 11844 "PA_SC_MODE_CNTL_0": { 11845 "fields": [ 11846 {"bits": [0, 0], "name": "MSAA_ENABLE"}, 11847 {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"}, 11848 {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"}, 11849 {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"} 11850 ] 11851 }, 11852 "PA_SC_MODE_CNTL_1": { 11853 "fields": [ 11854 {"bits": [0, 0], "name": "WALK_SIZE"}, 11855 {"bits": [1, 1], "name": "WALK_ALIGNMENT"}, 11856 {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"}, 11857 {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"}, 11858 {"bits": [4, 6], "name": "WALK_FENCE_SIZE"}, 11859 {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"}, 11860 {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"}, 11861 {"bits": [9, 9], "name": "TILE_COVER_DISABLE"}, 11862 {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"}, 11863 {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"}, 11864 {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"}, 11865 {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"}, 11866 {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"}, 11867 {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"}, 11868 {"bits": [16, 16], "name": "PS_ITER_SAMPLE"}, 11869 {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"}, 11870 {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"}, 11871 {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"}, 11872 {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"}, 11873 {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"}, 11874 {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"}, 11875 {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"}, 11876 {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"}, 11877 {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"} 11878 ] 11879 }, 11880 "PA_SC_P3D_TRAP_SCREEN_H": { 11881 "fields": [ 11882 {"bits": [0, 13], "name": "X_COORD"} 11883 ] 11884 }, 11885 "PA_SC_P3D_TRAP_SCREEN_HV_EN": { 11886 "fields": [ 11887 {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"}, 11888 {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"} 11889 ] 11890 }, 11891 "PA_SC_P3D_TRAP_SCREEN_V": { 11892 "fields": [ 11893 {"bits": [0, 13], "name": "Y_COORD"} 11894 ] 11895 }, 11896 "PA_SC_PERFCOUNTER1_SELECT": { 11897 "fields": [ 11898 {"bits": [0, 9], "name": "PERF_SEL"} 11899 ] 11900 }, 11901 "PA_SC_RASTER_CONFIG": { 11902 "fields": [ 11903 {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"}, 11904 {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"}, 11905 {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"}, 11906 {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"}, 11907 {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"}, 11908 {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"}, 11909 {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"}, 11910 {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"}, 11911 {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"}, 11912 {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"}, 11913 {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"}, 11914 {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"}, 11915 {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"}, 11916 {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"}, 11917 {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"} 11918 ] 11919 }, 11920 "PA_SC_RASTER_CONFIG_1": { 11921 "fields": [ 11922 {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"}, 11923 {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"}, 11924 {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"} 11925 ] 11926 }, 11927 "PA_SC_SCREEN_EXTENT_CONTROL": { 11928 "fields": [ 11929 {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"}, 11930 {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"} 11931 ] 11932 }, 11933 "PA_SC_SCREEN_EXTENT_MIN_0": { 11934 "fields": [ 11935 {"bits": [0, 15], "name": "X"}, 11936 {"bits": [16, 31], "name": "Y"} 11937 ] 11938 }, 11939 "PA_SC_SCREEN_SCISSOR_BR": { 11940 "fields": [ 11941 {"bits": [0, 15], "name": "BR_X"}, 11942 {"bits": [16, 31], "name": "BR_Y"} 11943 ] 11944 }, 11945 "PA_SC_SCREEN_SCISSOR_TL": { 11946 "fields": [ 11947 {"bits": [0, 15], "name": "TL_X"}, 11948 {"bits": [16, 31], "name": "TL_Y"} 11949 ] 11950 }, 11951 "PA_SC_VPORT_ZMAX_0": { 11952 "fields": [ 11953 {"bits": [0, 31], "name": "VPORT_ZMAX"} 11954 ] 11955 }, 11956 "PA_SC_VPORT_ZMIN_0": { 11957 "fields": [ 11958 {"bits": [0, 31], "name": "VPORT_ZMIN"} 11959 ] 11960 }, 11961 "PA_SC_WINDOW_OFFSET": { 11962 "fields": [ 11963 {"bits": [0, 15], "name": "WINDOW_X_OFFSET"}, 11964 {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"} 11965 ] 11966 }, 11967 "PA_SU_HARDWARE_SCREEN_OFFSET": { 11968 "fields": [ 11969 {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"}, 11970 {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"} 11971 ] 11972 }, 11973 "PA_SU_LINE_CNTL": { 11974 "fields": [ 11975 {"bits": [0, 15], "name": "WIDTH"} 11976 ] 11977 }, 11978 "PA_SU_LINE_STIPPLE_CNTL": { 11979 "fields": [ 11980 {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"}, 11981 {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"}, 11982 {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"}, 11983 {"bits": [4, 4], "name": "DIAMOND_ADJUST"} 11984 ] 11985 }, 11986 "PA_SU_LINE_STIPPLE_SCALE": { 11987 "fields": [ 11988 {"bits": [0, 31], "name": "LINE_STIPPLE_SCALE"} 11989 ] 11990 }, 11991 "PA_SU_LINE_STIPPLE_VALUE": { 11992 "fields": [ 11993 {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"} 11994 ] 11995 }, 11996 "PA_SU_PERFCOUNTER0_HI": { 11997 "fields": [ 11998 {"bits": [0, 15], "name": "PERFCOUNTER_HI"} 11999 ] 12000 }, 12001 "PA_SU_PERFCOUNTER0_SELECT": { 12002 "fields": [ 12003 {"bits": [0, 9], "name": "PERF_SEL"}, 12004 {"bits": [10, 19], "name": "PERF_SEL1"}, 12005 {"bits": [20, 23], "name": "CNTR_MODE"} 12006 ] 12007 }, 12008 "PA_SU_PERFCOUNTER0_SELECT1": { 12009 "fields": [ 12010 {"bits": [0, 9], "name": "PERF_SEL2"}, 12011 {"bits": [10, 19], "name": "PERF_SEL3"} 12012 ] 12013 }, 12014 "PA_SU_PERFCOUNTER2_SELECT": { 12015 "fields": [ 12016 {"bits": [0, 9], "name": "PERF_SEL"}, 12017 {"bits": [20, 23], "name": "CNTR_MODE"} 12018 ] 12019 }, 12020 "PA_SU_POINT_MINMAX": { 12021 "fields": [ 12022 {"bits": [0, 15], "name": "MIN_SIZE"}, 12023 {"bits": [16, 31], "name": "MAX_SIZE"} 12024 ] 12025 }, 12026 "PA_SU_POINT_SIZE": { 12027 "fields": [ 12028 {"bits": [0, 15], "name": "HEIGHT"}, 12029 {"bits": [16, 31], "name": "WIDTH"} 12030 ] 12031 }, 12032 "PA_SU_POLY_OFFSET_CLAMP": { 12033 "fields": [ 12034 {"bits": [0, 31], "name": "CLAMP"} 12035 ] 12036 }, 12037 "PA_SU_POLY_OFFSET_DB_FMT_CNTL": { 12038 "fields": [ 12039 {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"}, 12040 {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"} 12041 ] 12042 }, 12043 "PA_SU_POLY_OFFSET_FRONT_OFFSET": { 12044 "fields": [ 12045 {"bits": [0, 31], "name": "OFFSET"} 12046 ] 12047 }, 12048 "PA_SU_POLY_OFFSET_FRONT_SCALE": { 12049 "fields": [ 12050 {"bits": [0, 31], "name": "SCALE"} 12051 ] 12052 }, 12053 "PA_SU_PRIM_FILTER_CNTL": { 12054 "fields": [ 12055 {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"}, 12056 {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"}, 12057 {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"}, 12058 {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"}, 12059 {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"}, 12060 {"bits": [5, 5], "name": "LINE_EXPAND_ENA"}, 12061 {"bits": [6, 6], "name": "POINT_EXPAND_ENA"}, 12062 {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"}, 12063 {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"}, 12064 {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"}, 12065 {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"} 12066 ] 12067 }, 12068 "PA_SU_SC_MODE_CNTL": { 12069 "fields": [ 12070 {"bits": [0, 0], "name": "CULL_FRONT"}, 12071 {"bits": [1, 1], "name": "CULL_BACK"}, 12072 {"bits": [2, 2], "name": "FACE"}, 12073 {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"}, 12074 {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"}, 12075 {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"}, 12076 {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"}, 12077 {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"}, 12078 {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"}, 12079 {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"}, 12080 {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"}, 12081 {"bits": [20, 20], "name": "PERSP_CORR_DIS"}, 12082 {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"} 12083 ] 12084 }, 12085 "PA_SU_VTX_CNTL": { 12086 "fields": [ 12087 {"bits": [0, 0], "name": "PIX_CENTER"}, 12088 {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"}, 12089 {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"} 12090 ] 12091 }, 12092 "RLC_PERFCOUNTER0_SELECT": { 12093 "fields": [ 12094 {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"} 12095 ] 12096 }, 12097 "RLC_PERFMON_CNTL": { 12098 "fields": [ 12099 {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"}, 12100 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"} 12101 ] 12102 }, 12103 "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY": { 12104 "fields": [ 12105 {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"}, 12106 {"bits": [8, 31], "name": "RESERVED"} 12107 ] 12108 }, 12109 "RLC_SPM_PERFMON_CNTL": { 12110 "fields": [ 12111 {"bits": [0, 11], "name": "RESERVED1"}, 12112 {"bits": [12, 13], "name": "PERFMON_RING_MODE"}, 12113 {"bits": [14, 15], "name": "RESERVED"}, 12114 {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"} 12115 ] 12116 }, 12117 "RLC_SPM_PERFMON_RING_BASE_HI": { 12118 "fields": [ 12119 {"bits": [0, 15], "name": "RING_BASE_HI"}, 12120 {"bits": [16, 31], "name": "RESERVED"} 12121 ] 12122 }, 12123 "RLC_SPM_PERFMON_RING_BASE_LO": { 12124 "fields": [ 12125 {"bits": [0, 31], "name": "RING_BASE_LO"} 12126 ] 12127 }, 12128 "RLC_SPM_PERFMON_RING_SIZE": { 12129 "fields": [ 12130 {"bits": [0, 31], "name": "RING_BASE_SIZE"} 12131 ] 12132 }, 12133 "RLC_SPM_PERFMON_SEGMENT_SIZE": { 12134 "fields": [ 12135 {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"}, 12136 {"bits": [8, 10], "name": "RESERVED1"}, 12137 {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"}, 12138 {"bits": [16, 20], "name": "SE0_NUM_LINE"}, 12139 {"bits": [21, 25], "name": "SE1_NUM_LINE"}, 12140 {"bits": [26, 30], "name": "SE2_NUM_LINE"}, 12141 {"bits": [31, 31], "name": "RESERVED"} 12142 ] 12143 }, 12144 "RLC_SPM_RING_RDPTR": { 12145 "fields": [ 12146 {"bits": [0, 31], "name": "PERFMON_RING_RDPTR"} 12147 ] 12148 }, 12149 "RLC_SPM_SEGMENT_THRESHOLD": { 12150 "fields": [ 12151 {"bits": [0, 31], "name": "NUM_SEGMENT_THRESHOLD"} 12152 ] 12153 }, 12154 "RLC_SPM_SE_MUXSEL_ADDR": { 12155 "fields": [ 12156 {"bits": [0, 31], "name": "PERFMON_SEL_ADDR"} 12157 ] 12158 }, 12159 "RLC_SPM_SE_MUXSEL_DATA": { 12160 "fields": [ 12161 {"bits": [0, 31], "name": "PERFMON_SEL_DATA"} 12162 ] 12163 }, 12164 "SCRATCH_ADDR": { 12165 "fields": [ 12166 {"bits": [0, 31], "name": "OBSOLETE_ADDR"} 12167 ] 12168 }, 12169 "SCRATCH_REG0": { 12170 "fields": [ 12171 {"bits": [0, 31], "name": "SCRATCH_REG0"} 12172 ] 12173 }, 12174 "SCRATCH_REG1": { 12175 "fields": [ 12176 {"bits": [0, 31], "name": "SCRATCH_REG1"} 12177 ] 12178 }, 12179 "SCRATCH_REG2": { 12180 "fields": [ 12181 {"bits": [0, 31], "name": "SCRATCH_REG2"} 12182 ] 12183 }, 12184 "SCRATCH_REG3": { 12185 "fields": [ 12186 {"bits": [0, 31], "name": "SCRATCH_REG3"} 12187 ] 12188 }, 12189 "SCRATCH_REG4": { 12190 "fields": [ 12191 {"bits": [0, 31], "name": "SCRATCH_REG4"} 12192 ] 12193 }, 12194 "SCRATCH_REG5": { 12195 "fields": [ 12196 {"bits": [0, 31], "name": "SCRATCH_REG5"} 12197 ] 12198 }, 12199 "SCRATCH_REG6": { 12200 "fields": [ 12201 {"bits": [0, 31], "name": "SCRATCH_REG6"} 12202 ] 12203 }, 12204 "SCRATCH_REG7": { 12205 "fields": [ 12206 {"bits": [0, 31], "name": "SCRATCH_REG7"} 12207 ] 12208 }, 12209 "SCRATCH_UMSK": { 12210 "fields": [ 12211 {"bits": [0, 7], "name": "OBSOLETE_UMSK"}, 12212 {"bits": [16, 17], "name": "OBSOLETE_SWAP"} 12213 ] 12214 }, 12215 "SPI_BARYC_CNTL": { 12216 "fields": [ 12217 {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"}, 12218 {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"}, 12219 {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"}, 12220 {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"}, 12221 {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"}, 12222 {"bits": [20, 20], "name": "POS_FLOAT_ULC"}, 12223 {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"} 12224 ] 12225 }, 12226 "SPI_CONFIG_CNTL": { 12227 "fields": [ 12228 {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"}, 12229 {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"}, 12230 {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"}, 12231 {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"}, 12232 {"bits": [26, 26], "name": "RSRC_MGMT_RESET"}, 12233 {"bits": [27, 27], "name": "TTRACE_STALL_ALL"} 12234 ] 12235 }, 12236 "SPI_INTERP_CONTROL_0": { 12237 "fields": [ 12238 {"bits": [0, 0], "name": "FLAT_SHADE_ENA"}, 12239 {"bits": [1, 1], "name": "PNT_SPRITE_ENA"}, 12240 {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"}, 12241 {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"}, 12242 {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"}, 12243 {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"}, 12244 {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"} 12245 ] 12246 }, 12247 "SPI_PERFCOUNTER4_SELECT": { 12248 "fields": [ 12249 {"bits": [0, 7], "name": "PERF_SEL"} 12250 ] 12251 }, 12252 "SPI_PERFCOUNTER_BINS": { 12253 "fields": [ 12254 {"bits": [0, 3], "name": "BIN0_MIN"}, 12255 {"bits": [4, 7], "name": "BIN0_MAX"}, 12256 {"bits": [8, 11], "name": "BIN1_MIN"}, 12257 {"bits": [12, 15], "name": "BIN1_MAX"}, 12258 {"bits": [16, 19], "name": "BIN2_MIN"}, 12259 {"bits": [20, 23], "name": "BIN2_MAX"}, 12260 {"bits": [24, 27], "name": "BIN3_MIN"}, 12261 {"bits": [28, 31], "name": "BIN3_MAX"} 12262 ] 12263 }, 12264 "SPI_PS_INPUT_CNTL_0": { 12265 "fields": [ 12266 {"bits": [0, 5], "name": "OFFSET"}, 12267 {"bits": [8, 9], "name": "DEFAULT_VAL"}, 12268 {"bits": [10, 10], "name": "FLAT_SHADE"}, 12269 {"bits": [13, 16], "name": "CYL_WRAP"}, 12270 {"bits": [17, 17], "name": "PT_SPRITE_TEX"}, 12271 {"bits": [18, 18], "name": "DUP"} 12272 ] 12273 }, 12274 "SPI_PS_INPUT_CNTL_20": { 12275 "fields": [ 12276 {"bits": [0, 5], "name": "OFFSET"}, 12277 {"bits": [8, 9], "name": "DEFAULT_VAL"}, 12278 {"bits": [10, 10], "name": "FLAT_SHADE"}, 12279 {"bits": [18, 18], "name": "DUP"} 12280 ] 12281 }, 12282 "SPI_PS_INPUT_ENA": { 12283 "fields": [ 12284 {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"}, 12285 {"bits": [1, 1], "name": "PERSP_CENTER_ENA"}, 12286 {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"}, 12287 {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"}, 12288 {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"}, 12289 {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"}, 12290 {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"}, 12291 {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"}, 12292 {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"}, 12293 {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"}, 12294 {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"}, 12295 {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"}, 12296 {"bits": [12, 12], "name": "FRONT_FACE_ENA"}, 12297 {"bits": [13, 13], "name": "ANCILLARY_ENA"}, 12298 {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"}, 12299 {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"} 12300 ] 12301 }, 12302 "SPI_PS_IN_CONTROL": { 12303 "fields": [ 12304 {"bits": [0, 5], "name": "NUM_INTERP"}, 12305 {"bits": [6, 6], "name": "PARAM_GEN"}, 12306 {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"} 12307 ] 12308 }, 12309 "SPI_SHADER_COL_FORMAT": { 12310 "fields": [ 12311 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"}, 12312 {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"}, 12313 {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"}, 12314 {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"}, 12315 {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"}, 12316 {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"}, 12317 {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"}, 12318 {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"} 12319 ] 12320 }, 12321 "SPI_SHADER_LATE_ALLOC_VS": { 12322 "fields": [ 12323 {"bits": [0, 5], "name": "LIMIT"} 12324 ] 12325 }, 12326 "SPI_SHADER_PGM_RSRC1_GS": { 12327 "fields": [ 12328 {"bits": [0, 5], "name": "VGPRS"}, 12329 {"bits": [6, 9], "name": "SGPRS"}, 12330 {"bits": [10, 11], "name": "PRIORITY"}, 12331 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, 12332 {"bits": [20, 20], "name": "PRIV"}, 12333 {"bits": [21, 21], "name": "DX10_CLAMP"}, 12334 {"bits": [22, 22], "name": "DEBUG_MODE"}, 12335 {"bits": [23, 23], "name": "IEEE_MODE"}, 12336 {"bits": [24, 24], "name": "CU_GROUP_ENABLE"}, 12337 {"bits": [25, 27], "name": "CACHE_CTL"}, 12338 {"bits": [28, 28], "name": "CDBG_USER"} 12339 ] 12340 }, 12341 "SPI_SHADER_PGM_RSRC1_HS": { 12342 "fields": [ 12343 {"bits": [0, 5], "name": "VGPRS"}, 12344 {"bits": [6, 9], "name": "SGPRS"}, 12345 {"bits": [10, 11], "name": "PRIORITY"}, 12346 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, 12347 {"bits": [20, 20], "name": "PRIV"}, 12348 {"bits": [21, 21], "name": "DX10_CLAMP"}, 12349 {"bits": [22, 22], "name": "DEBUG_MODE"}, 12350 {"bits": [23, 23], "name": "IEEE_MODE"}, 12351 {"bits": [24, 26], "name": "CACHE_CTL"}, 12352 {"bits": [27, 27], "name": "CDBG_USER"} 12353 ] 12354 }, 12355 "SPI_SHADER_PGM_RSRC1_LS": { 12356 "fields": [ 12357 {"bits": [0, 5], "name": "VGPRS"}, 12358 {"bits": [6, 9], "name": "SGPRS"}, 12359 {"bits": [10, 11], "name": "PRIORITY"}, 12360 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, 12361 {"bits": [20, 20], "name": "PRIV"}, 12362 {"bits": [21, 21], "name": "DX10_CLAMP"}, 12363 {"bits": [22, 22], "name": "DEBUG_MODE"}, 12364 {"bits": [23, 23], "name": "IEEE_MODE"}, 12365 {"bits": [24, 25], "name": "VGPR_COMP_CNT"}, 12366 {"bits": [26, 28], "name": "CACHE_CTL"}, 12367 {"bits": [29, 29], "name": "CDBG_USER"} 12368 ] 12369 }, 12370 "SPI_SHADER_PGM_RSRC1_PS": { 12371 "fields": [ 12372 {"bits": [0, 5], "name": "VGPRS"}, 12373 {"bits": [6, 9], "name": "SGPRS"}, 12374 {"bits": [10, 11], "name": "PRIORITY"}, 12375 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, 12376 {"bits": [20, 20], "name": "PRIV"}, 12377 {"bits": [21, 21], "name": "DX10_CLAMP"}, 12378 {"bits": [22, 22], "name": "DEBUG_MODE"}, 12379 {"bits": [23, 23], "name": "IEEE_MODE"}, 12380 {"bits": [24, 24], "name": "CU_GROUP_DISABLE"}, 12381 {"bits": [25, 27], "name": "CACHE_CTL"}, 12382 {"bits": [28, 28], "name": "CDBG_USER"} 12383 ] 12384 }, 12385 "SPI_SHADER_PGM_RSRC1_VS": { 12386 "fields": [ 12387 {"bits": [0, 5], "name": "VGPRS"}, 12388 {"bits": [6, 9], "name": "SGPRS"}, 12389 {"bits": [10, 11], "name": "PRIORITY"}, 12390 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, 12391 {"bits": [20, 20], "name": "PRIV"}, 12392 {"bits": [21, 21], "name": "DX10_CLAMP"}, 12393 {"bits": [22, 22], "name": "DEBUG_MODE"}, 12394 {"bits": [23, 23], "name": "IEEE_MODE"}, 12395 {"bits": [24, 25], "name": "VGPR_COMP_CNT"}, 12396 {"bits": [26, 26], "name": "CU_GROUP_ENABLE"}, 12397 {"bits": [27, 29], "name": "CACHE_CTL"}, 12398 {"bits": [30, 30], "name": "CDBG_USER"} 12399 ] 12400 }, 12401 "SPI_SHADER_PGM_RSRC2_ES_VS": { 12402 "fields": [ 12403 {"bits": [0, 0], "name": "SCRATCH_EN"}, 12404 {"bits": [1, 5], "name": "USER_SGPR"}, 12405 {"bits": [6, 6], "name": "TRAP_PRESENT"}, 12406 {"bits": [7, 7], "name": "OC_LDS_EN"}, 12407 {"bits": [8, 16], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, 12408 {"bits": [20, 28], "name": "LDS_SIZE"} 12409 ] 12410 }, 12411 "SPI_SHADER_PGM_RSRC2_GS": { 12412 "fields": [ 12413 {"bits": [0, 0], "name": "SCRATCH_EN"}, 12414 {"bits": [1, 5], "name": "USER_SGPR"}, 12415 {"bits": [6, 6], "name": "TRAP_PRESENT"}, 12416 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"} 12417 ] 12418 }, 12419 "SPI_SHADER_PGM_RSRC2_HS": { 12420 "fields": [ 12421 {"bits": [0, 0], "name": "SCRATCH_EN"}, 12422 {"bits": [1, 5], "name": "USER_SGPR"}, 12423 {"bits": [6, 6], "name": "TRAP_PRESENT"}, 12424 {"bits": [7, 7], "name": "OC_LDS_EN"}, 12425 {"bits": [8, 8], "name": "TG_SIZE_EN"}, 12426 {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"} 12427 ] 12428 }, 12429 "SPI_SHADER_PGM_RSRC2_LS_VS": { 12430 "fields": [ 12431 {"bits": [0, 0], "name": "SCRATCH_EN"}, 12432 {"bits": [1, 5], "name": "USER_SGPR"}, 12433 {"bits": [6, 6], "name": "TRAP_PRESENT"}, 12434 {"bits": [7, 15], "name": "LDS_SIZE"}, 12435 {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"} 12436 ] 12437 }, 12438 "SPI_SHADER_PGM_RSRC2_PS": { 12439 "fields": [ 12440 {"bits": [0, 0], "name": "SCRATCH_EN"}, 12441 {"bits": [1, 5], "name": "USER_SGPR"}, 12442 {"bits": [6, 6], "name": "TRAP_PRESENT"}, 12443 {"bits": [7, 7], "name": "WAVE_CNT_EN"}, 12444 {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"}, 12445 {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"} 12446 ] 12447 }, 12448 "SPI_SHADER_PGM_RSRC2_VS": { 12449 "fields": [ 12450 {"bits": [0, 0], "name": "SCRATCH_EN"}, 12451 {"bits": [1, 5], "name": "USER_SGPR"}, 12452 {"bits": [6, 6], "name": "TRAP_PRESENT"}, 12453 {"bits": [7, 7], "name": "OC_LDS_EN"}, 12454 {"bits": [8, 8], "name": "SO_BASE0_EN"}, 12455 {"bits": [9, 9], "name": "SO_BASE1_EN"}, 12456 {"bits": [10, 10], "name": "SO_BASE2_EN"}, 12457 {"bits": [11, 11], "name": "SO_BASE3_EN"}, 12458 {"bits": [12, 12], "name": "SO_EN"}, 12459 {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"} 12460 ] 12461 }, 12462 "SPI_SHADER_PGM_RSRC3_HS": { 12463 "fields": [ 12464 {"bits": [0, 5], "name": "WAVE_LIMIT"}, 12465 {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"} 12466 ] 12467 }, 12468 "SPI_SHADER_PGM_RSRC3_PS": { 12469 "fields": [ 12470 {"bits": [0, 15], "name": "CU_EN"}, 12471 {"bits": [16, 21], "name": "WAVE_LIMIT"}, 12472 {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"} 12473 ] 12474 }, 12475 "SPI_SHADER_POS_FORMAT": { 12476 "fields": [ 12477 {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"}, 12478 {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"}, 12479 {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"}, 12480 {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"} 12481 ] 12482 }, 12483 "SPI_SHADER_TBA_HI_PS": { 12484 "fields": [ 12485 {"bits": [0, 7], "name": "MEM_BASE"} 12486 ] 12487 }, 12488 "SPI_SHADER_TBA_LO_PS": { 12489 "fields": [ 12490 {"bits": [0, 31], "name": "MEM_BASE"} 12491 ] 12492 }, 12493 "SPI_SHADER_Z_FORMAT": { 12494 "fields": [ 12495 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"} 12496 ] 12497 }, 12498 "SPI_VS_OUT_CONFIG": { 12499 "fields": [ 12500 {"bits": [1, 5], "name": "VS_EXPORT_COUNT"}, 12501 {"bits": [6, 6], "name": "VS_HALF_PACK"} 12502 ] 12503 }, 12504 "SQC_CACHES": { 12505 "fields": [ 12506 {"bits": [0, 0], "name": "INST_INVALIDATE"}, 12507 {"bits": [1, 1], "name": "DATA_INVALIDATE"}, 12508 {"bits": [2, 2], "name": "INVALIDATE_VOLATILE"} 12509 ] 12510 }, 12511 "SQ_BUF_RSRC_WORD0": { 12512 "fields": [ 12513 {"bits": [0, 31], "name": "BASE_ADDRESS"} 12514 ] 12515 }, 12516 "SQ_BUF_RSRC_WORD1": { 12517 "fields": [ 12518 {"bits": [0, 15], "name": "BASE_ADDRESS_HI"}, 12519 {"bits": [16, 29], "name": "STRIDE"}, 12520 {"bits": [30, 30], "name": "CACHE_SWIZZLE"}, 12521 {"bits": [31, 31], "name": "SWIZZLE_ENABLE"} 12522 ] 12523 }, 12524 "SQ_BUF_RSRC_WORD2": { 12525 "fields": [ 12526 {"bits": [0, 31], "name": "NUM_RECORDS"} 12527 ] 12528 }, 12529 "SQ_BUF_RSRC_WORD3": { 12530 "fields": [ 12531 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"}, 12532 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"}, 12533 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"}, 12534 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"}, 12535 {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"}, 12536 {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"}, 12537 {"bits": [19, 20], "name": "ELEMENT_SIZE"}, 12538 {"bits": [21, 22], "name": "INDEX_STRIDE"}, 12539 {"bits": [23, 23], "name": "ADD_TID_ENABLE"}, 12540 {"bits": [24, 24], "name": "ATC"}, 12541 {"bits": [25, 25], "name": "HASH_ENABLE"}, 12542 {"bits": [26, 26], "name": "HEAP"}, 12543 {"bits": [27, 29], "name": "MTYPE"}, 12544 {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"} 12545 ] 12546 }, 12547 "SQ_IMG_RSRC_WORD1": { 12548 "fields": [ 12549 {"bits": [0, 7], "name": "BASE_ADDRESS_HI"}, 12550 {"bits": [8, 19], "name": "MIN_LOD"}, 12551 {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"}, 12552 {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"}, 12553 {"bits": [30, 31], "name": "MTYPE"} 12554 ] 12555 }, 12556 "SQ_IMG_RSRC_WORD2": { 12557 "fields": [ 12558 {"bits": [0, 13], "name": "WIDTH"}, 12559 {"bits": [14, 27], "name": "HEIGHT"}, 12560 {"bits": [28, 30], "name": "PERF_MOD"}, 12561 {"bits": [31, 31], "name": "INTERLACED"} 12562 ] 12563 }, 12564 "SQ_IMG_RSRC_WORD3": { 12565 "fields": [ 12566 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"}, 12567 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"}, 12568 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"}, 12569 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"}, 12570 {"bits": [12, 15], "name": "BASE_LEVEL"}, 12571 {"bits": [16, 19], "name": "LAST_LEVEL"}, 12572 {"bits": [20, 24], "name": "TILING_INDEX"}, 12573 {"bits": [25, 25], "name": "POW2_PAD"}, 12574 {"bits": [26, 26], "name": "MTYPE"}, 12575 {"bits": [27, 27], "name": "ATC"}, 12576 {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"} 12577 ] 12578 }, 12579 "SQ_IMG_RSRC_WORD4": { 12580 "fields": [ 12581 {"bits": [0, 12], "name": "DEPTH"}, 12582 {"bits": [13, 26], "name": "PITCH"} 12583 ] 12584 }, 12585 "SQ_IMG_RSRC_WORD5": { 12586 "fields": [ 12587 {"bits": [0, 12], "name": "BASE_ARRAY"}, 12588 {"bits": [13, 25], "name": "LAST_ARRAY"} 12589 ] 12590 }, 12591 "SQ_IMG_RSRC_WORD6": { 12592 "fields": [ 12593 {"bits": [0, 11], "name": "MIN_LOD_WARN"}, 12594 {"bits": [12, 19], "name": "COUNTER_BANK_ID"}, 12595 {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"}, 12596 {"bits": [21, 31], "name": "UNUNSED"} 12597 ] 12598 }, 12599 "SQ_IMG_RSRC_WORD7": { 12600 "fields": [ 12601 {"bits": [0, 31], "name": "UNUNSED"} 12602 ] 12603 }, 12604 "SQ_IMG_SAMP_WORD0": { 12605 "fields": [ 12606 {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"}, 12607 {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"}, 12608 {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"}, 12609 {"bits": [9, 11], "name": "MAX_ANISO_RATIO"}, 12610 {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"}, 12611 {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"}, 12612 {"bits": [16, 18], "name": "ANISO_THRESHOLD"}, 12613 {"bits": [19, 19], "name": "MC_COORD_TRUNC"}, 12614 {"bits": [20, 20], "name": "FORCE_DEGAMMA"}, 12615 {"bits": [21, 26], "name": "ANISO_BIAS"}, 12616 {"bits": [27, 27], "name": "TRUNC_COORD"}, 12617 {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"}, 12618 {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"} 12619 ] 12620 }, 12621 "SQ_IMG_SAMP_WORD1": { 12622 "fields": [ 12623 {"bits": [0, 11], "name": "MIN_LOD"}, 12624 {"bits": [12, 23], "name": "MAX_LOD"}, 12625 {"bits": [24, 27], "name": "PERF_MIP"}, 12626 {"bits": [28, 31], "name": "PERF_Z"} 12627 ] 12628 }, 12629 "SQ_IMG_SAMP_WORD2": { 12630 "fields": [ 12631 {"bits": [0, 13], "name": "LOD_BIAS"}, 12632 {"bits": [14, 19], "name": "LOD_BIAS_SEC"}, 12633 {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"}, 12634 {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"}, 12635 {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"}, 12636 {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"}, 12637 {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"}, 12638 {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"}, 12639 {"bits": [30, 30], "name": "FILTER_PREC_FIX"} 12640 ] 12641 }, 12642 "SQ_IMG_SAMP_WORD3": { 12643 "fields": [ 12644 {"bits": [0, 11], "name": "BORDER_COLOR_PTR"}, 12645 {"bits": [29, 29], "name": "UPGRADED_DEPTH"}, 12646 {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"} 12647 ] 12648 }, 12649 "SQ_PERFCOUNTER0_SELECT": { 12650 "fields": [ 12651 {"bits": [0, 7], "name": "PERF_SEL"}, 12652 {"bits": [12, 15], "name": "SQC_BANK_MASK"}, 12653 {"bits": [16, 19], "name": "SQC_CLIENT_MASK"}, 12654 {"bits": [20, 23], "name": "SPM_MODE"}, 12655 {"bits": [24, 27], "name": "SIMD_MASK"}, 12656 {"bits": [28, 31], "name": "PERF_MODE"} 12657 ] 12658 }, 12659 "SQ_PERFCOUNTER_CTRL": { 12660 "fields": [ 12661 {"bits": [0, 0], "name": "PS_EN"}, 12662 {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"}, 12663 {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"}, 12664 {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"}, 12665 {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"}, 12666 {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"}, 12667 {"bits": [6, 6], "name": "CS_EN"}, 12668 {"bits": [8, 12], "name": "CNTR_RATE"}, 12669 {"bits": [13, 13], "name": "DISABLE_FLUSH"} 12670 ] 12671 }, 12672 "SQ_PERFCOUNTER_CTRL2": { 12673 "fields": [ 12674 {"bits": [0, 0], "name": "FORCE_EN"} 12675 ] 12676 }, 12677 "SQ_PERFCOUNTER_MASK": { 12678 "fields": [ 12679 {"bits": [0, 15], "name": "SH0_MASK"}, 12680 {"bits": [16, 31], "name": "SH1_MASK"} 12681 ] 12682 }, 12683 "SQ_THREAD_TRACE_BASE": { 12684 "fields": [ 12685 {"bits": [0, 31], "name": "ADDR"} 12686 ] 12687 }, 12688 "SQ_THREAD_TRACE_BASE2": { 12689 "fields": [ 12690 {"bits": [0, 3], "name": "ADDR_HI"}, 12691 {"bits": [4, 4], "name": "ATC"} 12692 ] 12693 }, 12694 "SQ_THREAD_TRACE_CNTR": { 12695 "fields": [ 12696 {"bits": [0, 31], "name": "CNTR"} 12697 ] 12698 }, 12699 "SQ_THREAD_TRACE_CTRL": { 12700 "fields": [ 12701 {"bits": [31, 31], "name": "RESET_BUFFER"} 12702 ] 12703 }, 12704 "SQ_THREAD_TRACE_HIWATER": { 12705 "fields": [ 12706 {"bits": [0, 2], "name": "HIWATER"} 12707 ] 12708 }, 12709 "SQ_THREAD_TRACE_MASK": { 12710 "fields": [ 12711 {"bits": [0, 4], "name": "CU_SEL"}, 12712 {"bits": [5, 5], "name": "SH_SEL"}, 12713 {"bits": [7, 7], "name": "REG_STALL_EN"}, 12714 {"bits": [8, 11], "name": "SIMD_EN"}, 12715 {"bits": [12, 13], "name": "VM_ID_MASK"}, 12716 {"bits": [14, 14], "name": "SPI_STALL_EN"}, 12717 {"bits": [15, 15], "name": "SQ_STALL_EN"}, 12718 {"bits": [16, 31], "name": "RANDOM_SEED"}, 12719 {"bits": [16, 31], "name": "RANDOM_SEED"} 12720 ] 12721 }, 12722 "SQ_THREAD_TRACE_MODE": { 12723 "fields": [ 12724 {"bits": [0, 2], "name": "MASK_PS"}, 12725 {"bits": [3, 5], "name": "MASK_VS"}, 12726 {"bits": [6, 8], "name": "MASK_GS"}, 12727 {"bits": [9, 11], "name": "MASK_ES"}, 12728 {"bits": [12, 14], "name": "MASK_HS"}, 12729 {"bits": [15, 17], "name": "MASK_LS"}, 12730 {"bits": [18, 20], "name": "MASK_CS"}, 12731 {"bits": [21, 22], "name": "MODE"}, 12732 {"bits": [23, 24], "name": "CAPTURE_MODE"}, 12733 {"bits": [25, 25], "name": "AUTOFLUSH_EN"}, 12734 {"bits": [26, 26], "name": "PRIV"}, 12735 {"bits": [27, 28], "name": "ISSUE_MASK"}, 12736 {"bits": [29, 29], "name": "TEST_MODE"}, 12737 {"bits": [30, 30], "name": "INTERRUPT_EN"}, 12738 {"bits": [31, 31], "name": "WRAP"} 12739 ] 12740 }, 12741 "SQ_THREAD_TRACE_SIZE": { 12742 "fields": [ 12743 {"bits": [0, 21], "name": "SIZE"} 12744 ] 12745 }, 12746 "SQ_THREAD_TRACE_STATUS": { 12747 "fields": [ 12748 {"bits": [0, 9], "name": "FINISH_PENDING"}, 12749 {"bits": [16, 25], "name": "FINISH_DONE"}, 12750 {"bits": [29, 29], "name": "NEW_BUF"}, 12751 {"bits": [30, 30], "name": "BUSY"}, 12752 {"bits": [31, 31], "name": "FULL"} 12753 ] 12754 }, 12755 "SQ_THREAD_TRACE_TOKEN_MASK": { 12756 "fields": [ 12757 {"bits": [0, 15], "name": "TOKEN_MASK"}, 12758 {"bits": [16, 23], "name": "REG_MASK"}, 12759 {"bits": [24, 24], "name": "REG_DROP_ON_STALL"} 12760 ] 12761 }, 12762 "SQ_THREAD_TRACE_TOKEN_MASK2": { 12763 "fields": [ 12764 {"bits": [0, 15], "name": "INST_MASK"} 12765 ] 12766 }, 12767 "SQ_THREAD_TRACE_WPTR": { 12768 "fields": [ 12769 {"bits": [0, 29], "name": "WPTR"}, 12770 {"bits": [30, 31], "name": "READ_OFFSET"} 12771 ] 12772 }, 12773 "SQ_WAVE_EXEC_HI": { 12774 "fields": [ 12775 {"bits": [0, 31], "name": "EXEC_HI"} 12776 ] 12777 }, 12778 "SQ_WAVE_EXEC_LO": { 12779 "fields": [ 12780 {"bits": [0, 31], "name": "EXEC_LO"} 12781 ] 12782 }, 12783 "SQ_WAVE_GPR_ALLOC": { 12784 "fields": [ 12785 {"bits": [0, 5], "name": "VGPR_BASE"}, 12786 {"bits": [8, 13], "name": "VGPR_SIZE"}, 12787 {"bits": [16, 21], "name": "SGPR_BASE"}, 12788 {"bits": [24, 27], "name": "SGPR_SIZE"} 12789 ] 12790 }, 12791 "SQ_WAVE_HW_ID": { 12792 "fields": [ 12793 {"bits": [0, 3], "name": "WAVE_ID"}, 12794 {"bits": [4, 5], "name": "SIMD_ID"}, 12795 {"bits": [6, 7], "name": "PIPE_ID"}, 12796 {"bits": [8, 11], "name": "CU_ID"}, 12797 {"bits": [12, 12], "name": "SH_ID"}, 12798 {"bits": [13, 14], "name": "SE_ID"}, 12799 {"bits": [16, 19], "name": "TG_ID"}, 12800 {"bits": [20, 23], "name": "VM_ID"}, 12801 {"bits": [24, 26], "name": "QUEUE_ID"}, 12802 {"bits": [27, 29], "name": "STATE_ID"}, 12803 {"bits": [30, 31], "name": "ME_ID"} 12804 ] 12805 }, 12806 "SQ_WAVE_IB_DBG0": { 12807 "fields": [ 12808 {"bits": [0, 2], "name": "IBUF_ST"}, 12809 {"bits": [3, 3], "name": "PC_INVALID"}, 12810 {"bits": [4, 4], "name": "NEED_NEXT_DW"}, 12811 {"bits": [5, 7], "name": "NO_PREFETCH_CNT"}, 12812 {"bits": [8, 9], "name": "IBUF_RPTR"}, 12813 {"bits": [10, 11], "name": "IBUF_WPTR"}, 12814 {"bits": [16, 18], "name": "INST_STR_ST"}, 12815 {"bits": [19, 21], "name": "MISC_CNT"}, 12816 {"bits": [22, 23], "name": "ECC_ST"}, 12817 {"bits": [24, 24], "name": "IS_HYB"}, 12818 {"bits": [25, 26], "name": "HYB_CNT"}, 12819 {"bits": [27, 27], "name": "KILL"}, 12820 {"bits": [28, 28], "name": "NEED_KILL_IFETCH"} 12821 ] 12822 }, 12823 "SQ_WAVE_IB_STS": { 12824 "fields": [ 12825 {"bits": [0, 3], "name": "VM_CNT"}, 12826 {"bits": [4, 6], "name": "EXP_CNT"}, 12827 {"bits": [8, 11], "name": "LGKM_CNT"}, 12828 {"bits": [12, 14], "name": "VALU_CNT"} 12829 ] 12830 }, 12831 "SQ_WAVE_INST_DW0": { 12832 "fields": [ 12833 {"bits": [0, 31], "name": "INST_DW0"} 12834 ] 12835 }, 12836 "SQ_WAVE_INST_DW1": { 12837 "fields": [ 12838 {"bits": [0, 31], "name": "INST_DW1"} 12839 ] 12840 }, 12841 "SQ_WAVE_LDS_ALLOC": { 12842 "fields": [ 12843 {"bits": [0, 7], "name": "LDS_BASE"}, 12844 {"bits": [12, 20], "name": "LDS_SIZE"} 12845 ] 12846 }, 12847 "SQ_WAVE_M0": { 12848 "fields": [ 12849 {"bits": [0, 31], "name": "M0"} 12850 ] 12851 }, 12852 "SQ_WAVE_MODE": { 12853 "fields": [ 12854 {"bits": [0, 3], "name": "FP_ROUND"}, 12855 {"bits": [4, 7], "name": "FP_DENORM"}, 12856 {"bits": [8, 8], "name": "DX10_CLAMP"}, 12857 {"bits": [9, 9], "name": "IEEE"}, 12858 {"bits": [10, 10], "name": "LOD_CLAMPED"}, 12859 {"bits": [11, 11], "name": "DEBUG_EN"}, 12860 {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, 12861 {"bits": [28, 28], "name": "VSKIP"}, 12862 {"bits": [29, 31], "name": "CSP"} 12863 ] 12864 }, 12865 "SQ_WAVE_PC_HI": { 12866 "fields": [ 12867 {"bits": [0, 7], "name": "PC_HI"} 12868 ] 12869 }, 12870 "SQ_WAVE_PC_LO": { 12871 "fields": [ 12872 {"bits": [0, 31], "name": "PC_LO"} 12873 ] 12874 }, 12875 "SQ_WAVE_STATUS": { 12876 "fields": [ 12877 {"bits": [0, 0], "name": "SCC"}, 12878 {"bits": [1, 2], "name": "SPI_PRIO"}, 12879 {"bits": [3, 4], "name": "WAVE_PRIO"}, 12880 {"bits": [5, 5], "name": "PRIV"}, 12881 {"bits": [6, 6], "name": "TRAP_EN"}, 12882 {"bits": [7, 7], "name": "TTRACE_EN"}, 12883 {"bits": [8, 8], "name": "EXPORT_RDY"}, 12884 {"bits": [9, 9], "name": "EXECZ"}, 12885 {"bits": [10, 10], "name": "VCCZ"}, 12886 {"bits": [11, 11], "name": "IN_TG"}, 12887 {"bits": [12, 12], "name": "IN_BARRIER"}, 12888 {"bits": [13, 13], "name": "HALT"}, 12889 {"bits": [14, 14], "name": "TRAP"}, 12890 {"bits": [15, 15], "name": "TTRACE_CU_EN"}, 12891 {"bits": [16, 16], "name": "VALID"}, 12892 {"bits": [17, 17], "name": "ECC_ERR"}, 12893 {"bits": [18, 18], "name": "SKIP_EXPORT"}, 12894 {"bits": [19, 19], "name": "PERF_EN"}, 12895 {"bits": [20, 20], "name": "COND_DBG_USER"}, 12896 {"bits": [21, 21], "name": "COND_DBG_SYS"}, 12897 {"bits": [22, 22], "name": "DATA_ATC"}, 12898 {"bits": [23, 23], "name": "INST_ATC"}, 12899 {"bits": [24, 26], "name": "DISPATCH_CACHE_CTRL"}, 12900 {"bits": [27, 27], "name": "MUST_EXPORT"} 12901 ] 12902 }, 12903 "SQ_WAVE_TBA_HI": { 12904 "fields": [ 12905 {"bits": [0, 7], "name": "ADDR_HI"} 12906 ] 12907 }, 12908 "SQ_WAVE_TBA_LO": { 12909 "fields": [ 12910 {"bits": [0, 31], "name": "ADDR_LO"} 12911 ] 12912 }, 12913 "SQ_WAVE_TRAPSTS": { 12914 "fields": [ 12915 {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"}, 12916 {"bits": [16, 21], "name": "EXCP_CYCLE"}, 12917 {"bits": [29, 31], "name": "DP_RATE"} 12918 ] 12919 }, 12920 "SX_PERFCOUNTER0_SELECT": { 12921 "fields": [ 12922 {"bits": [0, 9], "name": "PERFCOUNTER_SELECT"}, 12923 {"bits": [10, 19], "name": "PERFCOUNTER_SELECT1"}, 12924 {"bits": [20, 23], "name": "CNTR_MODE"} 12925 ] 12926 }, 12927 "SX_PERFCOUNTER0_SELECT1": { 12928 "fields": [ 12929 {"bits": [0, 9], "name": "PERFCOUNTER_SELECT2"}, 12930 {"bits": [10, 19], "name": "PERFCOUNTER_SELECT3"} 12931 ] 12932 }, 12933 "TA_BC_BASE_ADDR": { 12934 "fields": [ 12935 {"bits": [0, 31], "name": "ADDRESS"} 12936 ] 12937 }, 12938 "TA_BC_BASE_ADDR_HI": { 12939 "fields": [ 12940 {"bits": [0, 7], "name": "ADDRESS"} 12941 ] 12942 }, 12943 "TCC_PERFCOUNTER0_SELECT1": { 12944 "fields": [ 12945 {"bits": [0, 9], "name": "PERF_SEL2"}, 12946 {"bits": [10, 19], "name": "PERF_SEL3"}, 12947 {"bits": [24, 27], "name": "PERF_MODE2"}, 12948 {"bits": [28, 31], "name": "PERF_MODE3"} 12949 ] 12950 }, 12951 "TCC_PERFCOUNTER2_SELECT": { 12952 "fields": [ 12953 {"bits": [0, 9], "name": "PERF_SEL"}, 12954 {"bits": [20, 23], "name": "CNTR_MODE"}, 12955 {"bits": [28, 31], "name": "PERF_MODE"} 12956 ] 12957 }, 12958 "TD_PERFCOUNTER0_SELECT": { 12959 "fields": [ 12960 {"bits": [0, 7], "name": "PERF_SEL"}, 12961 {"bits": [10, 17], "name": "PERF_SEL1"}, 12962 {"bits": [20, 23], "name": "CNTR_MODE"}, 12963 {"bits": [24, 27], "name": "PERF_MODE1"}, 12964 {"bits": [28, 31], "name": "PERF_MODE"} 12965 ] 12966 }, 12967 "TD_PERFCOUNTER0_SELECT1": { 12968 "fields": [ 12969 {"bits": [0, 7], "name": "PERF_SEL2"}, 12970 {"bits": [10, 17], "name": "PERF_SEL3"}, 12971 {"bits": [24, 27], "name": "PERF_MODE3"}, 12972 {"bits": [28, 31], "name": "PERF_MODE2"} 12973 ] 12974 }, 12975 "VGT_DISPATCH_DRAW_INDEX": { 12976 "fields": [ 12977 {"bits": [0, 31], "name": "MATCH_INDEX"} 12978 ] 12979 }, 12980 "VGT_DMA_BASE": { 12981 "fields": [ 12982 {"bits": [0, 31], "name": "BASE_ADDR"} 12983 ] 12984 }, 12985 "VGT_DMA_BASE_HI": { 12986 "fields": [ 12987 {"bits": [0, 7], "name": "BASE_ADDR"} 12988 ] 12989 }, 12990 "VGT_DMA_INDEX_TYPE": { 12991 "fields": [ 12992 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}, 12993 {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"}, 12994 {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"}, 12995 {"bits": [6, 7], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}, 12996 {"bits": [8, 8], "name": "ATC"}, 12997 {"bits": [9, 9], "name": "NOT_EOP"}, 12998 {"bits": [10, 10], "name": "REQ_PATH"} 12999 ] 13000 }, 13001 "VGT_DMA_MAX_SIZE": { 13002 "fields": [ 13003 {"bits": [0, 31], "name": "MAX_SIZE"} 13004 ] 13005 }, 13006 "VGT_DMA_NUM_INSTANCES": { 13007 "fields": [ 13008 {"bits": [0, 31], "name": "NUM_INSTANCES"} 13009 ] 13010 }, 13011 "VGT_DMA_SIZE": { 13012 "fields": [ 13013 {"bits": [0, 31], "name": "NUM_INDICES"} 13014 ] 13015 }, 13016 "VGT_DRAW_INITIATOR": { 13017 "fields": [ 13018 {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"}, 13019 {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"}, 13020 {"bits": [4, 4], "name": "SPRITE_EN_R6XX"}, 13021 {"bits": [5, 5], "name": "NOT_EOP"}, 13022 {"bits": [6, 6], "name": "USE_OPAQUE"} 13023 ] 13024 }, 13025 "VGT_ESGS_RING_ITEMSIZE": { 13026 "fields": [ 13027 {"bits": [0, 14], "name": "ITEMSIZE"} 13028 ] 13029 }, 13030 "VGT_ESGS_RING_SIZE": { 13031 "fields": [ 13032 {"bits": [0, 31], "name": "MEM_SIZE"} 13033 ] 13034 }, 13035 "VGT_ES_PER_GS": { 13036 "fields": [ 13037 {"bits": [0, 10], "name": "ES_PER_GS"} 13038 ] 13039 }, 13040 "VGT_EVENT_ADDRESS_REG": { 13041 "fields": [ 13042 {"bits": [0, 27], "name": "ADDRESS_LOW"} 13043 ] 13044 }, 13045 "VGT_EVENT_INITIATOR": { 13046 "fields": [ 13047 {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"}, 13048 {"bits": [18, 26], "name": "ADDRESS_HI"}, 13049 {"bits": [27, 27], "name": "EXTENDED_EVENT"} 13050 ] 13051 }, 13052 "VGT_GROUP_DECR": { 13053 "fields": [ 13054 {"bits": [0, 3], "name": "DECR"} 13055 ] 13056 }, 13057 "VGT_GROUP_FIRST_DECR": { 13058 "fields": [ 13059 {"bits": [0, 3], "name": "FIRST_DECR"} 13060 ] 13061 }, 13062 "VGT_GROUP_PRIM_TYPE": { 13063 "fields": [ 13064 {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}, 13065 {"bits": [14, 14], "name": "RETAIN_ORDER"}, 13066 {"bits": [15, 15], "name": "RETAIN_QUADS"}, 13067 {"bits": [16, 18], "name": "PRIM_ORDER"} 13068 ] 13069 }, 13070 "VGT_GROUP_VECT_0_CNTL": { 13071 "fields": [ 13072 {"bits": [0, 0], "name": "COMP_X_EN"}, 13073 {"bits": [1, 1], "name": "COMP_Y_EN"}, 13074 {"bits": [2, 2], "name": "COMP_Z_EN"}, 13075 {"bits": [3, 3], "name": "COMP_W_EN"}, 13076 {"bits": [8, 15], "name": "STRIDE"}, 13077 {"bits": [16, 23], "name": "SHIFT"} 13078 ] 13079 }, 13080 "VGT_GROUP_VECT_0_FMT_CNTL": { 13081 "fields": [ 13082 {"bits": [0, 3], "name": "X_CONV"}, 13083 {"bits": [4, 7], "name": "X_OFFSET"}, 13084 {"bits": [8, 11], "name": "Y_CONV"}, 13085 {"bits": [12, 15], "name": "Y_OFFSET"}, 13086 {"bits": [16, 19], "name": "Z_CONV"}, 13087 {"bits": [20, 23], "name": "Z_OFFSET"}, 13088 {"bits": [24, 27], "name": "W_CONV"}, 13089 {"bits": [28, 31], "name": "W_OFFSET"} 13090 ] 13091 }, 13092 "VGT_GSVS_RING_OFFSET_1": { 13093 "fields": [ 13094 {"bits": [0, 14], "name": "OFFSET"} 13095 ] 13096 }, 13097 "VGT_GS_INSTANCE_CNT": { 13098 "fields": [ 13099 {"bits": [0, 0], "name": "ENABLE"}, 13100 {"bits": [2, 8], "name": "CNT"} 13101 ] 13102 }, 13103 "VGT_GS_MAX_VERT_OUT": { 13104 "fields": [ 13105 {"bits": [0, 10], "name": "MAX_VERT_OUT"} 13106 ] 13107 }, 13108 "VGT_GS_MODE": { 13109 "fields": [ 13110 {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"}, 13111 {"bits": [3, 3], "name": "RESERVED_0"}, 13112 {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"}, 13113 {"bits": [6, 10], "name": "RESERVED_1"}, 13114 {"bits": [11, 11], "name": "GS_C_PACK_EN"}, 13115 {"bits": [12, 12], "name": "RESERVED_2"}, 13116 {"bits": [13, 13], "name": "ES_PASSTHRU"}, 13117 {"bits": [14, 14], "name": "COMPUTE_MODE"}, 13118 {"bits": [15, 15], "name": "FAST_COMPUTE_MODE"}, 13119 {"bits": [16, 16], "name": "ELEMENT_INFO_EN"}, 13120 {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"}, 13121 {"bits": [18, 18], "name": "SUPPRESS_CUTS"}, 13122 {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"}, 13123 {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"}, 13124 {"bits": [21, 22], "name": "ONCHIP"} 13125 ] 13126 }, 13127 "VGT_GS_ONCHIP_CNTL": { 13128 "fields": [ 13129 {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"}, 13130 {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"} 13131 ] 13132 }, 13133 "VGT_GS_OUT_PRIM_TYPE": { 13134 "fields": [ 13135 {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"}, 13136 {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"}, 13137 {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"}, 13138 {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"}, 13139 {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"} 13140 ] 13141 }, 13142 "VGT_GS_PER_ES": { 13143 "fields": [ 13144 {"bits": [0, 10], "name": "GS_PER_ES"} 13145 ] 13146 }, 13147 "VGT_GS_PER_VS": { 13148 "fields": [ 13149 {"bits": [0, 3], "name": "GS_PER_VS"} 13150 ] 13151 }, 13152 "VGT_HOS_CNTL": { 13153 "fields": [ 13154 {"bits": [0, 1], "name": "TESS_MODE"} 13155 ] 13156 }, 13157 "VGT_HOS_MAX_TESS_LEVEL": { 13158 "fields": [ 13159 {"bits": [0, 31], "name": "MAX_TESS"} 13160 ] 13161 }, 13162 "VGT_HOS_MIN_TESS_LEVEL": { 13163 "fields": [ 13164 {"bits": [0, 31], "name": "MIN_TESS"} 13165 ] 13166 }, 13167 "VGT_HOS_REUSE_DEPTH": { 13168 "fields": [ 13169 {"bits": [0, 7], "name": "REUSE_DEPTH"} 13170 ] 13171 }, 13172 "VGT_HS_OFFCHIP_PARAM": { 13173 "fields": [ 13174 {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"}, 13175 {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"} 13176 ] 13177 }, 13178 "VGT_INDEX_TYPE": { 13179 "fields": [ 13180 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"} 13181 ] 13182 }, 13183 "VGT_INDX_OFFSET": { 13184 "fields": [ 13185 {"bits": [0, 31], "name": "INDX_OFFSET"} 13186 ] 13187 }, 13188 "VGT_INSTANCE_STEP_RATE_0": { 13189 "fields": [ 13190 {"bits": [0, 31], "name": "STEP_RATE"} 13191 ] 13192 }, 13193 "VGT_LS_HS_CONFIG": { 13194 "fields": [ 13195 {"bits": [0, 7], "name": "NUM_PATCHES"}, 13196 {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"}, 13197 {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"} 13198 ] 13199 }, 13200 "VGT_MAX_VTX_INDX": { 13201 "fields": [ 13202 {"bits": [0, 31], "name": "MAX_INDX"} 13203 ] 13204 }, 13205 "VGT_MIN_VTX_INDX": { 13206 "fields": [ 13207 {"bits": [0, 31], "name": "MIN_INDX"} 13208 ] 13209 }, 13210 "VGT_MULTI_PRIM_IB_RESET_EN": { 13211 "fields": [ 13212 {"bits": [0, 0], "name": "RESET_EN"} 13213 ] 13214 }, 13215 "VGT_MULTI_PRIM_IB_RESET_INDX": { 13216 "fields": [ 13217 {"bits": [0, 31], "name": "RESET_INDX"} 13218 ] 13219 }, 13220 "VGT_OUTPUT_PATH_CNTL": { 13221 "fields": [ 13222 {"bits": [0, 2], "name": "PATH_SELECT"} 13223 ] 13224 }, 13225 "VGT_OUT_DEALLOC_CNTL": { 13226 "fields": [ 13227 {"bits": [0, 6], "name": "DEALLOC_DIST"} 13228 ] 13229 }, 13230 "VGT_PERFCOUNTER2_SELECT": { 13231 "fields": [ 13232 {"bits": [0, 7], "name": "PERF_SEL"}, 13233 {"bits": [28, 31], "name": "PERF_MODE"} 13234 ] 13235 }, 13236 "VGT_PERFCOUNTER_SEID_MASK": { 13237 "fields": [ 13238 {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"} 13239 ] 13240 }, 13241 "VGT_PRIMITIVEID_EN": { 13242 "fields": [ 13243 {"bits": [0, 0], "name": "PRIMITIVEID_EN"}, 13244 {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"} 13245 ] 13246 }, 13247 "VGT_PRIMITIVEID_RESET": { 13248 "fields": [ 13249 {"bits": [0, 31], "name": "VALUE"} 13250 ] 13251 }, 13252 "VGT_PRIMITIVE_TYPE": { 13253 "fields": [ 13254 {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"} 13255 ] 13256 }, 13257 "VGT_REUSE_OFF": { 13258 "fields": [ 13259 {"bits": [0, 0], "name": "REUSE_OFF"} 13260 ] 13261 }, 13262 "VGT_SHADER_STAGES_EN": { 13263 "fields": [ 13264 {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"}, 13265 {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"}, 13266 {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"}, 13267 {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"}, 13268 {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"}, 13269 {"bits": [8, 8], "name": "DYNAMIC_HS"} 13270 ] 13271 }, 13272 "VGT_STRMOUT_BUFFER_CONFIG": { 13273 "fields": [ 13274 {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"}, 13275 {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"}, 13276 {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"}, 13277 {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"} 13278 ] 13279 }, 13280 "VGT_STRMOUT_CONFIG": { 13281 "fields": [ 13282 {"bits": [0, 0], "name": "STREAMOUT_0_EN"}, 13283 {"bits": [1, 1], "name": "STREAMOUT_1_EN"}, 13284 {"bits": [2, 2], "name": "STREAMOUT_2_EN"}, 13285 {"bits": [3, 3], "name": "STREAMOUT_3_EN"}, 13286 {"bits": [4, 6], "name": "RAST_STREAM"}, 13287 {"bits": [8, 11], "name": "RAST_STREAM_MASK"}, 13288 {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"} 13289 ] 13290 }, 13291 "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE": { 13292 "fields": [ 13293 {"bits": [0, 8], "name": "VERTEX_STRIDE"} 13294 ] 13295 }, 13296 "VGT_STRMOUT_VTX_STRIDE_0": { 13297 "fields": [ 13298 {"bits": [0, 9], "name": "STRIDE"} 13299 ] 13300 }, 13301 "VGT_TF_MEMORY_BASE": { 13302 "fields": [ 13303 {"bits": [0, 31], "name": "BASE"} 13304 ] 13305 }, 13306 "VGT_TF_PARAM": { 13307 "fields": [ 13308 {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"}, 13309 {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"}, 13310 {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"}, 13311 {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"}, 13312 {"bits": [9, 9], "name": "DEPRECATED"}, 13313 {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"}, 13314 {"bits": [14, 14], "name": "DISABLE_DONUTS"}, 13315 {"bits": [15, 16], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"} 13316 ] 13317 }, 13318 "VGT_TF_RING_SIZE": { 13319 "fields": [ 13320 {"bits": [0, 15], "name": "SIZE"} 13321 ] 13322 }, 13323 "VGT_VERTEX_REUSE_BLOCK_CNTL": { 13324 "fields": [ 13325 {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"} 13326 ] 13327 }, 13328 "VGT_VTX_CNT_EN": { 13329 "fields": [ 13330 {"bits": [0, 0], "name": "VTX_CNT_EN"} 13331 ] 13332 } 13333 } 13334} 13335