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1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|*                                                                            *|
3|* Calling Convention Implementation Fragment                                 *|
4|*                                                                            *|
5|* Automatically generated file, do not edit!                                 *|
6|*                                                                            *|
7\*===----------------------------------------------------------------------===*/
8
9bool llvm::CC_PPC32_SVR4(unsigned ValNo, MVT ValVT,
10                         MVT LocVT, CCValAssign::LocInfo LocInfo,
11                         ISD::ArgFlagsTy ArgFlags, CCState &State);
12bool llvm::CC_PPC32_SVR4_ByVal(unsigned ValNo, MVT ValVT,
13                               MVT LocVT, CCValAssign::LocInfo LocInfo,
14                               ISD::ArgFlagsTy ArgFlags, CCState &State);
15static bool CC_PPC32_SVR4_Common(unsigned ValNo, MVT ValVT,
16                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
17                                 ISD::ArgFlagsTy ArgFlags, CCState &State);
18bool llvm::CC_PPC32_SVR4_VarArg(unsigned ValNo, MVT ValVT,
19                                MVT LocVT, CCValAssign::LocInfo LocInfo,
20                                ISD::ArgFlagsTy ArgFlags, CCState &State);
21static bool CC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
22                            MVT LocVT, CCValAssign::LocInfo LocInfo,
23                            ISD::ArgFlagsTy ArgFlags, CCState &State);
24bool llvm::CC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
25                            MVT LocVT, CCValAssign::LocInfo LocInfo,
26                            ISD::ArgFlagsTy ArgFlags, CCState &State);
27bool llvm::RetCC_PPC(unsigned ValNo, MVT ValVT,
28                     MVT LocVT, CCValAssign::LocInfo LocInfo,
29                     ISD::ArgFlagsTy ArgFlags, CCState &State);
30static bool RetCC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
31                               MVT LocVT, CCValAssign::LocInfo LocInfo,
32                               ISD::ArgFlagsTy ArgFlags, CCState &State);
33bool llvm::RetCC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
34                               MVT LocVT, CCValAssign::LocInfo LocInfo,
35                               ISD::ArgFlagsTy ArgFlags, CCState &State);
36bool llvm::RetCC_PPC_Cold(unsigned ValNo, MVT ValVT,
37                          MVT LocVT, CCValAssign::LocInfo LocInfo,
38                          ISD::ArgFlagsTy ArgFlags, CCState &State);
39
40
41bool llvm::CC_PPC32_SVR4(unsigned ValNo, MVT ValVT,
42                         MVT LocVT, CCValAssign::LocInfo LocInfo,
43                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
44
45  if (LocVT == MVT::v4f64 ||
46      LocVT == MVT::v4f32 ||
47      LocVT == MVT::v4i1) {
48    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
49      static const MCPhysReg RegList1[] = {
50        PPC::QF1, PPC::QF2, PPC::QF3, PPC::QF4, PPC::QF5, PPC::QF6, PPC::QF7, PPC::QF8
51      };
52      if (unsigned Reg = State.AllocateReg(RegList1)) {
53        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
54        return false;
55      }
56    }
57  }
58
59  if (LocVT == MVT::v16i8 ||
60      LocVT == MVT::v8i16 ||
61      LocVT == MVT::v4i32 ||
62      LocVT == MVT::v2i64 ||
63      LocVT == MVT::v1i128 ||
64      LocVT == MVT::v4f32 ||
65      LocVT == MVT::v2f64) {
66    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
67      static const MCPhysReg RegList2[] = {
68        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
69      };
70      if (unsigned Reg = State.AllocateReg(RegList2)) {
71        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
72        return false;
73      }
74    }
75  }
76
77  if (LocVT == MVT::f128) {
78    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
79      static const MCPhysReg RegList3[] = {
80        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
81      };
82      if (unsigned Reg = State.AllocateReg(RegList3)) {
83        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
84        return false;
85      }
86    }
87  }
88
89  if (!CC_PPC32_SVR4_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
90    return false;
91
92  return true;  // CC didn't match.
93}
94
95
96bool llvm::CC_PPC32_SVR4_ByVal(unsigned ValNo, MVT ValVT,
97                               MVT LocVT, CCValAssign::LocInfo LocInfo,
98                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
99
100  if (ArgFlags.isByVal()) {
101    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
102    return false;
103  }
104
105  if (CC_PPC32_SVR4_Custom_Dummy(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
106    return false;
107
108  return true;  // CC didn't match.
109}
110
111
112static bool CC_PPC32_SVR4_Common(unsigned ValNo, MVT ValVT,
113                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
114                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
115
116  if (LocVT == MVT::i1) {
117    LocVT = MVT::i32;
118    if (ArgFlags.isSExt())
119        LocInfo = CCValAssign::SExt;
120    else if (ArgFlags.isZExt())
121        LocInfo = CCValAssign::ZExt;
122    else
123        LocInfo = CCValAssign::AExt;
124  }
125
126  if (LocVT == MVT::i32) {
127    if (ArgFlags.isSplit()) {
128      if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
129        if (!static_cast<PPCCCState *>(&State)->WasOriginalArgPPCF128(ValNo)) {
130          if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
131                    return false;
132        }
133      }
134    }
135  }
136
137  if (LocVT == MVT::i32) {
138    if (ArgFlags.isSplit()) {
139      if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
140        if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
141                return false;
142      }
143    }
144  }
145
146  if (LocVT == MVT::f64) {
147    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
148      if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
149            return false;
150    }
151  }
152
153  if (ArgFlags.isSplit()) {
154    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
155      if (static_cast<PPCCCState *>(&State)->WasOriginalArgPPCF128(ValNo)) {
156        if (CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
157                return false;
158      }
159    }
160  }
161
162  if (ArgFlags.isNest()) {
163    if (unsigned Reg = State.AllocateReg(PPC::R11)) {
164      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
165      return false;
166    }
167  }
168
169  if (LocVT == MVT::i32) {
170    static const MCPhysReg RegList1[] = {
171      PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
172    };
173    if (unsigned Reg = State.AllocateReg(RegList1)) {
174      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
175      return false;
176    }
177  }
178
179  if (LocVT == MVT::f64) {
180    if (ArgFlags.isSplit()) {
181      if (CC_PPC32_SVR4_Custom_AlignFPArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
182            return false;
183    }
184  }
185
186  if (LocVT == MVT::f32 ||
187      LocVT == MVT::f64) {
188    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
189      static const MCPhysReg RegList2[] = {
190        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
191      };
192      if (unsigned Reg = State.AllocateReg(RegList2)) {
193        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
194        return false;
195      }
196    }
197  }
198
199  if (LocVT == MVT::f64) {
200    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
201      if (CC_PPC32_SPE_CustomSplitFP64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
202            return false;
203    }
204  }
205
206  if (LocVT == MVT::f32) {
207    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
208      static const MCPhysReg RegList3[] = {
209        PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
210      };
211      if (unsigned Reg = State.AllocateReg(RegList3)) {
212        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
213        return false;
214      }
215    }
216  }
217
218  if (LocVT == MVT::i32) {
219    if (ArgFlags.isSplit()) {
220      unsigned Offset4 = State.AllocateStack(4, 8);
221      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
222      return false;
223    }
224  }
225
226  if (LocVT == MVT::i32) {
227    unsigned Offset5 = State.AllocateStack(4, 4);
228    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
229    return false;
230  }
231
232  if (LocVT == MVT::f32 ||
233      LocVT == MVT::f64) {
234    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
235      unsigned Offset6 = State.AllocateStack(8, 8);
236      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
237      return false;
238    }
239  }
240
241  if (LocVT == MVT::f32) {
242    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
243      unsigned Offset7 = State.AllocateStack(4, 4);
244      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
245      return false;
246    }
247  }
248
249  if (LocVT == MVT::f64) {
250    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
251      unsigned Offset8 = State.AllocateStack(8, 8);
252      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
253      return false;
254    }
255  }
256
257  if (LocVT == MVT::v4f64 ||
258      LocVT == MVT::v4i1) {
259    unsigned Offset9 = State.AllocateStack(32, 32);
260    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
261    return false;
262  }
263
264  if (LocVT == MVT::v16i8 ||
265      LocVT == MVT::v8i16 ||
266      LocVT == MVT::v4i32 ||
267      LocVT == MVT::v4f32 ||
268      LocVT == MVT::v2f64 ||
269      LocVT == MVT::v2i64) {
270    unsigned Offset10 = State.AllocateStack(16, 16);
271    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
272    return false;
273  }
274
275  if (LocVT == MVT::f128) {
276    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
277      unsigned Offset11 = State.AllocateStack(16, 16);
278      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
279      return false;
280    }
281  }
282
283  return true;  // CC didn't match.
284}
285
286
287bool llvm::CC_PPC32_SVR4_VarArg(unsigned ValNo, MVT ValVT,
288                                MVT LocVT, CCValAssign::LocInfo LocInfo,
289                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
290
291  if (!CC_PPC32_SVR4_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
292    return false;
293
294  return true;  // CC didn't match.
295}
296
297
298static bool CC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
299                            MVT LocVT, CCValAssign::LocInfo LocInfo,
300                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
301
302  if (CC_PPC_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
303    return false;
304
305  return true;  // CC didn't match.
306}
307
308
309bool llvm::CC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
310                            MVT LocVT, CCValAssign::LocInfo LocInfo,
311                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
312
313  if (State.getCallingConv() == CallingConv::AnyReg) {
314    if (!CC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
315      return false;
316  }
317
318  if (LocVT == MVT::i1) {
319    LocVT = MVT::i64;
320    if (ArgFlags.isSExt())
321        LocInfo = CCValAssign::SExt;
322    else if (ArgFlags.isZExt())
323        LocInfo = CCValAssign::ZExt;
324    else
325        LocInfo = CCValAssign::AExt;
326  }
327
328  if (LocVT == MVT::i8) {
329    LocVT = MVT::i64;
330    if (ArgFlags.isSExt())
331        LocInfo = CCValAssign::SExt;
332    else if (ArgFlags.isZExt())
333        LocInfo = CCValAssign::ZExt;
334    else
335        LocInfo = CCValAssign::AExt;
336  }
337
338  if (LocVT == MVT::i16) {
339    LocVT = MVT::i64;
340    if (ArgFlags.isSExt())
341        LocInfo = CCValAssign::SExt;
342    else if (ArgFlags.isZExt())
343        LocInfo = CCValAssign::ZExt;
344    else
345        LocInfo = CCValAssign::AExt;
346  }
347
348  if (LocVT == MVT::i32) {
349    LocVT = MVT::i64;
350    if (ArgFlags.isSExt())
351        LocInfo = CCValAssign::SExt;
352    else if (ArgFlags.isZExt())
353        LocInfo = CCValAssign::ZExt;
354    else
355        LocInfo = CCValAssign::AExt;
356  }
357
358  if (LocVT == MVT::i64) {
359    static const MCPhysReg RegList1[] = {
360      PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10
361    };
362    if (unsigned Reg = State.AllocateReg(RegList1)) {
363      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
364      return false;
365    }
366  }
367
368  if (LocVT == MVT::f32 ||
369      LocVT == MVT::f64) {
370    static const MCPhysReg RegList2[] = {
371      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
372    };
373    if (unsigned Reg = State.AllocateReg(RegList2)) {
374      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
375      return false;
376    }
377  }
378
379  return true;  // CC didn't match.
380}
381
382
383bool llvm::RetCC_PPC(unsigned ValNo, MVT ValVT,
384                     MVT LocVT, CCValAssign::LocInfo LocInfo,
385                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
386
387  if (State.getCallingConv() == CallingConv::AnyReg) {
388    if (!RetCC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
389      return false;
390  }
391
392  if (LocVT == MVT::i32 ||
393      LocVT == MVT::i1) {
394    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
395      LocVT = MVT::i64;
396      if (ArgFlags.isSExt())
397            LocInfo = CCValAssign::SExt;
398      else if (ArgFlags.isZExt())
399            LocInfo = CCValAssign::ZExt;
400      else
401            LocInfo = CCValAssign::AExt;
402    }
403  }
404
405  if (LocVT == MVT::i1) {
406    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
407      LocVT = MVT::i32;
408      if (ArgFlags.isSExt())
409            LocInfo = CCValAssign::SExt;
410      else if (ArgFlags.isZExt())
411            LocInfo = CCValAssign::ZExt;
412      else
413            LocInfo = CCValAssign::AExt;
414    }
415  }
416
417  if (LocVT == MVT::i32) {
418    static const MCPhysReg RegList1[] = {
419      PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
420    };
421    if (unsigned Reg = State.AllocateReg(RegList1)) {
422      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
423      return false;
424    }
425  }
426
427  if (LocVT == MVT::i64) {
428    static const MCPhysReg RegList2[] = {
429      PPC::X3, PPC::X4, PPC::X5, PPC::X6
430    };
431    if (unsigned Reg = State.AllocateReg(RegList2)) {
432      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
433      return false;
434    }
435  }
436
437  if (LocVT == MVT::i128) {
438    static const MCPhysReg RegList3[] = {
439      PPC::X3, PPC::X4, PPC::X5, PPC::X6
440    };
441    if (unsigned Reg = State.AllocateReg(RegList3)) {
442      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
443      return false;
444    }
445  }
446
447  if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
448    if (LocVT == MVT::f32) {
449      static const MCPhysReg RegList4[] = {
450        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
451      };
452      if (unsigned Reg = State.AllocateReg(RegList4)) {
453        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
454        return false;
455      }
456    }
457  }
458
459  if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
460    if (LocVT == MVT::f64) {
461      static const MCPhysReg RegList5[] = {
462        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
463      };
464      if (unsigned Reg = State.AllocateReg(RegList5)) {
465        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
466        return false;
467      }
468    }
469  }
470
471  if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
472    if (LocVT == MVT::f32) {
473      static const MCPhysReg RegList6[] = {
474        PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
475      };
476      if (unsigned Reg = State.AllocateReg(RegList6)) {
477        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
478        return false;
479      }
480    }
481  }
482
483  if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
484    if (LocVT == MVT::f64) {
485      if (CC_PPC32_SPE_RetF64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
486            return false;
487    }
488  }
489
490  if (LocVT == MVT::f128) {
491    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
492      static const MCPhysReg RegList7[] = {
493        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
494      };
495      if (unsigned Reg = State.AllocateReg(RegList7)) {
496        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
497        return false;
498      }
499    }
500  }
501
502  if (LocVT == MVT::v4f64 ||
503      LocVT == MVT::v4f32 ||
504      LocVT == MVT::v4i1) {
505    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
506      static const MCPhysReg RegList8[] = {
507        PPC::QF1, PPC::QF2
508      };
509      if (unsigned Reg = State.AllocateReg(RegList8)) {
510        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
511        return false;
512      }
513    }
514  }
515
516  if (LocVT == MVT::v16i8 ||
517      LocVT == MVT::v8i16 ||
518      LocVT == MVT::v4i32 ||
519      LocVT == MVT::v2i64 ||
520      LocVT == MVT::v1i128 ||
521      LocVT == MVT::v4f32 ||
522      LocVT == MVT::v2f64) {
523    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
524      static const MCPhysReg RegList9[] = {
525        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
526      };
527      if (unsigned Reg = State.AllocateReg(RegList9)) {
528        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
529        return false;
530      }
531    }
532  }
533
534  return true;  // CC didn't match.
535}
536
537
538static bool RetCC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
539                               MVT LocVT, CCValAssign::LocInfo LocInfo,
540                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
541
542  if (CC_PPC_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
543    return false;
544
545  return true;  // CC didn't match.
546}
547
548
549bool llvm::RetCC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
550                               MVT LocVT, CCValAssign::LocInfo LocInfo,
551                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
552
553  if (State.getCallingConv() == CallingConv::AnyReg) {
554    if (!RetCC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
555      return false;
556  }
557
558  if (LocVT == MVT::i1) {
559    LocVT = MVT::i64;
560    if (ArgFlags.isSExt())
561        LocInfo = CCValAssign::SExt;
562    else if (ArgFlags.isZExt())
563        LocInfo = CCValAssign::ZExt;
564    else
565        LocInfo = CCValAssign::AExt;
566  }
567
568  if (LocVT == MVT::i8) {
569    LocVT = MVT::i64;
570    if (ArgFlags.isSExt())
571        LocInfo = CCValAssign::SExt;
572    else if (ArgFlags.isZExt())
573        LocInfo = CCValAssign::ZExt;
574    else
575        LocInfo = CCValAssign::AExt;
576  }
577
578  if (LocVT == MVT::i16) {
579    LocVT = MVT::i64;
580    if (ArgFlags.isSExt())
581        LocInfo = CCValAssign::SExt;
582    else if (ArgFlags.isZExt())
583        LocInfo = CCValAssign::ZExt;
584    else
585        LocInfo = CCValAssign::AExt;
586  }
587
588  if (LocVT == MVT::i32) {
589    LocVT = MVT::i64;
590    if (ArgFlags.isSExt())
591        LocInfo = CCValAssign::SExt;
592    else if (ArgFlags.isZExt())
593        LocInfo = CCValAssign::ZExt;
594    else
595        LocInfo = CCValAssign::AExt;
596  }
597
598  if (LocVT == MVT::i64) {
599    static const MCPhysReg RegList1[] = {
600      PPC::X3, PPC::X4, PPC::X5, PPC::X6
601    };
602    if (unsigned Reg = State.AllocateReg(RegList1)) {
603      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
604      return false;
605    }
606  }
607
608  if (LocVT == MVT::i128) {
609    static const MCPhysReg RegList2[] = {
610      PPC::X3, PPC::X4, PPC::X5, PPC::X6
611    };
612    if (unsigned Reg = State.AllocateReg(RegList2)) {
613      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
614      return false;
615    }
616  }
617
618  if (LocVT == MVT::f32) {
619    static const MCPhysReg RegList3[] = {
620      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
621    };
622    if (unsigned Reg = State.AllocateReg(RegList3)) {
623      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
624      return false;
625    }
626  }
627
628  if (LocVT == MVT::f64) {
629    static const MCPhysReg RegList4[] = {
630      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
631    };
632    if (unsigned Reg = State.AllocateReg(RegList4)) {
633      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
634      return false;
635    }
636  }
637
638  if (LocVT == MVT::f128) {
639    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
640      static const MCPhysReg RegList5[] = {
641        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
642      };
643      if (unsigned Reg = State.AllocateReg(RegList5)) {
644        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
645        return false;
646      }
647    }
648  }
649
650  if (LocVT == MVT::v4f64 ||
651      LocVT == MVT::v4f32 ||
652      LocVT == MVT::v4i1) {
653    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
654      static const MCPhysReg RegList6[] = {
655        PPC::QF1, PPC::QF2
656      };
657      if (unsigned Reg = State.AllocateReg(RegList6)) {
658        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
659        return false;
660      }
661    }
662  }
663
664  if (LocVT == MVT::v16i8 ||
665      LocVT == MVT::v8i16 ||
666      LocVT == MVT::v4i32 ||
667      LocVT == MVT::v2i64 ||
668      LocVT == MVT::v1i128 ||
669      LocVT == MVT::v4f32 ||
670      LocVT == MVT::v2f64) {
671    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
672      static const MCPhysReg RegList7[] = {
673        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
674      };
675      if (unsigned Reg = State.AllocateReg(RegList7)) {
676        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
677        return false;
678      }
679    }
680  }
681
682  return true;  // CC didn't match.
683}
684
685
686bool llvm::RetCC_PPC_Cold(unsigned ValNo, MVT ValVT,
687                          MVT LocVT, CCValAssign::LocInfo LocInfo,
688                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
689
690  if (LocVT == MVT::i32 ||
691      LocVT == MVT::i1) {
692    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
693      LocVT = MVT::i64;
694      if (ArgFlags.isSExt())
695            LocInfo = CCValAssign::SExt;
696      else if (ArgFlags.isZExt())
697            LocInfo = CCValAssign::ZExt;
698      else
699            LocInfo = CCValAssign::AExt;
700    }
701  }
702
703  if (LocVT == MVT::i1) {
704    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
705      LocVT = MVT::i32;
706      if (ArgFlags.isSExt())
707            LocInfo = CCValAssign::SExt;
708      else if (ArgFlags.isZExt())
709            LocInfo = CCValAssign::ZExt;
710      else
711            LocInfo = CCValAssign::AExt;
712    }
713  }
714
715  if (LocVT == MVT::i32) {
716    if (unsigned Reg = State.AllocateReg(PPC::R3)) {
717      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
718      return false;
719    }
720  }
721
722  if (LocVT == MVT::i64) {
723    if (unsigned Reg = State.AllocateReg(PPC::X3)) {
724      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
725      return false;
726    }
727  }
728
729  if (LocVT == MVT::i128) {
730    if (unsigned Reg = State.AllocateReg(PPC::X3)) {
731      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
732      return false;
733    }
734  }
735
736  if (LocVT == MVT::f32) {
737    if (unsigned Reg = State.AllocateReg(PPC::F1)) {
738      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
739      return false;
740    }
741  }
742
743  if (LocVT == MVT::f64) {
744    if (unsigned Reg = State.AllocateReg(PPC::F1)) {
745      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
746      return false;
747    }
748  }
749
750  if (LocVT == MVT::f128) {
751    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
752      if (unsigned Reg = State.AllocateReg(PPC::V2)) {
753        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
754        return false;
755      }
756    }
757  }
758
759  if (LocVT == MVT::v4f64 ||
760      LocVT == MVT::v4f32 ||
761      LocVT == MVT::v4i1) {
762    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
763      if (unsigned Reg = State.AllocateReg(PPC::QF1)) {
764        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
765        return false;
766      }
767    }
768  }
769
770  if (LocVT == MVT::v16i8 ||
771      LocVT == MVT::v8i16 ||
772      LocVT == MVT::v4i32 ||
773      LocVT == MVT::v2i64 ||
774      LocVT == MVT::v1i128 ||
775      LocVT == MVT::v4f32 ||
776      LocVT == MVT::v2f64) {
777    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
778      if (unsigned Reg = State.AllocateReg(PPC::V2)) {
779        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
780        return false;
781      }
782    }
783  }
784
785  return true;  // CC didn't match.
786}
787