1 //===----------------------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "AMDGPU.h"
10 #include "AMDGPUArgumentUsageInfo.h"
11 #include "SIRegisterInfo.h"
12 #include "llvm/Support/NativeFormatting.h"
13 #include "llvm/Support/raw_ostream.h"
14
15 using namespace llvm;
16
17 #define DEBUG_TYPE "amdgpu-argument-reg-usage-info"
18
19 INITIALIZE_PASS(AMDGPUArgumentUsageInfo, DEBUG_TYPE,
20 "Argument Register Usage Information Storage", false, true)
21
print(raw_ostream & OS,const TargetRegisterInfo * TRI) const22 void ArgDescriptor::print(raw_ostream &OS,
23 const TargetRegisterInfo *TRI) const {
24 if (!isSet()) {
25 OS << "<not set>\n";
26 return;
27 }
28
29 if (isRegister())
30 OS << "Reg " << printReg(getRegister(), TRI);
31 else
32 OS << "Stack offset " << getStackOffset();
33
34 if (isMasked()) {
35 OS << " & ";
36 llvm::write_hex(OS, Mask, llvm::HexPrintStyle::PrefixLower);
37 }
38
39 OS << '\n';
40 }
41
42 char AMDGPUArgumentUsageInfo::ID = 0;
43
44 const AMDGPUFunctionArgInfo AMDGPUArgumentUsageInfo::ExternFunctionInfo{};
45
doInitialization(Module & M)46 bool AMDGPUArgumentUsageInfo::doInitialization(Module &M) {
47 return false;
48 }
49
doFinalization(Module & M)50 bool AMDGPUArgumentUsageInfo::doFinalization(Module &M) {
51 ArgInfoMap.clear();
52 return false;
53 }
54
print(raw_ostream & OS,const Module * M) const55 void AMDGPUArgumentUsageInfo::print(raw_ostream &OS, const Module *M) const {
56 for (const auto &FI : ArgInfoMap) {
57 OS << "Arguments for " << FI.first->getName() << '\n'
58 << " PrivateSegmentBuffer: " << FI.second.PrivateSegmentBuffer
59 << " DispatchPtr: " << FI.second.DispatchPtr
60 << " QueuePtr: " << FI.second.QueuePtr
61 << " KernargSegmentPtr: " << FI.second.KernargSegmentPtr
62 << " DispatchID: " << FI.second.DispatchID
63 << " FlatScratchInit: " << FI.second.FlatScratchInit
64 << " PrivateSegmentSize: " << FI.second.PrivateSegmentSize
65 << " WorkGroupIDX: " << FI.second.WorkGroupIDX
66 << " WorkGroupIDY: " << FI.second.WorkGroupIDY
67 << " WorkGroupIDZ: " << FI.second.WorkGroupIDZ
68 << " WorkGroupInfo: " << FI.second.WorkGroupInfo
69 << " PrivateSegmentWaveByteOffset: "
70 << FI.second.PrivateSegmentWaveByteOffset
71 << " ImplicitBufferPtr: " << FI.second.ImplicitBufferPtr
72 << " ImplicitArgPtr: " << FI.second.ImplicitArgPtr
73 << " WorkItemIDX " << FI.second.WorkItemIDX
74 << " WorkItemIDY " << FI.second.WorkItemIDY
75 << " WorkItemIDZ " << FI.second.WorkItemIDZ
76 << '\n';
77 }
78 }
79
80 std::pair<const ArgDescriptor *, const TargetRegisterClass *>
getPreloadedValue(AMDGPUFunctionArgInfo::PreloadedValue Value) const81 AMDGPUFunctionArgInfo::getPreloadedValue(
82 AMDGPUFunctionArgInfo::PreloadedValue Value) const {
83 switch (Value) {
84 case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER: {
85 return std::make_pair(
86 PrivateSegmentBuffer ? &PrivateSegmentBuffer : nullptr,
87 &AMDGPU::SGPR_128RegClass);
88 }
89 case AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR:
90 return std::make_pair(ImplicitBufferPtr ? &ImplicitBufferPtr : nullptr,
91 &AMDGPU::SGPR_64RegClass);
92 case AMDGPUFunctionArgInfo::WORKGROUP_ID_X:
93 return std::make_pair(WorkGroupIDX ? &WorkGroupIDX : nullptr,
94 &AMDGPU::SGPR_32RegClass);
95
96 case AMDGPUFunctionArgInfo::WORKGROUP_ID_Y:
97 return std::make_pair(WorkGroupIDY ? &WorkGroupIDY : nullptr,
98 &AMDGPU::SGPR_32RegClass);
99 case AMDGPUFunctionArgInfo::WORKGROUP_ID_Z:
100 return std::make_pair(WorkGroupIDZ ? &WorkGroupIDZ : nullptr,
101 &AMDGPU::SGPR_32RegClass);
102 case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_WAVE_BYTE_OFFSET:
103 return std::make_pair(
104 PrivateSegmentWaveByteOffset ? &PrivateSegmentWaveByteOffset : nullptr,
105 &AMDGPU::SGPR_32RegClass);
106 case AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR:
107 return std::make_pair(KernargSegmentPtr ? &KernargSegmentPtr : nullptr,
108 &AMDGPU::SGPR_64RegClass);
109 case AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR:
110 return std::make_pair(ImplicitArgPtr ? &ImplicitArgPtr : nullptr,
111 &AMDGPU::SGPR_64RegClass);
112 case AMDGPUFunctionArgInfo::DISPATCH_ID:
113 return std::make_pair(DispatchID ? &DispatchID : nullptr,
114 &AMDGPU::SGPR_64RegClass);
115 case AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT:
116 return std::make_pair(FlatScratchInit ? &FlatScratchInit : nullptr,
117 &AMDGPU::SGPR_64RegClass);
118 case AMDGPUFunctionArgInfo::DISPATCH_PTR:
119 return std::make_pair(DispatchPtr ? &DispatchPtr : nullptr,
120 &AMDGPU::SGPR_64RegClass);
121 case AMDGPUFunctionArgInfo::QUEUE_PTR:
122 return std::make_pair(QueuePtr ? &QueuePtr : nullptr,
123 &AMDGPU::SGPR_64RegClass);
124 case AMDGPUFunctionArgInfo::WORKITEM_ID_X:
125 return std::make_pair(WorkItemIDX ? &WorkItemIDX : nullptr,
126 &AMDGPU::VGPR_32RegClass);
127 case AMDGPUFunctionArgInfo::WORKITEM_ID_Y:
128 return std::make_pair(WorkItemIDY ? &WorkItemIDY : nullptr,
129 &AMDGPU::VGPR_32RegClass);
130 case AMDGPUFunctionArgInfo::WORKITEM_ID_Z:
131 return std::make_pair(WorkItemIDZ ? &WorkItemIDZ : nullptr,
132 &AMDGPU::VGPR_32RegClass);
133 }
134 llvm_unreachable("unexpected preloaded value type");
135 }
136