1 //===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the MSP430 implementation of the TargetInstrInfo class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H 14 #define LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H 15 16 #include "MSP430RegisterInfo.h" 17 #include "llvm/CodeGen/TargetInstrInfo.h" 18 19 #define GET_INSTRINFO_HEADER 20 #include "MSP430GenInstrInfo.inc" 21 22 namespace llvm { 23 24 class MSP430Subtarget; 25 26 class MSP430InstrInfo : public MSP430GenInstrInfo { 27 const MSP430RegisterInfo RI; 28 virtual void anchor(); 29 public: 30 explicit MSP430InstrInfo(MSP430Subtarget &STI); 31 32 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 33 /// such, whenever a client has an instance of instruction info, it should 34 /// always be able to get register info as well (through this method). 35 /// getRegisterInfo()36 const TargetRegisterInfo &getRegisterInfo() const { return RI; } 37 38 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 39 const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, 40 bool KillSrc) const override; 41 42 void storeRegToStackSlot(MachineBasicBlock &MBB, 43 MachineBasicBlock::iterator MI, 44 unsigned SrcReg, bool isKill, 45 int FrameIndex, 46 const TargetRegisterClass *RC, 47 const TargetRegisterInfo *TRI) const override; 48 void loadRegFromStackSlot(MachineBasicBlock &MBB, 49 MachineBasicBlock::iterator MI, 50 unsigned DestReg, int FrameIdx, 51 const TargetRegisterClass *RC, 52 const TargetRegisterInfo *TRI) const override; 53 54 unsigned getInstSizeInBytes(const MachineInstr &MI) const override; 55 56 // Branch folding goodness 57 bool 58 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; 59 bool isUnpredicatedTerminator(const MachineInstr &MI) const override; 60 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 61 MachineBasicBlock *&FBB, 62 SmallVectorImpl<MachineOperand> &Cond, 63 bool AllowModify) const override; 64 65 unsigned removeBranch(MachineBasicBlock &MBB, 66 int *BytesRemoved = nullptr) const override; 67 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 68 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, 69 const DebugLoc &DL, 70 int *BytesAdded = nullptr) const override; 71 getFramePoppedByCallee(const MachineInstr & I)72 int64_t getFramePoppedByCallee(const MachineInstr &I) const { 73 assert(isFrameInstr(I) && "Not a frame instruction"); 74 assert(I.getOperand(1).getImm() >= 0 && "Size must not be negative"); 75 return I.getOperand(1).getImm(); 76 } 77 }; 78 79 } 80 81 #endif 82