1 //===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "SystemZMCTargetDesc.h"
10 #include "SystemZInstPrinter.h"
11 #include "SystemZMCAsmInfo.h"
12 #include "TargetInfo/SystemZTargetInfo.h"
13 #include "llvm/MC/MCDwarf.h"
14 #include "llvm/MC/MCInstrInfo.h"
15 #include "llvm/MC/MCRegisterInfo.h"
16 #include "llvm/MC/MCStreamer.h"
17 #include "llvm/MC/MCSubtargetInfo.h"
18 #include "llvm/Support/TargetRegistry.h"
19
20 using namespace llvm;
21
22 #define GET_INSTRINFO_MC_DESC
23 #include "SystemZGenInstrInfo.inc"
24
25 #define GET_SUBTARGETINFO_MC_DESC
26 #include "SystemZGenSubtargetInfo.inc"
27
28 #define GET_REGINFO_MC_DESC
29 #include "SystemZGenRegisterInfo.inc"
30
31 const unsigned SystemZMC::GR32Regs[16] = {
32 SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
33 SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
34 SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L,
35 SystemZ::R12L, SystemZ::R13L, SystemZ::R14L, SystemZ::R15L
36 };
37
38 const unsigned SystemZMC::GRH32Regs[16] = {
39 SystemZ::R0H, SystemZ::R1H, SystemZ::R2H, SystemZ::R3H,
40 SystemZ::R4H, SystemZ::R5H, SystemZ::R6H, SystemZ::R7H,
41 SystemZ::R8H, SystemZ::R9H, SystemZ::R10H, SystemZ::R11H,
42 SystemZ::R12H, SystemZ::R13H, SystemZ::R14H, SystemZ::R15H
43 };
44
45 const unsigned SystemZMC::GR64Regs[16] = {
46 SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
47 SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D,
48 SystemZ::R8D, SystemZ::R9D, SystemZ::R10D, SystemZ::R11D,
49 SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D
50 };
51
52 const unsigned SystemZMC::GR128Regs[16] = {
53 SystemZ::R0Q, 0, SystemZ::R2Q, 0,
54 SystemZ::R4Q, 0, SystemZ::R6Q, 0,
55 SystemZ::R8Q, 0, SystemZ::R10Q, 0,
56 SystemZ::R12Q, 0, SystemZ::R14Q, 0
57 };
58
59 const unsigned SystemZMC::FP32Regs[16] = {
60 SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
61 SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
62 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
63 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S
64 };
65
66 const unsigned SystemZMC::FP64Regs[16] = {
67 SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
68 SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
69 SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
70 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D
71 };
72
73 const unsigned SystemZMC::FP128Regs[16] = {
74 SystemZ::F0Q, SystemZ::F1Q, 0, 0,
75 SystemZ::F4Q, SystemZ::F5Q, 0, 0,
76 SystemZ::F8Q, SystemZ::F9Q, 0, 0,
77 SystemZ::F12Q, SystemZ::F13Q, 0, 0
78 };
79
80 const unsigned SystemZMC::VR32Regs[32] = {
81 SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
82 SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
83 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
84 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S,
85 SystemZ::F16S, SystemZ::F17S, SystemZ::F18S, SystemZ::F19S,
86 SystemZ::F20S, SystemZ::F21S, SystemZ::F22S, SystemZ::F23S,
87 SystemZ::F24S, SystemZ::F25S, SystemZ::F26S, SystemZ::F27S,
88 SystemZ::F28S, SystemZ::F29S, SystemZ::F30S, SystemZ::F31S
89 };
90
91 const unsigned SystemZMC::VR64Regs[32] = {
92 SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
93 SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
94 SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
95 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D,
96 SystemZ::F16D, SystemZ::F17D, SystemZ::F18D, SystemZ::F19D,
97 SystemZ::F20D, SystemZ::F21D, SystemZ::F22D, SystemZ::F23D,
98 SystemZ::F24D, SystemZ::F25D, SystemZ::F26D, SystemZ::F27D,
99 SystemZ::F28D, SystemZ::F29D, SystemZ::F30D, SystemZ::F31D
100 };
101
102 const unsigned SystemZMC::VR128Regs[32] = {
103 SystemZ::V0, SystemZ::V1, SystemZ::V2, SystemZ::V3,
104 SystemZ::V4, SystemZ::V5, SystemZ::V6, SystemZ::V7,
105 SystemZ::V8, SystemZ::V9, SystemZ::V10, SystemZ::V11,
106 SystemZ::V12, SystemZ::V13, SystemZ::V14, SystemZ::V15,
107 SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19,
108 SystemZ::V20, SystemZ::V21, SystemZ::V22, SystemZ::V23,
109 SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27,
110 SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
111 };
112
113 const unsigned SystemZMC::AR32Regs[16] = {
114 SystemZ::A0, SystemZ::A1, SystemZ::A2, SystemZ::A3,
115 SystemZ::A4, SystemZ::A5, SystemZ::A6, SystemZ::A7,
116 SystemZ::A8, SystemZ::A9, SystemZ::A10, SystemZ::A11,
117 SystemZ::A12, SystemZ::A13, SystemZ::A14, SystemZ::A15
118 };
119
120 const unsigned SystemZMC::CR64Regs[16] = {
121 SystemZ::C0, SystemZ::C1, SystemZ::C2, SystemZ::C3,
122 SystemZ::C4, SystemZ::C5, SystemZ::C6, SystemZ::C7,
123 SystemZ::C8, SystemZ::C9, SystemZ::C10, SystemZ::C11,
124 SystemZ::C12, SystemZ::C13, SystemZ::C14, SystemZ::C15
125 };
126
getFirstReg(unsigned Reg)127 unsigned SystemZMC::getFirstReg(unsigned Reg) {
128 static unsigned Map[SystemZ::NUM_TARGET_REGS];
129 static bool Initialized = false;
130 if (!Initialized) {
131 for (unsigned I = 0; I < 16; ++I) {
132 Map[GR32Regs[I]] = I;
133 Map[GRH32Regs[I]] = I;
134 Map[GR64Regs[I]] = I;
135 Map[GR128Regs[I]] = I;
136 Map[FP128Regs[I]] = I;
137 Map[AR32Regs[I]] = I;
138 }
139 for (unsigned I = 0; I < 32; ++I) {
140 Map[VR32Regs[I]] = I;
141 Map[VR64Regs[I]] = I;
142 Map[VR128Regs[I]] = I;
143 }
144 }
145 assert(Reg < SystemZ::NUM_TARGET_REGS);
146 return Map[Reg];
147 }
148
createSystemZMCAsmInfo(const MCRegisterInfo & MRI,const Triple & TT,const MCTargetOptions & Options)149 static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
150 const Triple &TT,
151 const MCTargetOptions &Options) {
152 MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
153 MCCFIInstruction Inst =
154 MCCFIInstruction::createDefCfa(nullptr,
155 MRI.getDwarfRegNum(SystemZ::R15D, true),
156 SystemZMC::CFAOffsetFromInitialSP);
157 MAI->addInitialFrameState(Inst);
158 return MAI;
159 }
160
createSystemZMCInstrInfo()161 static MCInstrInfo *createSystemZMCInstrInfo() {
162 MCInstrInfo *X = new MCInstrInfo();
163 InitSystemZMCInstrInfo(X);
164 return X;
165 }
166
createSystemZMCRegisterInfo(const Triple & TT)167 static MCRegisterInfo *createSystemZMCRegisterInfo(const Triple &TT) {
168 MCRegisterInfo *X = new MCRegisterInfo();
169 InitSystemZMCRegisterInfo(X, SystemZ::R14D);
170 return X;
171 }
172
173 static MCSubtargetInfo *
createSystemZMCSubtargetInfo(const Triple & TT,StringRef CPU,StringRef FS)174 createSystemZMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
175 return createSystemZMCSubtargetInfoImpl(TT, CPU, FS);
176 }
177
createSystemZMCInstPrinter(const Triple & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI)178 static MCInstPrinter *createSystemZMCInstPrinter(const Triple &T,
179 unsigned SyntaxVariant,
180 const MCAsmInfo &MAI,
181 const MCInstrInfo &MII,
182 const MCRegisterInfo &MRI) {
183 return new SystemZInstPrinter(MAI, MII, MRI);
184 }
185
LLVMInitializeSystemZTargetMC()186 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTargetMC() {
187 // Register the MCAsmInfo.
188 TargetRegistry::RegisterMCAsmInfo(getTheSystemZTarget(),
189 createSystemZMCAsmInfo);
190
191 // Register the MCCodeEmitter.
192 TargetRegistry::RegisterMCCodeEmitter(getTheSystemZTarget(),
193 createSystemZMCCodeEmitter);
194
195 // Register the MCInstrInfo.
196 TargetRegistry::RegisterMCInstrInfo(getTheSystemZTarget(),
197 createSystemZMCInstrInfo);
198
199 // Register the MCRegisterInfo.
200 TargetRegistry::RegisterMCRegInfo(getTheSystemZTarget(),
201 createSystemZMCRegisterInfo);
202
203 // Register the MCSubtargetInfo.
204 TargetRegistry::RegisterMCSubtargetInfo(getTheSystemZTarget(),
205 createSystemZMCSubtargetInfo);
206
207 // Register the MCAsmBackend.
208 TargetRegistry::RegisterMCAsmBackend(getTheSystemZTarget(),
209 createSystemZMCAsmBackend);
210
211 // Register the MCInstPrinter.
212 TargetRegistry::RegisterMCInstPrinter(getTheSystemZTarget(),
213 createSystemZMCInstPrinter);
214 }
215