1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __VMWGFX_DRM_H__ 20 #define __VMWGFX_DRM_H__ 21 #include "drm.h" 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 #define DRM_VMW_MAX_SURFACE_FACES 6 26 #define DRM_VMW_MAX_MIP_LEVELS 24 27 #define DRM_VMW_GET_PARAM 0 28 #define DRM_VMW_ALLOC_DMABUF 1 29 #define DRM_VMW_ALLOC_BO 1 30 #define DRM_VMW_UNREF_DMABUF 2 31 #define DRM_VMW_HANDLE_CLOSE 2 32 #define DRM_VMW_CURSOR_BYPASS 3 33 #define DRM_VMW_CONTROL_STREAM 4 34 #define DRM_VMW_CLAIM_STREAM 5 35 #define DRM_VMW_UNREF_STREAM 6 36 #define DRM_VMW_CREATE_CONTEXT 7 37 #define DRM_VMW_UNREF_CONTEXT 8 38 #define DRM_VMW_CREATE_SURFACE 9 39 #define DRM_VMW_UNREF_SURFACE 10 40 #define DRM_VMW_REF_SURFACE 11 41 #define DRM_VMW_EXECBUF 12 42 #define DRM_VMW_GET_3D_CAP 13 43 #define DRM_VMW_FENCE_WAIT 14 44 #define DRM_VMW_FENCE_SIGNALED 15 45 #define DRM_VMW_FENCE_UNREF 16 46 #define DRM_VMW_FENCE_EVENT 17 47 #define DRM_VMW_PRESENT 18 48 #define DRM_VMW_PRESENT_READBACK 19 49 #define DRM_VMW_UPDATE_LAYOUT 20 50 #define DRM_VMW_CREATE_SHADER 21 51 #define DRM_VMW_UNREF_SHADER 22 52 #define DRM_VMW_GB_SURFACE_CREATE 23 53 #define DRM_VMW_GB_SURFACE_REF 24 54 #define DRM_VMW_SYNCCPU 25 55 #define DRM_VMW_CREATE_EXTENDED_CONTEXT 26 56 #define DRM_VMW_GB_SURFACE_CREATE_EXT 27 57 #define DRM_VMW_GB_SURFACE_REF_EXT 28 58 #define DRM_VMW_MSG 29 59 #define DRM_VMW_MKSSTAT_RESET 30 60 #define DRM_VMW_MKSSTAT_ADD 31 61 #define DRM_VMW_MKSSTAT_REMOVE 32 62 #define DRM_VMW_PARAM_NUM_STREAMS 0 63 #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 64 #define DRM_VMW_PARAM_3D 2 65 #define DRM_VMW_PARAM_HW_CAPS 3 66 #define DRM_VMW_PARAM_FIFO_CAPS 4 67 #define DRM_VMW_PARAM_MAX_FB_SIZE 5 68 #define DRM_VMW_PARAM_FIFO_HW_VERSION 6 69 #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7 70 #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 71 #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 72 #define DRM_VMW_PARAM_MAX_MOB_SIZE 10 73 #define DRM_VMW_PARAM_SCREEN_TARGET 11 74 #define DRM_VMW_PARAM_DX 12 75 #define DRM_VMW_PARAM_HW_CAPS2 13 76 #define DRM_VMW_PARAM_SM4_1 14 77 #define DRM_VMW_PARAM_SM5 15 78 #define DRM_VMW_PARAM_GL43 16 79 enum drm_vmw_handle_type { 80 DRM_VMW_HANDLE_LEGACY = 0, 81 DRM_VMW_HANDLE_PRIME = 1 82 }; 83 struct drm_vmw_getparam_arg { 84 __u64 value; 85 __u32 param; 86 __u32 pad64; 87 }; 88 struct drm_vmw_context_arg { 89 __s32 cid; 90 __u32 pad64; 91 }; 92 struct drm_vmw_surface_create_req { 93 __u32 flags; 94 __u32 format; 95 __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 96 __u64 size_addr; 97 __s32 shareable; 98 __s32 scanout; 99 }; 100 struct drm_vmw_surface_arg { 101 __s32 sid; 102 enum drm_vmw_handle_type handle_type; 103 }; 104 struct drm_vmw_size { 105 __u32 width; 106 __u32 height; 107 __u32 depth; 108 __u32 pad64; 109 }; 110 union drm_vmw_surface_create_arg { 111 struct drm_vmw_surface_arg rep; 112 struct drm_vmw_surface_create_req req; 113 }; 114 union drm_vmw_surface_reference_arg { 115 struct drm_vmw_surface_create_req rep; 116 struct drm_vmw_surface_arg req; 117 }; 118 #define DRM_VMW_EXECBUF_VERSION 2 119 #define DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD (1 << 0) 120 #define DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD (1 << 1) 121 struct drm_vmw_execbuf_arg { 122 __u64 commands; 123 __u32 command_size; 124 __u32 throttle_us; 125 __u64 fence_rep; 126 __u32 version; 127 __u32 flags; 128 __u32 context_handle; 129 __s32 imported_fence_fd; 130 }; 131 struct drm_vmw_fence_rep { 132 __u32 handle; 133 __u32 mask; 134 __u32 seqno; 135 __u32 passed_seqno; 136 __s32 fd; 137 __s32 error; 138 }; 139 struct drm_vmw_alloc_bo_req { 140 __u32 size; 141 __u32 pad64; 142 }; 143 #define drm_vmw_alloc_dmabuf_req drm_vmw_alloc_bo_req 144 struct drm_vmw_bo_rep { 145 __u64 map_handle; 146 __u32 handle; 147 __u32 cur_gmr_id; 148 __u32 cur_gmr_offset; 149 __u32 pad64; 150 }; 151 #define drm_vmw_dmabuf_rep drm_vmw_bo_rep 152 union drm_vmw_alloc_bo_arg { 153 struct drm_vmw_alloc_bo_req req; 154 struct drm_vmw_bo_rep rep; 155 }; 156 #define drm_vmw_alloc_dmabuf_arg drm_vmw_alloc_bo_arg 157 struct drm_vmw_rect { 158 __s32 x; 159 __s32 y; 160 __u32 w; 161 __u32 h; 162 }; 163 struct drm_vmw_control_stream_arg { 164 __u32 stream_id; 165 __u32 enabled; 166 __u32 flags; 167 __u32 color_key; 168 __u32 handle; 169 __u32 offset; 170 __s32 format; 171 __u32 size; 172 __u32 width; 173 __u32 height; 174 __u32 pitch[3]; 175 __u32 pad64; 176 struct drm_vmw_rect src; 177 struct drm_vmw_rect dst; 178 }; 179 #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 180 #define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 181 struct drm_vmw_cursor_bypass_arg { 182 __u32 flags; 183 __u32 crtc_id; 184 __s32 xpos; 185 __s32 ypos; 186 __s32 xhot; 187 __s32 yhot; 188 }; 189 struct drm_vmw_stream_arg { 190 __u32 stream_id; 191 __u32 pad64; 192 }; 193 struct drm_vmw_get_3d_cap_arg { 194 __u64 buffer; 195 __u32 max_size; 196 __u32 pad64; 197 }; 198 #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 199 #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 200 #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 201 struct drm_vmw_fence_wait_arg { 202 __u32 handle; 203 __s32 cookie_valid; 204 __u64 kernel_cookie; 205 __u64 timeout_us; 206 __s32 lazy; 207 __s32 flags; 208 __s32 wait_options; 209 __s32 pad64; 210 }; 211 struct drm_vmw_fence_signaled_arg { 212 __u32 handle; 213 __u32 flags; 214 __s32 signaled; 215 __u32 passed_seqno; 216 __u32 signaled_flags; 217 __u32 pad64; 218 }; 219 struct drm_vmw_fence_arg { 220 __u32 handle; 221 __u32 pad64; 222 }; 223 #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 224 struct drm_vmw_event_fence { 225 struct drm_event base; 226 __u64 user_data; 227 __u32 tv_sec; 228 __u32 tv_usec; 229 }; 230 #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 231 struct drm_vmw_fence_event_arg { 232 __u64 fence_rep; 233 __u64 user_data; 234 __u32 handle; 235 __u32 flags; 236 }; 237 struct drm_vmw_present_arg { 238 __u32 fb_id; 239 __u32 sid; 240 __s32 dest_x; 241 __s32 dest_y; 242 __u64 clips_ptr; 243 __u32 num_clips; 244 __u32 pad64; 245 }; 246 struct drm_vmw_present_readback_arg { 247 __u32 fb_id; 248 __u32 num_clips; 249 __u64 clips_ptr; 250 __u64 fence_rep; 251 }; 252 struct drm_vmw_update_layout_arg { 253 __u32 num_outputs; 254 __u32 pad64; 255 __u64 rects; 256 }; 257 enum drm_vmw_shader_type { 258 drm_vmw_shader_type_vs = 0, 259 drm_vmw_shader_type_ps, 260 }; 261 struct drm_vmw_shader_create_arg { 262 enum drm_vmw_shader_type shader_type; 263 __u32 size; 264 __u32 buffer_handle; 265 __u32 shader_handle; 266 __u64 offset; 267 }; 268 struct drm_vmw_shader_arg { 269 __u32 handle; 270 __u32 pad64; 271 }; 272 enum drm_vmw_surface_flags { 273 drm_vmw_surface_flag_shareable = (1 << 0), 274 drm_vmw_surface_flag_scanout = (1 << 1), 275 drm_vmw_surface_flag_create_buffer = (1 << 2), 276 drm_vmw_surface_flag_coherent = (1 << 3), 277 }; 278 struct drm_vmw_gb_surface_create_req { 279 __u32 svga3d_flags; 280 __u32 format; 281 __u32 mip_levels; 282 enum drm_vmw_surface_flags drm_surface_flags; 283 __u32 multisample_count; 284 __u32 autogen_filter; 285 __u32 buffer_handle; 286 __u32 array_size; 287 struct drm_vmw_size base_size; 288 }; 289 struct drm_vmw_gb_surface_create_rep { 290 __u32 handle; 291 __u32 backup_size; 292 __u32 buffer_handle; 293 __u32 buffer_size; 294 __u64 buffer_map_handle; 295 }; 296 union drm_vmw_gb_surface_create_arg { 297 struct drm_vmw_gb_surface_create_rep rep; 298 struct drm_vmw_gb_surface_create_req req; 299 }; 300 struct drm_vmw_gb_surface_ref_rep { 301 struct drm_vmw_gb_surface_create_req creq; 302 struct drm_vmw_gb_surface_create_rep crep; 303 }; 304 union drm_vmw_gb_surface_reference_arg { 305 struct drm_vmw_gb_surface_ref_rep rep; 306 struct drm_vmw_surface_arg req; 307 }; 308 enum drm_vmw_synccpu_flags { 309 drm_vmw_synccpu_read = (1 << 0), 310 drm_vmw_synccpu_write = (1 << 1), 311 drm_vmw_synccpu_dontblock = (1 << 2), 312 drm_vmw_synccpu_allow_cs = (1 << 3) 313 }; 314 enum drm_vmw_synccpu_op { 315 drm_vmw_synccpu_grab, 316 drm_vmw_synccpu_release 317 }; 318 struct drm_vmw_synccpu_arg { 319 enum drm_vmw_synccpu_op op; 320 enum drm_vmw_synccpu_flags flags; 321 __u32 handle; 322 __u32 pad64; 323 }; 324 enum drm_vmw_extended_context { 325 drm_vmw_context_legacy, 326 drm_vmw_context_dx 327 }; 328 union drm_vmw_extended_context_arg { 329 enum drm_vmw_extended_context req; 330 struct drm_vmw_context_arg rep; 331 }; 332 struct drm_vmw_handle_close_arg { 333 __u32 handle; 334 __u32 pad64; 335 }; 336 #define drm_vmw_unref_dmabuf_arg drm_vmw_handle_close_arg 337 enum drm_vmw_surface_version { 338 drm_vmw_gb_surface_v1, 339 }; 340 struct drm_vmw_gb_surface_create_ext_req { 341 struct drm_vmw_gb_surface_create_req base; 342 enum drm_vmw_surface_version version; 343 __u32 svga3d_flags_upper_32_bits; 344 __u32 multisample_pattern; 345 __u32 quality_level; 346 __u32 buffer_byte_stride; 347 __u32 must_be_zero; 348 }; 349 union drm_vmw_gb_surface_create_ext_arg { 350 struct drm_vmw_gb_surface_create_rep rep; 351 struct drm_vmw_gb_surface_create_ext_req req; 352 }; 353 struct drm_vmw_gb_surface_ref_ext_rep { 354 struct drm_vmw_gb_surface_create_ext_req creq; 355 struct drm_vmw_gb_surface_create_rep crep; 356 }; 357 union drm_vmw_gb_surface_reference_ext_arg { 358 struct drm_vmw_gb_surface_ref_ext_rep rep; 359 struct drm_vmw_surface_arg req; 360 }; 361 struct drm_vmw_msg_arg { 362 __u64 send; 363 __u64 receive; 364 __s32 send_only; 365 __u32 receive_len; 366 }; 367 struct drm_vmw_mksstat_add_arg { 368 __u64 stat; 369 __u64 info; 370 __u64 strs; 371 __u64 stat_len; 372 __u64 info_len; 373 __u64 strs_len; 374 __u64 description; 375 __u64 id; 376 }; 377 struct drm_vmw_mksstat_remove_arg { 378 __u64 id; 379 }; 380 #ifdef __cplusplus 381 } 382 #endif 383 #endif 384