1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __BNXT_RE_UVERBS_ABI_H__ 20 #define __BNXT_RE_UVERBS_ABI_H__ 21 #include <linux/types.h> 22 #define BNXT_RE_ABI_VERSION 1 23 #define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT 0x00 24 #define BNXT_RE_CHIP_ID0_CHIP_REV_SFT 0x10 25 #define BNXT_RE_CHIP_ID0_CHIP_MET_SFT 0x18 26 enum { 27 BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL, 28 BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL, 29 }; 30 enum bnxt_re_wqe_mode { 31 BNXT_QPLIB_WQE_MODE_STATIC = 0x00, 32 BNXT_QPLIB_WQE_MODE_VARIABLE = 0x01, 33 BNXT_QPLIB_WQE_MODE_INVALID = 0x02, 34 }; 35 struct bnxt_re_uctx_resp { 36 __u32 dev_id; 37 __u32 max_qp; 38 __u32 pg_size; 39 __u32 cqe_sz; 40 __u32 max_cqd; 41 __u32 rsvd; 42 __aligned_u64 comp_mask; 43 __u32 chip_id0; 44 __u32 chip_id1; 45 __u32 mode; 46 __u32 rsvd1; 47 }; 48 struct bnxt_re_pd_resp { 49 __u32 pdid; 50 __u32 dpi; 51 __u64 dbr; 52 } __attribute__((packed, aligned(4))); 53 struct bnxt_re_cq_req { 54 __aligned_u64 cq_va; 55 __aligned_u64 cq_handle; 56 }; 57 struct bnxt_re_cq_resp { 58 __u32 cqid; 59 __u32 tail; 60 __u32 phase; 61 __u32 rsvd; 62 }; 63 struct bnxt_re_qp_req { 64 __aligned_u64 qpsva; 65 __aligned_u64 qprva; 66 __aligned_u64 qp_handle; 67 }; 68 struct bnxt_re_qp_resp { 69 __u32 qpid; 70 __u32 rsvd; 71 }; 72 struct bnxt_re_srq_req { 73 __aligned_u64 srqva; 74 __aligned_u64 srq_handle; 75 }; 76 struct bnxt_re_srq_resp { 77 __u32 srqid; 78 }; 79 enum bnxt_re_shpg_offt { 80 BNXT_RE_BEG_RESV_OFFT = 0x00, 81 BNXT_RE_AVID_OFFT = 0x10, 82 BNXT_RE_AVID_SIZE = 0x04, 83 BNXT_RE_END_RESV_OFFT = 0xFF0 84 }; 85 #endif 86