1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _ASM_X86_KVM_H 20 #define _ASM_X86_KVM_H 21 #include <linux/types.h> 22 #include <linux/ioctl.h> 23 #define KVM_PIO_PAGE_OFFSET 1 24 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 25 #define KVM_DIRTY_LOG_PAGE_OFFSET 64 26 #define DE_VECTOR 0 27 #define DB_VECTOR 1 28 #define BP_VECTOR 3 29 #define OF_VECTOR 4 30 #define BR_VECTOR 5 31 #define UD_VECTOR 6 32 #define NM_VECTOR 7 33 #define DF_VECTOR 8 34 #define TS_VECTOR 10 35 #define NP_VECTOR 11 36 #define SS_VECTOR 12 37 #define GP_VECTOR 13 38 #define PF_VECTOR 14 39 #define MF_VECTOR 16 40 #define AC_VECTOR 17 41 #define MC_VECTOR 18 42 #define XM_VECTOR 19 43 #define VE_VECTOR 20 44 #define __KVM_HAVE_PIT 45 #define __KVM_HAVE_IOAPIC 46 #define __KVM_HAVE_IRQ_LINE 47 #define __KVM_HAVE_MSI 48 #define __KVM_HAVE_USER_NMI 49 #define __KVM_HAVE_GUEST_DEBUG 50 #define __KVM_HAVE_MSIX 51 #define __KVM_HAVE_MCE 52 #define __KVM_HAVE_PIT_STATE2 53 #define __KVM_HAVE_XEN_HVM 54 #define __KVM_HAVE_VCPU_EVENTS 55 #define __KVM_HAVE_DEBUGREGS 56 #define __KVM_HAVE_XSAVE 57 #define __KVM_HAVE_XCRS 58 #define __KVM_HAVE_READONLY_MEM 59 #define KVM_NR_INTERRUPTS 256 60 struct kvm_memory_alias { 61 __u32 slot; 62 __u32 flags; 63 __u64 guest_phys_addr; 64 __u64 memory_size; 65 __u64 target_phys_addr; 66 }; 67 struct kvm_pic_state { 68 __u8 last_irr; 69 __u8 irr; 70 __u8 imr; 71 __u8 isr; 72 __u8 priority_add; 73 __u8 irq_base; 74 __u8 read_reg_select; 75 __u8 poll; 76 __u8 special_mask; 77 __u8 init_state; 78 __u8 auto_eoi; 79 __u8 rotate_on_auto_eoi; 80 __u8 special_fully_nested_mode; 81 __u8 init4; 82 __u8 elcr; 83 __u8 elcr_mask; 84 }; 85 #define KVM_IOAPIC_NUM_PINS 24 86 struct kvm_ioapic_state { 87 __u64 base_address; 88 __u32 ioregsel; 89 __u32 id; 90 __u32 irr; 91 __u32 pad; 92 union { 93 __u64 bits; 94 struct { 95 __u8 vector; 96 __u8 delivery_mode : 3; 97 __u8 dest_mode : 1; 98 __u8 delivery_status : 1; 99 __u8 polarity : 1; 100 __u8 remote_irr : 1; 101 __u8 trig_mode : 1; 102 __u8 mask : 1; 103 __u8 reserve : 7; 104 __u8 reserved[4]; 105 __u8 dest_id; 106 } fields; 107 } redirtbl[KVM_IOAPIC_NUM_PINS]; 108 }; 109 #define KVM_IRQCHIP_PIC_MASTER 0 110 #define KVM_IRQCHIP_PIC_SLAVE 1 111 #define KVM_IRQCHIP_IOAPIC 2 112 #define KVM_NR_IRQCHIPS 3 113 #define KVM_RUN_X86_SMM (1 << 0) 114 #define KVM_RUN_X86_BUS_LOCK (1 << 1) 115 struct kvm_regs { 116 __u64 rax, rbx, rcx, rdx; 117 __u64 rsi, rdi, rsp, rbp; 118 __u64 r8, r9, r10, r11; 119 __u64 r12, r13, r14, r15; 120 __u64 rip, rflags; 121 }; 122 #define KVM_APIC_REG_SIZE 0x400 123 struct kvm_lapic_state { 124 char regs[KVM_APIC_REG_SIZE]; 125 }; 126 struct kvm_segment { 127 __u64 base; 128 __u32 limit; 129 __u16 selector; 130 __u8 type; 131 __u8 present, dpl, db, s, l, g, avl; 132 __u8 unusable; 133 __u8 padding; 134 }; 135 struct kvm_dtable { 136 __u64 base; 137 __u16 limit; 138 __u16 padding[3]; 139 }; 140 struct kvm_sregs { 141 struct kvm_segment cs, ds, es, fs, gs, ss; 142 struct kvm_segment tr, ldt; 143 struct kvm_dtable gdt, idt; 144 __u64 cr0, cr2, cr3, cr4, cr8; 145 __u64 efer; 146 __u64 apic_base; 147 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64]; 148 }; 149 struct kvm_sregs2 { 150 struct kvm_segment cs, ds, es, fs, gs, ss; 151 struct kvm_segment tr, ldt; 152 struct kvm_dtable gdt, idt; 153 __u64 cr0, cr2, cr3, cr4, cr8; 154 __u64 efer; 155 __u64 apic_base; 156 __u64 flags; 157 __u64 pdptrs[4]; 158 }; 159 #define KVM_SREGS2_FLAGS_PDPTRS_VALID 1 160 struct kvm_fpu { 161 __u8 fpr[8][16]; 162 __u16 fcw; 163 __u16 fsw; 164 __u8 ftwx; 165 __u8 pad1; 166 __u16 last_opcode; 167 __u64 last_ip; 168 __u64 last_dp; 169 __u8 xmm[16][16]; 170 __u32 mxcsr; 171 __u32 pad2; 172 }; 173 struct kvm_msr_entry { 174 __u32 index; 175 __u32 reserved; 176 __u64 data; 177 }; 178 struct kvm_msrs { 179 __u32 nmsrs; 180 __u32 pad; 181 struct kvm_msr_entry entries[0]; 182 }; 183 struct kvm_msr_list { 184 __u32 nmsrs; 185 __u32 indices[0]; 186 }; 187 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600 188 struct kvm_msr_filter_range { 189 #define KVM_MSR_FILTER_READ (1 << 0) 190 #define KVM_MSR_FILTER_WRITE (1 << 1) 191 __u32 flags; 192 __u32 nmsrs; 193 __u32 base; 194 __u8 * bitmap; 195 }; 196 #define KVM_MSR_FILTER_MAX_RANGES 16 197 struct kvm_msr_filter { 198 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0) 199 #define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0) 200 __u32 flags; 201 struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES]; 202 }; 203 struct kvm_cpuid_entry { 204 __u32 function; 205 __u32 eax; 206 __u32 ebx; 207 __u32 ecx; 208 __u32 edx; 209 __u32 padding; 210 }; 211 struct kvm_cpuid { 212 __u32 nent; 213 __u32 padding; 214 struct kvm_cpuid_entry entries[0]; 215 }; 216 struct kvm_cpuid_entry2 { 217 __u32 function; 218 __u32 index; 219 __u32 flags; 220 __u32 eax; 221 __u32 ebx; 222 __u32 ecx; 223 __u32 edx; 224 __u32 padding[3]; 225 }; 226 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0) 227 #define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1) 228 #define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2) 229 struct kvm_cpuid2 { 230 __u32 nent; 231 __u32 padding; 232 struct kvm_cpuid_entry2 entries[0]; 233 }; 234 struct kvm_pit_channel_state { 235 __u32 count; 236 __u16 latched_count; 237 __u8 count_latched; 238 __u8 status_latched; 239 __u8 status; 240 __u8 read_state; 241 __u8 write_state; 242 __u8 write_latch; 243 __u8 rw_mode; 244 __u8 mode; 245 __u8 bcd; 246 __u8 gate; 247 __s64 count_load_time; 248 }; 249 struct kvm_debug_exit_arch { 250 __u32 exception; 251 __u32 pad; 252 __u64 pc; 253 __u64 dr6; 254 __u64 dr7; 255 }; 256 #define KVM_GUESTDBG_USE_SW_BP 0x00010000 257 #define KVM_GUESTDBG_USE_HW_BP 0x00020000 258 #define KVM_GUESTDBG_INJECT_DB 0x00040000 259 #define KVM_GUESTDBG_INJECT_BP 0x00080000 260 #define KVM_GUESTDBG_BLOCKIRQ 0x00100000 261 struct kvm_guest_debug_arch { 262 __u64 debugreg[8]; 263 }; 264 struct kvm_pit_state { 265 struct kvm_pit_channel_state channels[3]; 266 }; 267 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001 268 struct kvm_pit_state2 { 269 struct kvm_pit_channel_state channels[3]; 270 __u32 flags; 271 __u32 reserved[9]; 272 }; 273 struct kvm_reinject_control { 274 __u8 pit_reinject; 275 __u8 reserved[31]; 276 }; 277 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001 278 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002 279 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004 280 #define KVM_VCPUEVENT_VALID_SMM 0x00000008 281 #define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010 282 #define KVM_X86_SHADOW_INT_MOV_SS 0x01 283 #define KVM_X86_SHADOW_INT_STI 0x02 284 struct kvm_vcpu_events { 285 struct { 286 __u8 injected; 287 __u8 nr; 288 __u8 has_error_code; 289 __u8 pending; 290 __u32 error_code; 291 } exception; 292 struct { 293 __u8 injected; 294 __u8 nr; 295 __u8 soft; 296 __u8 shadow; 297 } interrupt; 298 struct { 299 __u8 injected; 300 __u8 pending; 301 __u8 masked; 302 __u8 pad; 303 } nmi; 304 __u32 sipi_vector; 305 __u32 flags; 306 struct { 307 __u8 smm; 308 __u8 pending; 309 __u8 smm_inside_nmi; 310 __u8 latched_init; 311 } smi; 312 __u8 reserved[27]; 313 __u8 exception_has_payload; 314 __u64 exception_payload; 315 }; 316 struct kvm_debugregs { 317 __u64 db[4]; 318 __u64 dr6; 319 __u64 dr7; 320 __u64 flags; 321 __u64 reserved[9]; 322 }; 323 struct kvm_xsave { 324 __u32 region[1024]; 325 __u32 extra[0]; 326 }; 327 #define KVM_MAX_XCRS 16 328 struct kvm_xcr { 329 __u32 xcr; 330 __u32 reserved; 331 __u64 value; 332 }; 333 struct kvm_xcrs { 334 __u32 nr_xcrs; 335 __u32 flags; 336 struct kvm_xcr xcrs[KVM_MAX_XCRS]; 337 __u64 padding[16]; 338 }; 339 #define KVM_SYNC_X86_REGS (1UL << 0) 340 #define KVM_SYNC_X86_SREGS (1UL << 1) 341 #define KVM_SYNC_X86_EVENTS (1UL << 2) 342 #define KVM_SYNC_X86_VALID_FIELDS (KVM_SYNC_X86_REGS | KVM_SYNC_X86_SREGS | KVM_SYNC_X86_EVENTS) 343 struct kvm_sync_regs { 344 struct kvm_regs regs; 345 struct kvm_sregs sregs; 346 struct kvm_vcpu_events events; 347 }; 348 #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0) 349 #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1) 350 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2) 351 #define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3) 352 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4) 353 #define KVM_STATE_NESTED_FORMAT_VMX 0 354 #define KVM_STATE_NESTED_FORMAT_SVM 1 355 #define KVM_STATE_NESTED_GUEST_MODE 0x00000001 356 #define KVM_STATE_NESTED_RUN_PENDING 0x00000002 357 #define KVM_STATE_NESTED_EVMCS 0x00000004 358 #define KVM_STATE_NESTED_MTF_PENDING 0x00000008 359 #define KVM_STATE_NESTED_GIF_SET 0x00000100 360 #define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001 361 #define KVM_STATE_NESTED_SMM_VMXON 0x00000002 362 #define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000 363 #define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000 364 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001 365 #define KVM_X86_XCOMP_GUEST_SUPP 0 366 struct kvm_vmx_nested_state_data { 367 __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; 368 __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; 369 }; 370 struct kvm_vmx_nested_state_hdr { 371 __u64 vmxon_pa; 372 __u64 vmcs12_pa; 373 struct { 374 __u16 flags; 375 } smm; 376 __u16 pad; 377 __u32 flags; 378 __u64 preemption_timer_deadline; 379 }; 380 struct kvm_svm_nested_state_data { 381 __u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE]; 382 }; 383 struct kvm_svm_nested_state_hdr { 384 __u64 vmcb_pa; 385 }; 386 struct kvm_nested_state { 387 __u16 flags; 388 __u16 format; 389 __u32 size; 390 union { 391 struct kvm_vmx_nested_state_hdr vmx; 392 struct kvm_svm_nested_state_hdr svm; 393 __u8 pad[120]; 394 } hdr; 395 union { 396 struct kvm_vmx_nested_state_data vmx[0]; 397 struct kvm_svm_nested_state_data svm[0]; 398 } data; 399 }; 400 struct kvm_pmu_event_filter { 401 __u32 action; 402 __u32 nevents; 403 __u32 fixed_counter_bitmap; 404 __u32 flags; 405 __u32 pad[4]; 406 __u64 events[0]; 407 }; 408 #define KVM_PMU_EVENT_ALLOW 0 409 #define KVM_PMU_EVENT_DENY 1 410 #define KVM_VCPU_TSC_CTRL 0 411 #define KVM_VCPU_TSC_OFFSET 0 412 #endif 413