1 #include <arm_neon.h>
2
vrsqrts_f16(float16x4_t,float16x4_t)3 inline float16x4_t vrsqrts_f16 (float16x4_t, float16x4_t)
4 {
5 return vdup_n_f16(0);
6 }
7
vrsqrtsq_f16(float16x8_t,float16x8_t)8 inline float16x8_t vrsqrtsq_f16 (float16x8_t, float16x8_t)
9 {
10 return vdupq_n_f16(0);
11 }
12
vpmax_f16(float16x4_t,float16x4_t)13 inline float16x4_t vpmax_f16 (float16x4_t, float16x4_t)
14 {
15 return vdup_n_f16(0);
16 }
17
vpadd_f16(float16x4_t,float16x4_t)18 inline float16x4_t vpadd_f16(float16x4_t, float16x4_t)
19 {
20 return vdup_n_f16(0);
21 }
22
vmulq_lane_f16(float16x8_t,float16x4_t,const int)23 inline float16x8_t vmulq_lane_f16 (float16x8_t, float16x4_t, const int)
24 {
25 return vdupq_n_f16(0);
26 }
27
vmul_f16(float16x4_t,float16x4_t)28 inline float16x4_t vmul_f16 (float16x4_t, float16x4_t)
29 {
30 return vdup_n_f16(0);
31 }
32
vadd_f16(float16x4_t,float16x4_t)33 inline float16x4_t vadd_f16 (float16x4_t, float16x4_t)
34 {
35 return vdup_n_f16(0);
36 }
37
vmul_lane_f16(float16x4_t,float16x4_t,const int)38 inline float16x4_t vmul_lane_f16 (float16x4_t, float16x4_t, const int)
39 {
40 return vdup_n_f16(0);
41 }
42
vmul_n_f16(float16x4_t,float16_t)43 inline float16x4_t vmul_n_f16 (float16x4_t, float16_t)
44 {
45 return vdup_n_f16(0);
46 }
47
vmax_f16(float16x4_t,float16x4_t)48 inline float16x4_t vmax_f16(float16x4_t, float16x4_t)
49 {
50 return vdup_n_f16(0);
51 }
52
vcvtq_f16_u16(uint16x8_t)53 inline float16x8_t vcvtq_f16_u16(uint16x8_t)
54 {
55 return vdupq_n_f16(0);
56 }
57
vcvtq_u16_f16(float16x8_t)58 inline uint16x8_t vcvtq_u16_f16(float16x8_t)
59 {
60 return vdupq_n_u16(0);
61 }
62
vcvtq_s16_f16(float16x8_t)63 inline int16x8_t vcvtq_s16_f16(float16x8_t)
64 {
65 return vdupq_n_s16(0);
66 }
67
vaddq_f16(float16x8_t,float16x8_t)68 inline float16x8_t vaddq_f16(float16x8_t, float16x8_t)
69 {
70 return vdupq_n_f16(0);
71 }
72
vsubq_f16(float16x8_t,float16x8_t)73 inline float16x8_t vsubq_f16(float16x8_t, float16x8_t)
74 {
75 return vdupq_n_f16(0);
76 }
77
vmulq_f16(float16x8_t,float16x8_t)78 inline float16x8_t vmulq_f16(float16x8_t, float16x8_t)
79 {
80 return vdupq_n_f16(0);
81 }
82
vmulq_n_f16(float16x8_t,float16_t)83 inline float16x8_t vmulq_n_f16(float16x8_t, float16_t)
84 {
85 return vdupq_n_f16(0);
86 }
87
vfmaq_f16(float16x8_t,float16x8_t,float16x8_t)88 inline float16x8_t vfmaq_f16(float16x8_t, float16x8_t, float16x8_t)
89 {
90 return vdupq_n_f16(0);
91 }
92
vcgeq_f16(float16x8_t,float16x8_t)93 inline uint16x8_t vcgeq_f16(float16x8_t, float16x8_t)
94 {
95 return vdupq_n_u16(0);
96 }
97
vcgtq_f16(float16x8_t,float16x8_t)98 inline uint16x8_t vcgtq_f16(float16x8_t, float16x8_t)
99 {
100 return vdupq_n_u16(0);
101 }
102
vbslq_f16(uint16x8_t,float16x8_t,float16x8_t)103 inline float16x8_t vbslq_f16 (uint16x8_t, float16x8_t, float16x8_t)
104 {
105 return vdupq_n_f16(0);;
106 }
107
vextq_f16(float16x8_t,float16x8_t,int)108 inline float16x8_t vextq_f16(float16x8_t, float16x8_t, int)
109 {
110 return vdupq_n_f16(0);
111 }
112
vabsq_f16(float16x8_t)113 inline float16x8_t vabsq_f16(float16x8_t)
114 {
115 return vdupq_n_f16(0);
116 }
117
vcvtq_f16_s16(float16x8_t)118 inline uint16x8_t vcvtq_f16_s16(float16x8_t)
119 {
120 return vdupq_n_s16(0);
121 }
122
vbsl_f16(uint16x4_t,float16x4_t,float16x4_t)123 inline float16x4_t vbsl_f16 (uint16x4_t,float16x4_t, float16x4_t)
124 {
125 return vdup_n_f16(0);
126 }
127
vrsqrte_f16(float16x4_t)128 inline float16x4_t vrsqrte_f16(float16x4_t)
129 {
130 return vdup_n_f16(0);
131 }
132
vrsqrteq_f16(float16x8_t)133 inline float16x8_t vrsqrteq_f16(float16x8_t)
134 {
135 return vdupq_n_f16(0);
136 }
137
vfmsq_f16(float16x8_t,float16x8_t,float16x8_t)138 inline float16x8_t vfmsq_f16 (float16x8_t, float16x8_t, float16x8_t)
139 {
140 return vdupq_n_f16(0);
141 }
142
vrecpe_f16(float16x4_t)143 inline float16x4_t vrecpe_f16 (float16x4_t)
144 {
145 return vdup_n_f16(0);
146 }
147
vrecpeq_f16(float16x8_t)148 inline float16x8_t vrecpeq_f16 (float16x8_t)
149 {
150 return vdupq_n_f16(0);
151 }
152
vrecps_f16(float16x4_t,float16x4_t)153 inline float16x4_t vrecps_f16 (float16x4_t, float16x4_t)
154 {
155 return vdup_n_f16(0);
156 }
157
vrecpsq_f16(float16x8_t,float16x8_t)158 inline float16x8_t vrecpsq_f16 (float16x8_t, float16x8_t)
159 {
160 return vdupq_n_f16(0);
161 }
162
vmaxq_f16(float16x8_t,float16x8_t)163 inline float16x8_t vmaxq_f16 (float16x8_t, float16x8_t)
164 {
165 return vdupq_n_f16(0);
166 }
167
vminq_f16(float16x8_t,float16x8_t)168 inline float16x8_t vminq_f16 (float16x8_t, float16x8_t)
169 {
170 return vdupq_n_f16(0);
171 }
172
vcltq_f16(float16x8_t,float16x8_t)173 inline uint16x8_t vcltq_f16(float16x8_t, float16x8_t)
174 {
175 return vdupq_n_u16(0);
176 }
177
178