1 /*
2 * Copyright (c) 2018-2020 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.h"
25
26 #include "arm_compute/core/CL/CLHelpers.h"
27 #include "arm_compute/core/CL/CLKernelLibrary.h"
28 #include "arm_compute/core/CL/ICLTensor.h"
29 #include "arm_compute/core/Helpers.h"
30 #include "arm_compute/core/TensorInfo.h"
31 #include "arm_compute/core/Utils.h"
32 #include "arm_compute/core/utils/misc/ShapeCalculator.h"
33 #include "arm_compute/core/utils/quantization/AsymmHelpers.h"
34 #include "src/core/AccessWindowStatic.h"
35 #include "src/core/CL/CLValidate.h"
36 #include "src/core/CL/ICLKernel.h"
37 #include "src/core/helpers/AutoConfiguration.h"
38 #include "src/core/helpers/WindowHelpers.h"
39 #include "support/StringSupport.h"
40
41 namespace arm_compute
42 {
43 using namespace arm_compute::misc::shape_calculator;
44
45 namespace
46 {
validate_arguments(const ITensorInfo * input,const ITensorInfo * weights,const ITensorInfo * biases,const ITensorInfo * output,const PadStrideInfo & conv_info,unsigned int depth_multiplier,const ActivationLayerInfo & act_info,const Size2D dilation,const ITensorInfo * output_multipliers,const ITensorInfo * output_shifts)47 Status validate_arguments(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output,
48 const PadStrideInfo &conv_info, unsigned int depth_multiplier, const ActivationLayerInfo &act_info, const Size2D dilation,
49 const ITensorInfo *output_multipliers, const ITensorInfo *output_shifts)
50 {
51 ARM_COMPUTE_RETURN_ERROR_ON_F16_UNSUPPORTED(input);
52 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QASYMM8, DataType::QASYMM8_SIGNED, DataType::F16, DataType::F32);
53 ARM_COMPUTE_RETURN_ERROR_ON_MSG((act_info.enabled()) && (input->data_type() == DataType::QASYMM8 || input->data_type() == DataType::QASYMM8_SIGNED)
54 && (act_info.activation() != ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU)
55 && (act_info.activation() != ActivationLayerInfo::ActivationFunction::BOUNDED_RELU)
56 && (act_info.activation() != ActivationLayerInfo::ActivationFunction::RELU)
57 && (act_info.activation() != ActivationLayerInfo::ActivationFunction::LOGISTIC),
58 "For QASYMM8 only logistic, relu, lower bounded relu and lower-upper bounded relu are supported");
59 ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(0) != 3 || weights->dimension(1) != 3);
60 ARM_COMPUTE_RETURN_ERROR_ON(conv_info.stride().first < 1 || conv_info.stride().first > 3);
61
62 ARM_COMPUTE_RETURN_ERROR_ON((dilation.x() < 1) || (dilation.y() < 1));
63
64 const bool is_qasymm = is_data_type_quantized_asymmetric(input->data_type());
65
66 if(biases != nullptr)
67 {
68 if(is_qasymm)
69 {
70 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(biases, 1, DataType::S32);
71 }
72 else
73 {
74 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(weights, biases);
75 }
76 ARM_COMPUTE_RETURN_ERROR_ON((biases->dimension(0) != weights->dimension(2)) && (weights->dimension(2) != 1 || biases->dimension(0) != weights->dimension(3)));
77 ARM_COMPUTE_RETURN_ERROR_ON(biases->num_dimensions() > 1);
78 }
79
80 if(is_qasymm)
81 {
82 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(output_multipliers, output_shifts);
83 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output_multipliers, 1, DataType::S32);
84 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output_shifts, 1, DataType::S32);
85 ARM_COMPUTE_RETURN_ERROR_ON(output_multipliers->num_dimensions() > 1);
86 ARM_COMPUTE_RETURN_ERROR_ON(output_shifts->num_dimensions() > 1);
87
88 if(is_data_type_quantized_per_channel(weights->data_type()))
89 {
90 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(weights, 1, DataType::QSYMM8_PER_CHANNEL);
91 ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(2) != output_multipliers->dimension(0));
92 ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(2) != output_shifts->dimension(0));
93 }
94 else
95 {
96 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, weights);
97 ARM_COMPUTE_RETURN_ERROR_ON(1 != output_multipliers->dimension(0));
98 ARM_COMPUTE_RETURN_ERROR_ON(1 != output_shifts->dimension(0));
99 }
100 }
101 else
102 {
103 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, weights);
104 }
105
106 if(output->total_size() != 0)
107 {
108 const TensorShape output_shape = compute_depthwise_convolution_shape(*input, *weights, conv_info, depth_multiplier, dilation);
109 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(output->tensor_shape(), output_shape);
110 }
111
112 return Status{};
113 }
114
validate_and_configure_window(ITensorInfo * input,ITensorInfo * weights,ITensorInfo * output,const PadStrideInfo & conv_info,unsigned int depth_multiplier,GPUTarget gpu_target,std::string & kernel_name,const Size2D dilation)115 std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input, ITensorInfo *weights, ITensorInfo *output, const PadStrideInfo &conv_info,
116 unsigned int depth_multiplier, GPUTarget gpu_target, std::string &kernel_name, const Size2D dilation)
117 {
118 // Output auto inizialitation if not yet initialized
119 const TensorShape output_shape = compute_depthwise_convolution_shape(*input, *weights, conv_info, depth_multiplier, dilation);
120 auto_init_if_empty(*output, input->clone()->set_tensor_shape(output_shape).set_quantization_info(output->quantization_info()));
121
122 const unsigned int conv_stride_x = conv_info.stride().first;
123 const unsigned int conv_stride_y = conv_info.stride().second;
124 const bool is_qasymm = is_data_type_quantized_asymmetric(input->data_type());
125 const bool is_bifrost = get_arch_from_target(gpu_target) == GPUTarget::BIFROST;
126
127 // Configure kernel window
128 unsigned int num_elems_read_per_iteration_x = 0;
129 unsigned int num_elems_read_per_iteration_y = 0;
130 unsigned int num_elems_written_per_iteration_x = 0;
131 unsigned int num_elems_written_per_iteration_y = 0;
132
133 if(input->data_type() == DataType::F16)
134 {
135 kernel_name = "depthwise_convolution_3x3_f16";
136 num_elems_written_per_iteration_x = 8 / data_size_from_type(input->data_type());
137 num_elems_written_per_iteration_y = 1;
138 num_elems_read_per_iteration_y = 3;
139 switch(conv_stride_x)
140 {
141 case 1:
142 num_elems_read_per_iteration_x = 8;
143 break;
144 case 2:
145 num_elems_read_per_iteration_x = 9;
146 break;
147 case 3:
148 num_elems_read_per_iteration_x = 16;
149 break;
150 default:
151 num_elems_read_per_iteration_x = 3 + (num_elems_written_per_iteration_x - 1) * conv_stride_x;
152 break;
153 }
154 if(is_bifrost)
155 {
156 if(conv_stride_x == 1 && conv_stride_y == 1)
157 {
158 kernel_name = "depthwise_convolution_3x3_stridex1_stridey1_bifrost_f16";
159 num_elems_read_per_iteration_x = 8;
160 num_elems_written_per_iteration_x = 4;
161 num_elems_read_per_iteration_y = 6;
162 num_elems_written_per_iteration_y = 4;
163 }
164 else if(conv_stride_x == 2 && conv_stride_y == 2)
165 {
166 kernel_name = "depthwise_convolution_3x3_stridex2_stridey2_bifrost_f16";
167 num_elems_read_per_iteration_x = 10;
168 num_elems_written_per_iteration_x = 4;
169 num_elems_read_per_iteration_y = 5;
170 num_elems_written_per_iteration_y = 2;
171 }
172 }
173 }
174 else if(input->data_type() == DataType::F32 && is_bifrost)
175 {
176 if(conv_stride_x == 1 && conv_stride_y == 1)
177 {
178 kernel_name = "depthwise_convolution_3x3_stridex1_stridey1_bifrost_f32";
179 num_elems_read_per_iteration_x = 4;
180 num_elems_read_per_iteration_y = 6;
181 num_elems_written_per_iteration_x = 2;
182 num_elems_written_per_iteration_y = 4;
183 }
184 else if(conv_stride_x == 2 && conv_stride_y == 2)
185 {
186 kernel_name = "depthwise_convolution_3x3_stridex2_stridey2_bifrost_f32";
187 num_elems_read_per_iteration_x = 6;
188 num_elems_read_per_iteration_y = 5;
189 num_elems_written_per_iteration_x = 2;
190 num_elems_written_per_iteration_y = 2;
191 }
192 else
193 {
194 kernel_name = "depthwise_convolution_3x3";
195 num_elems_written_per_iteration_x = 8 / data_size_from_type(input->data_type());
196 num_elems_written_per_iteration_y = 1;
197 num_elems_read_per_iteration_x = 3 + (num_elems_written_per_iteration_x - 1) * conv_stride_x;
198 num_elems_read_per_iteration_y = 3;
199 }
200 }
201 else
202 {
203 const bool is_dot8_supported = dot8_supported(CLKernelLibrary::get().get_device()) && !is_data_type_quantized_per_channel(weights->data_type());
204
205 kernel_name = is_qasymm ? "dwc_3x3_native_quantized8" : "depthwise_convolution_3x3";
206 kernel_name += (is_qasymm && is_dot8_supported ? "_dot8" : "");
207 kernel_name += (is_qasymm ? "_nchw" : "");
208
209 num_elems_written_per_iteration_x = 8 / data_size_from_type(input->data_type());
210 num_elems_written_per_iteration_y = (is_qasymm && conv_stride_y == 1 && dilation.y() == 1) ? 2 : 1;
211 num_elems_read_per_iteration_x = 3 + (num_elems_written_per_iteration_x - 1) * conv_stride_x + (conv_stride_x > 1 ? 1 : 0);
212 num_elems_read_per_iteration_y = num_elems_written_per_iteration_y + 2;
213 }
214 num_elems_read_per_iteration_x += (num_elems_read_per_iteration_x - 1) * (dilation.x() - 1);
215 num_elems_read_per_iteration_y += (num_elems_read_per_iteration_y - 1) * (dilation.y() - 1);
216
217 // Create window and update padding
218 Window win = calculate_max_window(*output, Steps(num_elems_written_per_iteration_x, num_elems_written_per_iteration_y));
219
220 AccessWindowRectangle input_access(input, -conv_info.pad_left(), -conv_info.pad_top(),
221 num_elems_read_per_iteration_x, num_elems_read_per_iteration_y,
222 conv_stride_x, conv_stride_y);
223 AccessWindowStatic weights_access(weights, 0, 0, 3, 3);
224 AccessWindowRectangle output_access(output, 0, 0, num_elems_written_per_iteration_x, num_elems_written_per_iteration_y);
225
226 bool window_changed = update_window_and_padding(win, input_access, weights_access, output_access);
227
228 output_access.set_valid_region(win, ValidRegion(Coordinates(), output->tensor_shape()));
229
230 Status err = (window_changed) ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!") : Status{};
231 return std::make_pair(err, win);
232 }
233 } // namespace
234
CLDepthwiseConvolutionLayer3x3NCHWKernel()235 CLDepthwiseConvolutionLayer3x3NCHWKernel::CLDepthwiseConvolutionLayer3x3NCHWKernel()
236 : _conv_stride_x(0), _conv_pad_top(0), _conv_pad_left(0)
237 {
238 }
239
border_size() const240 BorderSize CLDepthwiseConvolutionLayer3x3NCHWKernel::border_size() const
241 {
242 return _border_size;
243 }
244
configure(const ICLTensor * input,const ICLTensor * weights,const ICLTensor * biases,ICLTensor * output,const PadStrideInfo & conv_info,unsigned int depth_multiplier,ActivationLayerInfo act_info,const Size2D & dilation,const ICLTensor * output_multipliers,const ICLTensor * output_shifts)245 void CLDepthwiseConvolutionLayer3x3NCHWKernel::configure(const ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output,
246 const PadStrideInfo &conv_info, unsigned int depth_multiplier, ActivationLayerInfo act_info, const Size2D &dilation,
247 const ICLTensor *output_multipliers, const ICLTensor *output_shifts)
248 {
249 configure(CLKernelLibrary::get().get_compile_context(), input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation, output_multipliers, output_shifts);
250 }
251
configure(const CLCompileContext & compile_context,const ICLTensor * input,const ICLTensor * weights,const ICLTensor * biases,ICLTensor * output,const PadStrideInfo & conv_info,unsigned int depth_multiplier,ActivationLayerInfo act_info,const Size2D & dilation,const ICLTensor * output_multipliers,const ICLTensor * output_shifts)252 void CLDepthwiseConvolutionLayer3x3NCHWKernel::configure(const CLCompileContext &compile_context, const ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output,
253 const PadStrideInfo &conv_info, unsigned int depth_multiplier, ActivationLayerInfo act_info, const Size2D &dilation,
254 const ICLTensor *output_multipliers, const ICLTensor *output_shifts)
255 {
256 ARM_COMPUTE_ERROR_ON_NULLPTR(input, weights, output);
257 ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), weights->info(), (biases != nullptr) ? biases->info() : nullptr, output->info(),
258 conv_info, depth_multiplier, act_info, dilation,
259 (output_multipliers != nullptr) ? output_multipliers->info() : nullptr,
260 (output_shifts != nullptr) ? output_shifts->info() : nullptr));
261
262 _input = input;
263 _output = output;
264 _weights = weights;
265 _biases = biases;
266 _conv_stride_x = conv_info.stride().first;
267 _conv_stride_y = conv_info.stride().second;
268 _conv_pad_left = conv_info.pad_left();
269 _conv_pad_top = conv_info.pad_top();
270 _border_size = BorderSize(_conv_pad_top, conv_info.pad_right(), conv_info.pad_bottom(), _conv_pad_left);
271 _output_multipliers = output_multipliers;
272 _output_shifts = output_shifts;
273 _is_quantized = is_data_type_quantized_asymmetric(input->info()->data_type());
274
275 // Configure kernel window
276 std::string kernel_name;
277 const GPUTarget gpu_target = get_target();
278
279 auto win_config = validate_and_configure_window(input->info(), weights->info(), output->info(), conv_info, depth_multiplier, gpu_target, kernel_name, dilation);
280 ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
281 ICLKernel::configure_internal(win_config.second);
282
283 // Set build options
284 CLBuildOptions build_opts;
285 build_opts.add_option("-DACTIVATION_TYPE=" + lower_string(string_from_activation_func(act_info.activation())));
286 build_opts.add_option("-DDST_CHANNELS=" + support::cpp11::to_string(_output->info()->tensor_shape().z()));
287 build_opts.add_option("-DDEPTH_MULTIPLIER=" + support::cpp11::to_string(depth_multiplier));
288 build_opts.add_option("-DCONV_STRIDE_X=" + support::cpp11::to_string(_conv_stride_x));
289 build_opts.add_option("-DDILATION_X=" + support::cpp11::to_string(dilation.x()));
290 build_opts.add_option("-DDILATION_Y=" + support::cpp11::to_string(dilation.y()));
291 build_opts.add_option_if(_biases != nullptr, "-DHAS_BIAS");
292
293 if(_is_quantized)
294 {
295 const UniformQuantizationInfo iq_info = _input->info()->quantization_info().uniform();
296 const UniformQuantizationInfo wq_info = _weights->info()->quantization_info().uniform();
297 const UniformQuantizationInfo oq_info = _output->info()->quantization_info().uniform();
298
299 const bool is_quantized_per_channel = is_data_type_quantized_per_channel(weights->info()->data_type());
300 const bool is_dot8_supported = dot8_supported(CLKernelLibrary::get().get_device()) && !is_quantized_per_channel;
301 build_opts.add_option("-DCONV_STRIDE_Y=" + support::cpp11::to_string(_conv_stride_y));
302 build_opts.add_option("-DINPUT_OFFSET=" + support::cpp11::to_string(-iq_info.offset));
303 build_opts.add_option("-DWEIGHTS_OFFSET=" + support::cpp11::to_string(-wq_info.offset));
304 build_opts.add_option("-DOUTPUT_OFFSET=" + support::cpp11::to_string(oq_info.offset));
305 build_opts.add_option("-DK_OFFSET=" + support::cpp11::to_string(9 * iq_info.offset * wq_info.offset));
306 build_opts.add_option_if(is_quantized_per_channel, "-DPER_CHANNEL_QUANTIZATION");
307 build_opts.add_option_if(is_dot8_supported, "-DIS_DOT8");
308
309 // Compute non-per-channel multiplier and shift anyway to make OpenCL kernel simpler
310 float multiplier = iq_info.scale * wq_info.scale / oq_info.scale;
311 int output_multiplier = 0;
312 int output_shift = 0;
313 quantization::calculate_quantized_multiplier(multiplier, &output_multiplier, &output_shift);
314 build_opts.add_option("-DOUTPUT_MULTIPLIER=" + support::cpp11::to_string(output_multiplier));
315 build_opts.add_option("-DOUTPUT_SHIFT=" + support::cpp11::to_string(output_shift));
316
317 if(act_info.enabled())
318 {
319 int a_val{};
320 int b_val{};
321 std::tie(b_val, a_val) = get_quantized_activation_min_max(act_info, input->info()->data_type(), oq_info);
322
323 const int o1 = oq_info.offset;
324
325 build_opts.add_option("-DA_VAL=" + support::cpp11::to_string(a_val));
326 build_opts.add_option("-DB_VAL=" + support::cpp11::to_string(b_val));
327 build_opts.add_option("-DCONST_0=" + support::cpp11::to_string(o1));
328
329 const float s1 = iq_info.scale;
330 build_opts.add_option("-DS1_VAL=" + float_to_string_with_full_precision(s1));
331 build_opts.add_option("-DO1_VAL=" + support::cpp11::to_string(o1));
332 }
333
334 build_opts.add_option("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
335 build_opts.add_option("-DWEIGHTS_TYPE=" + get_cl_type_from_data_type(weights->info()->data_type()));
336 build_opts.add_option("-DWEIGHTS_PROMOTED_TYPE=" + get_cl_promoted_type_from_data_type(weights->info()->data_type()));
337 }
338 else
339 {
340 build_opts.add_option_if(act_info.enabled(), "-DA_VAL=" + float_to_string_with_full_precision(act_info.a()));
341 build_opts.add_option_if(act_info.enabled(), "-DB_VAL=" + float_to_string_with_full_precision(act_info.b()));
342 build_opts.add_option_if(act_info.enabled(), "-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
343 build_opts.add_option("-DVEC_SIZE=" + support::cpp11::to_string(win_config.second.x().step()));
344 }
345
346 build_opts.add_option_if(input->info()->data_type() == DataType::F16, "-DIS_F16");
347 build_opts.add_option_if(input->info()->data_type() == DataType::F32, "-DIS_F32");
348
349 _kernel = create_kernel(compile_context, kernel_name, build_opts.options());
350
351 // Set config_id for enabling LWS tuning
352 _config_id = kernel_name;
353 _config_id += "_";
354 _config_id += lower_string(string_from_data_type(input->info()->data_type()));
355 _config_id += "_";
356 _config_id += support::cpp11::to_string(input->info()->dimension(0));
357 _config_id += "_";
358 _config_id += support::cpp11::to_string(input->info()->dimension(1));
359 _config_id += "_";
360 _config_id += support::cpp11::to_string(input->info()->dimension(2));
361 _config_id += "_";
362 _config_id += support::cpp11::to_string(output->info()->dimension(0));
363 _config_id += "_";
364 _config_id += support::cpp11::to_string(output->info()->dimension(1));
365 }
366
validate(const ITensorInfo * input,const ITensorInfo * weights,const ITensorInfo * biases,const ITensorInfo * output,const PadStrideInfo & conv_info,unsigned int depth_multiplier,ActivationLayerInfo act_info,GPUTarget gpu_target,const Size2D & dilation,const ITensorInfo * output_multipliers,const ITensorInfo * output_shifts)367 Status CLDepthwiseConvolutionLayer3x3NCHWKernel::validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output,
368 const PadStrideInfo &conv_info, unsigned int depth_multiplier, ActivationLayerInfo act_info, GPUTarget gpu_target,
369 const Size2D &dilation, const ITensorInfo *output_multipliers, const ITensorInfo *output_shifts)
370 {
371 std::string kernel_name;
372 ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation, output_multipliers, output_shifts));
373 ARM_COMPUTE_RETURN_ON_ERROR(validate_and_configure_window(input->clone().get(), weights->clone().get(), output->clone().get(),
374 conv_info, depth_multiplier, gpu_target, kernel_name, dilation)
375 .first);
376
377 return Status{};
378 }
379
run(const Window & window,cl::CommandQueue & queue)380 void CLDepthwiseConvolutionLayer3x3NCHWKernel::run(const Window &window, cl::CommandQueue &queue)
381 {
382 ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
383 ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
384
385 Window collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ);
386
387 // Create input window and adjust
388 Window collapsed_in = collapsed;
389 collapsed_in.adjust(Window::DimX, -_conv_pad_left, true);
390 collapsed_in.adjust(Window::DimY, -_conv_pad_top, true);
391 collapsed_in.set_dimension_step(Window::DimX, collapsed_in.x().step() * _conv_stride_x);
392 collapsed_in.set_dimension_step(Window::DimY, collapsed_in.y().step() * _conv_stride_y);
393
394 Window slice_in = collapsed_in.first_slice_window_3D();
395 Window slice_out = collapsed.first_slice_window_3D();
396 Window slice_weights = window.first_slice_window_3D();
397 slice_weights.set_dimension_step(Window::DimX, 0);
398 slice_weights.set_dimension_step(Window::DimY, 0);
399
400 unsigned int idx = 3 * num_arguments_per_3D_tensor();
401
402 // Set output multipliers in case of quantized data type
403 if(_is_quantized)
404 {
405 Window slice;
406 slice.use_tensor_dimensions(_output_multipliers->info()->tensor_shape());
407 add_1D_tensor_argument(idx, _output_multipliers, slice);
408 add_1D_tensor_argument(idx, _output_shifts, slice);
409 }
410
411 // Set biases
412 if(_biases != nullptr)
413 {
414 Window slice_biases;
415 slice_biases.use_tensor_dimensions(_biases->info()->tensor_shape());
416 add_1D_tensor_argument(idx, _biases, slice_biases);
417 }
418
419 do
420 {
421 idx = 0;
422 add_3D_tensor_argument(idx, _input, slice_in);
423 add_3D_tensor_argument(idx, _output, slice_out);
424 add_3D_tensor_argument(idx, _weights, slice_weights);
425
426 enqueue(queue, *this, slice_out, lws_hint());
427 }
428 while(collapsed.slide_window_slice_3D(slice_out) && collapsed_in.slide_window_slice_3D(slice_in));
429 }
430 } // namespace arm_compute
431