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1 /*
2  * Copyright (c) 2017-2020 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in all
14  * copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 #include "arm_compute/runtime/CL/functions/CLPoolingLayer.h"
25 
26 #include "arm_compute/core/CL/ICLTensor.h"
27 #include "arm_compute/runtime/CL/CLScheduler.h"
28 #include "src/core/CL/kernels/CLFillBorderKernel.h"
29 #include "src/core/CL/kernels/CLPoolingLayerKernel.h"
30 #include "support/MemorySupport.h"
31 
32 namespace arm_compute
33 {
configure(ICLTensor * input,ICLTensor * output,const PoolingLayerInfo & pool_info,ICLTensor * indices)34 void CLPoolingLayer::configure(ICLTensor *input, ICLTensor *output, const PoolingLayerInfo &pool_info, ICLTensor *indices)
35 {
36     configure(CLKernelLibrary::get().get_compile_context(), input, output, pool_info, indices);
37 }
38 
configure(const CLCompileContext & compile_context,ICLTensor * input,ICLTensor * output,const PoolingLayerInfo & pool_info,ICLTensor * indices)39 void CLPoolingLayer::configure(const CLCompileContext &compile_context, ICLTensor *input, ICLTensor *output, const PoolingLayerInfo &pool_info, ICLTensor *indices)
40 {
41     ARM_COMPUTE_ERROR_ON_NULLPTR(input);
42     // Configure pooling kernel
43     auto k = arm_compute::support::cpp14::make_unique<CLPoolingLayerKernel>();
44     k->set_target(CLScheduler::get().target());
45     k->configure(compile_context, input, output, pool_info, indices);
46     _kernel = std::move(k);
47 
48     const DataType data_type = input->info()->data_type();
49 
50     // Configure border depending on operation required (quantize border in case of asymmetric data_type)
51     BorderMode border_mode{};
52     PixelValue pixel_value(0.f);
53     if(is_data_type_quantized_asymmetric(data_type) && !pool_info.exclude_padding)
54     {
55         pixel_value = PixelValue(0, data_type, input->info()->quantization_info());
56     }
57 
58     // Data layout
59     const auto data_layout = pool_info.data_layout == DataLayout::UNKNOWN ? input->info()->data_layout() : pool_info.data_layout;
60 
61     switch(data_layout)
62     {
63         case DataLayout::NCHW:
64             border_mode = (PoolingType::MAX == pool_info.pool_type) ? BorderMode::REPLICATE : BorderMode::CONSTANT;
65             break;
66         case DataLayout::NHWC:
67             border_mode = BorderMode::CONSTANT;
68             if(PoolingType::MAX == pool_info.pool_type)
69             {
70                 if(is_data_type_quantized(data_type))
71                 {
72                     std::tie(pixel_value, std::ignore) = get_min_max(data_type);
73                 }
74                 else
75                 {
76                     pixel_value = PixelValue(std::numeric_limits<float>::lowest());
77                 }
78             }
79             break;
80         default:
81             ARM_COMPUTE_ERROR("Data layout not supported");
82     }
83     _border_handler->configure(compile_context, input, _kernel->border_size(), border_mode, pixel_value);
84 
85     // Tune kernels
86     CLScheduler::get().tune_kernel_static(*_kernel);
87 }
88 
validate(const ITensorInfo * input,const ITensorInfo * output,const PoolingLayerInfo & pool_info,const ITensorInfo * indices)89 Status CLPoolingLayer::validate(const ITensorInfo *input, const ITensorInfo *output, const PoolingLayerInfo &pool_info, const ITensorInfo *indices)
90 {
91     return CLPoolingLayerKernel::validate(input, output, pool_info, indices);
92 }
93 } // namespace arm_compute
94