1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2017-2019 - All Rights Reserved 4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. 5 */ 6/dts-v1/; 7 8#include "stm32mp157.dtsi" 9#include "stm32mp15xc.dtsi" 10#include "stm32mp15-pinctrl.dtsi" 11#include "stm32mp15xxaa-pinctrl.dtsi" 12#include <dt-bindings/clock/stm32mp1-clksrc.h> 13#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi" 14 15/ { 16 model = "STMicroelectronics STM32MP157C eval daughter"; 17 compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; 18 19 chosen { 20 stdout-path = "serial0:115200n8"; 21 }; 22 23 24 memory@c0000000 { 25 device_type = "memory"; 26 reg = <0xC0000000 0x40000000>; 27 }; 28 29 aliases { 30 serial0 = &uart4; 31 }; 32}; 33 34&bsec { 35 board_id: board_id@ec { 36 reg = <0xec 0x4>; 37 status = "okay"; 38 secure-status = "okay"; 39 }; 40}; 41 42&clk_hse { 43 st,digbypass; 44}; 45 46&cpu0 { 47 cpu-supply = <&vddcore>; 48}; 49 50&cpu1 { 51 cpu-supply = <&vddcore>; 52}; 53 54&cryp1 { 55 status="okay"; 56}; 57 58&hash1 { 59 status = "okay"; 60}; 61 62&i2c4 { 63 pinctrl-names = "default"; 64 pinctrl-0 = <&i2c4_pins_a>; 65 i2c-scl-rising-time-ns = <185>; 66 i2c-scl-falling-time-ns = <20>; 67 clock-frequency = <400000>; 68 status = "okay"; 69 70 pmic: stpmic@33 { 71 compatible = "st,stpmic1"; 72 reg = <0x33>; 73 interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>; 74 interrupt-controller; 75 #interrupt-cells = <2>; 76 status = "okay"; 77 78 regulators { 79 compatible = "st,stpmic1-regulators"; 80 ldo1-supply = <&v3v3>; 81 ldo2-supply = <&v3v3>; 82 ldo3-supply = <&vdd_ddr>; 83 ldo5-supply = <&v3v3>; 84 ldo6-supply = <&v3v3>; 85 pwr_sw1-supply = <&bst_out>; 86 pwr_sw2-supply = <&bst_out>; 87 88 vddcore: buck1 { 89 regulator-name = "vddcore"; 90 regulator-min-microvolt = <1200000>; 91 regulator-max-microvolt = <1350000>; 92 regulator-always-on; 93 regulator-initial-mode = <0>; 94 regulator-over-current-protection; 95 }; 96 97 vdd_ddr: buck2 { 98 regulator-name = "vdd_ddr"; 99 regulator-min-microvolt = <1350000>; 100 regulator-max-microvolt = <1350000>; 101 regulator-always-on; 102 regulator-initial-mode = <0>; 103 regulator-over-current-protection; 104 }; 105 106 vdd: buck3 { 107 regulator-name = "vdd"; 108 regulator-min-microvolt = <3300000>; 109 regulator-max-microvolt = <3300000>; 110 regulator-always-on; 111 st,mask-reset; 112 regulator-initial-mode = <0>; 113 regulator-over-current-protection; 114 }; 115 116 v3v3: buck4 { 117 regulator-name = "v3v3"; 118 regulator-min-microvolt = <3300000>; 119 regulator-max-microvolt = <3300000>; 120 regulator-always-on; 121 regulator-over-current-protection; 122 regulator-initial-mode = <0>; 123 }; 124 125 vdda: ldo1 { 126 regulator-name = "vdda"; 127 regulator-min-microvolt = <2900000>; 128 regulator-max-microvolt = <2900000>; 129 }; 130 131 v2v8: ldo2 { 132 regulator-name = "v2v8"; 133 regulator-min-microvolt = <2800000>; 134 regulator-max-microvolt = <2800000>; 135 }; 136 137 vtt_ddr: ldo3 { 138 regulator-name = "vtt_ddr"; 139 regulator-min-microvolt = <500000>; 140 regulator-max-microvolt = <750000>; 141 regulator-always-on; 142 regulator-over-current-protection; 143 }; 144 145 vdd_usb: ldo4 { 146 regulator-name = "vdd_usb"; 147 }; 148 149 vdd_sd: ldo5 { 150 regulator-name = "vdd_sd"; 151 regulator-min-microvolt = <2900000>; 152 regulator-max-microvolt = <2900000>; 153 regulator-boot-on; 154 }; 155 156 v1v8: ldo6 { 157 regulator-name = "v1v8"; 158 regulator-min-microvolt = <1800000>; 159 regulator-max-microvolt = <1800000>; 160 }; 161 162 vref_ddr: vref_ddr { 163 regulator-name = "vref_ddr"; 164 regulator-always-on; 165 }; 166 167 bst_out: boost { 168 regulator-name = "bst_out"; 169 }; 170 171 vbus_otg: pwr_sw1 { 172 regulator-name = "vbus_otg"; 173 }; 174 175 vbus_sw: pwr_sw2 { 176 regulator-name = "vbus_sw"; 177 regulator-active-discharge = <1>; 178 }; 179 }; 180 181 onkey { 182 compatible = "st,stpmic1-onkey"; 183 power-off-time-sec = <10>; 184 status = "okay"; 185 }; 186 187 watchdog { 188 compatible = "st,stpmic1-wdt"; 189 status = "disabled"; 190 }; 191 }; 192}; 193 194&iwdg2 { 195 timeout-sec = <32>; 196 status = "okay"; 197}; 198 199&pwr_regulators { 200 vdd-supply = <&vdd>; 201 vdd_3v3_usbfs-supply = <&vdd_usb>; 202}; 203 204&rcc { 205 secure-status = "disabled"; 206 st,clksrc = < 207 CLK_MPU_PLL1P 208 CLK_AXI_PLL2P 209 CLK_MCU_PLL3P 210 CLK_PLL12_HSE 211 CLK_PLL3_HSE 212 CLK_PLL4_HSE 213 CLK_RTC_LSE 214 CLK_MCO1_DISABLED 215 CLK_MCO2_DISABLED 216 >; 217 218 st,clkdiv = < 219 1 /*MPU*/ 220 0 /*AXI*/ 221 0 /*MCU*/ 222 1 /*APB1*/ 223 1 /*APB2*/ 224 1 /*APB3*/ 225 1 /*APB4*/ 226 2 /*APB5*/ 227 23 /*RTC*/ 228 0 /*MCO1*/ 229 0 /*MCO2*/ 230 >; 231 232 st,pkcs = < 233 CLK_CKPER_HSE 234 CLK_FMC_ACLK 235 CLK_QSPI_ACLK 236 CLK_ETH_DISABLED 237 CLK_SDMMC12_PLL4P 238 CLK_DSI_DSIPLL 239 CLK_STGEN_HSE 240 CLK_USBPHY_HSE 241 CLK_SPI2S1_PLL3Q 242 CLK_SPI2S23_PLL3Q 243 CLK_SPI45_HSI 244 CLK_SPI6_HSI 245 CLK_I2C46_HSI 246 CLK_SDMMC3_PLL4P 247 CLK_USBO_USBPHY 248 CLK_ADC_CKPER 249 CLK_CEC_LSE 250 CLK_I2C12_HSI 251 CLK_I2C35_HSI 252 CLK_UART1_HSI 253 CLK_UART24_HSI 254 CLK_UART35_HSI 255 CLK_UART6_HSI 256 CLK_UART78_HSI 257 CLK_SPDIF_PLL4P 258 CLK_FDCAN_PLL4R 259 CLK_SAI1_PLL3Q 260 CLK_SAI2_PLL3Q 261 CLK_SAI3_PLL3Q 262 CLK_SAI4_PLL3Q 263 CLK_RNG1_LSI 264 CLK_RNG2_LSI 265 CLK_LPTIM1_PCLK1 266 CLK_LPTIM23_PCLK3 267 CLK_LPTIM45_LSE 268 >; 269 270 /* VCO = 1300.0 MHz => P = 650 (CPU) */ 271 pll1: st,pll@0 { 272 cfg = < 2 80 0 0 0 PQR(1,0,0) >; 273 frac = < 0x800 >; 274 }; 275 276 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */ 277 pll2: st,pll@1 { 278 cfg = < 2 65 1 0 0 PQR(1,1,1) >; 279 frac = < 0x1400 >; 280 }; 281 282 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ 283 pll3: st,pll@2 { 284 cfg = < 1 33 1 16 36 PQR(1,1,1) >; 285 frac = < 0x1a04 >; 286 }; 287 288 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ 289 pll4: st,pll@3 { 290 cfg = < 3 98 5 7 7 PQR(1,1,1) >; 291 }; 292}; 293 294&rng1 { 295 status = "okay"; 296}; 297 298&rtc { 299 status = "okay"; 300}; 301 302&sdmmc1 { 303 pinctrl-names = "default"; 304 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; 305 disable-wp; 306 st,sig-dir; 307 st,neg-edge; 308 st,use-ckin; 309 bus-width = <4>; 310 vmmc-supply = <&vdd_sd>; 311 sd-uhs-sdr12; 312 sd-uhs-sdr25; 313 sd-uhs-sdr50; 314 sd-uhs-ddr50; 315 status = "okay"; 316}; 317 318&sdmmc2 { 319 pinctrl-names = "default"; 320 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; 321 non-removable; 322 no-sd; 323 no-sdio; 324 st,neg-edge; 325 bus-width = <8>; 326 vmmc-supply = <&v3v3>; 327 vqmmc-supply = <&vdd>; 328 mmc-ddr-3_3v; 329 status = "okay"; 330}; 331 332&uart4 { 333 pinctrl-names = "default"; 334 pinctrl-0 = <&uart4_pins_a>; 335 status = "okay"; 336}; 337