1 //
2 // Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #include "ActivationTestHelper.hpp"
7
8 #include <armnn_delegate.hpp>
9
10 #include <flatbuffers/flatbuffers.h>
11 #include <tensorflow/lite/interpreter.h>
12 #include <tensorflow/lite/kernels/register.h>
13 #include <tensorflow/lite/model.h>
14 #include <tensorflow/lite/schema/schema_generated.h>
15 #include <tensorflow/lite/version.h>
16
17 #include <doctest/doctest.h>
18
19 namespace armnnDelegate
20 {
21
22
ActivationReLuTest(std::vector<armnn::BackendId> & backends)23 void ActivationReLuTest(std::vector<armnn::BackendId>& backends)
24 {
25
26 std::vector<float> inputData = {
27 -0.1f, -0.2f, -0.3f, -0.4f,
28 0.1f, 0.2f, 0.3f, 0.4f,
29 -1.0f, -2.0f, -3.0f, -4.0f,
30 1.0f, 2.0f, 3.0f, 4.0f
31 };
32
33 // Calculate output values for input.
34 auto f = [](float value)
35 {
36 return std::fmax(0.0f, value);
37 };
38 std::vector<float> outputExpectedData(inputData.size());
39 std::transform(inputData.begin(), inputData.end(), outputExpectedData.begin(), f);
40
41 ActivationTest(tflite::BuiltinOperator_RELU,
42 backends,
43 inputData,
44 outputExpectedData);
45 }
46
ActivationBoundedReluTest(std::vector<armnn::BackendId> & backends)47 void ActivationBoundedReluTest(std::vector<armnn::BackendId>& backends)
48 {
49 std::vector<float> inputData = {
50 -0.1f, -0.2f, -0.3f, -0.4f,
51 0.1f, 0.2f, 0.3f, 0.4f,
52 -1.0f, -2.0f, -3.0f, -4.0f,
53 1.0f, 2.0f, 3.0f, 4.0f
54 };
55
56 const float a = 6.0f;
57 const float b = 0.0f;
58 // Calculate output values for input.
59 auto f = [a, b](float value)
60 {
61 return std::min(a, std::max(b, value));
62 };
63 std::vector<float> outputExpectedData(inputData.size());
64 std::transform(inputData.begin(), inputData.end(), outputExpectedData.begin(), f);
65
66 ActivationTest(tflite::BuiltinOperator_RELU6,
67 backends,
68 inputData,
69 outputExpectedData);
70 }
71
ActivationSigmoidTest(std::vector<armnn::BackendId> & backends)72 void ActivationSigmoidTest(std::vector<armnn::BackendId>& backends)
73 {
74 std::vector<float> inputData = {
75 -0.1f, -0.2f, -0.3f, -0.4f,
76 0.1f, 0.2f, 0.3f, 0.4f,
77 -1.0f, -2.0f, -3.0f, -4.0f,
78 1.0f, 2.0f, 3.0f, 4.0f
79 };
80
81 // Calculate output values for input.
82 auto f = [](float value)
83 {
84 return 1.0f / (1.0f + std::exp(-value));
85 };
86 std::vector<float> outputExpectedData(inputData.size());
87 std::transform(inputData.begin(), inputData.end(), outputExpectedData.begin(), f);
88
89 ActivationTest(tflite::BuiltinOperator_LOGISTIC,
90 backends,
91 inputData,
92 outputExpectedData);
93 }
94
95
ActivationTanHTest(std::vector<armnn::BackendId> & backends)96 void ActivationTanHTest(std::vector<armnn::BackendId>& backends)
97 {
98 std::vector<float> inputData = {
99 -0.1f, -0.2f, -0.3f, -0.4f,
100 0.1f, 0.2f, 0.3f, 0.4f,
101 -1.0f, -2.0f, -3.0f, -4.0f,
102 1.0f, 2.0f, 3.0f, 4.0f
103 };
104
105 // Calculate output values for input.
106 auto f = [](float value)
107 {
108 return tanhf(value);
109 };
110 std::vector<float> outputExpectedData(inputData.size());
111 std::transform(inputData.begin(), inputData.end(), outputExpectedData.begin(), f);
112
113 ActivationTest(tflite::BuiltinOperator_TANH,
114 backends,
115 inputData,
116 outputExpectedData);
117 }
118
119 TEST_SUITE("Activation_CpuRefTests")
120 {
121
122 TEST_CASE ("Activation_ReLu_CpuRef_Test")
123 {
124 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
125 ActivationReLuTest(backends);
126 }
127
128 TEST_CASE ("Activation_Bounded_Relu6_CpuRef_Test")
129 {
130 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
131 ActivationBoundedReluTest(backends);
132 }
133
134 TEST_CASE ("Activation_Sigmoid_CpuRef_Test")
135 {
136 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
137 ActivationSigmoidTest(backends);
138 }
139
140
141 TEST_CASE ("Activation_TanH_CpuRef_Test")
142 {
143 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
144 ActivationTanHTest(backends);
145 }
146
147 }
148
149 TEST_SUITE("Activation_CpuAccTests")
150 {
151
152 TEST_CASE ("Activation_ReLu_CpuAcc_Test")
153 {
154 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
155 ActivationReLuTest(backends);
156 }
157
158 TEST_CASE ("Activation_Bounded_Relu6_CpuAcc_Test")
159 {
160 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
161 ActivationBoundedReluTest(backends);
162 }
163
164 TEST_CASE ("Activation_Sigmoid_CpuAcc_Test")
165 {
166 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
167 ActivationSigmoidTest(backends);
168 }
169
170
171 TEST_CASE ("Activation_TanH_CpuAcc_Test")
172 {
173 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
174 ActivationTanHTest(backends);
175 }
176
177 }
178
179 TEST_SUITE("Activation_GpuAccTests")
180 {
181
182 TEST_CASE ("Activation_ReLu_GpuAcc_Test")
183 {
184 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
185 ActivationReLuTest(backends);
186 }
187
188 TEST_CASE ("Activation_Bounded_Relu6_GpuAcc_Test")
189 {
190 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
191 ActivationBoundedReluTest(backends);
192 }
193
194 TEST_CASE ("Activation_Sigmoid_GpuAcc_Test")
195 {
196 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
197 ActivationSigmoidTest(backends);
198 }
199
200
201 TEST_CASE ("Activation_TanH_GpuAcc_Test")
202 {
203 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
204 ActivationTanHTest(backends);
205 }
206
207 }
208
209 } // namespace armnnDelegate