1 //
2 // Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #include "ClLogicalOrWorkload.hpp"
7
8 #include "ClWorkloadUtils.hpp"
9
10 #include <armnn/utility/PolymorphicDowncast.hpp>
11
12 #include <aclCommon/ArmComputeTensorUtils.hpp>
13
14 #include <cl/ClTensorHandle.hpp>
15
16 namespace armnn
17 {
18 using namespace armcomputetensorutils;
19
ClLogicalOrWorkloadValidate(const TensorInfo & input0,const TensorInfo & input1,const TensorInfo & output)20 arm_compute::Status ClLogicalOrWorkloadValidate(const TensorInfo& input0,
21 const TensorInfo& input1,
22 const TensorInfo& output)
23 {
24 const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0);
25 const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1);
26 const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
27
28 const arm_compute::Status aclStatus = arm_compute::CLLogicalOr::validate(&aclInputInfo0,
29 &aclInputInfo1,
30 &aclOutputInfo);
31 return aclStatus;
32 }
33
ClLogicalOrWorkload(const LogicalBinaryQueueDescriptor & descriptor,const WorkloadInfo & info)34 ClLogicalOrWorkload::ClLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor,
35 const WorkloadInfo& info)
36 : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info)
37 {
38 m_Data.ValidateInputsOutputs("ClLogicalOrWorkload", 2, 1);
39
40 arm_compute::ICLTensor& input0 = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
41 arm_compute::ICLTensor& input1 = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Inputs[1])->GetTensor();
42 arm_compute::ICLTensor& output = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
43
44 m_LogicalOrLayer.configure(&input0, &input1, &output);
45 }
46
Execute() const47 void ClLogicalOrWorkload::Execute() const
48 {
49 ARMNN_SCOPED_PROFILING_EVENT_CL("ClLogicalOrWorkload_Execute");
50 m_LogicalOrLayer.run();
51 }
52
53 } // namespace armnn
54