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1 // Copyright 2017 Google LLC
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //    http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #include "cpuinfo_mips.h"
16 
17 #include "filesystem_for_testing.h"
18 #include "gtest/gtest.h"
19 #include "hwcaps_for_testing.h"
20 #include "internal/stack_line_reader.h"
21 #include "internal/string_view.h"
22 
23 namespace cpu_features {
24 
25 namespace {
26 
DisableHardwareCapabilities()27 void DisableHardwareCapabilities() { SetHardwareCapabilities(0, 0); }
28 
TEST(CpuinfoMipsTest,FromHardwareCapBoth)29 TEST(CpuinfoMipsTest, FromHardwareCapBoth) {
30   SetHardwareCapabilities(MIPS_HWCAP_MSA | MIPS_HWCAP_R6, 0);
31   GetEmptyFilesystem();  // disabling /proc/cpuinfo
32   const auto info = GetMipsInfo();
33   EXPECT_TRUE(info.features.msa);
34   EXPECT_FALSE(info.features.eva);
35   EXPECT_TRUE(info.features.r6);
36 }
37 
TEST(CpuinfoMipsTest,FromHardwareCapOnlyOne)38 TEST(CpuinfoMipsTest, FromHardwareCapOnlyOne) {
39   SetHardwareCapabilities(MIPS_HWCAP_MSA, 0);
40   GetEmptyFilesystem();  // disabling /proc/cpuinfo
41   const auto info = GetMipsInfo();
42   EXPECT_TRUE(info.features.msa);
43   EXPECT_FALSE(info.features.eva);
44 }
45 
TEST(CpuinfoMipsTest,Ci40)46 TEST(CpuinfoMipsTest, Ci40) {
47   DisableHardwareCapabilities();
48   auto& fs = GetEmptyFilesystem();
49   fs.CreateFile("/proc/cpuinfo", R"(system type : IMG Pistachio SoC (B0)
50 machine : IMG Marduk – Ci40 with cc2520
51 processor : 0
52 cpu model : MIPS interAptiv (multi) V2.0 FPU V0.0
53 BogoMIPS : 363.72
54 wait instruction : yes
55 microsecond timers : yes
56 tlb_entries : 64
57 extra interrupt vector : yes
58 hardware watchpoint : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
59 isa : mips1 mips2 mips32r1 mips32r2
60 ASEs implemented : mips16 dsp mt eva
61 shadow register sets : 1
62 kscratch registers : 0
63 package : 0
64 core : 0
65 VCED exceptions : not available
66 VCEI exceptions : not available
67 VPE : 0
68 )");
69   const auto info = GetMipsInfo();
70   EXPECT_FALSE(info.features.msa);
71   EXPECT_TRUE(info.features.eva);
72 }
73 
TEST(CpuinfoMipsTest,AR7161)74 TEST(CpuinfoMipsTest, AR7161) {
75   DisableHardwareCapabilities();
76   auto& fs = GetEmptyFilesystem();
77   fs.CreateFile("/proc/cpuinfo",
78                 R"(system type             : Atheros AR7161 rev 2
79 machine                 : NETGEAR WNDR3700/WNDR3800/WNDRMAC
80 processor               : 0
81 cpu model               : MIPS 24Kc V7.4
82 BogoMIPS                : 452.19
83 wait instruction        : yes
84 microsecond timers      : yes
85 tlb_entries             : 16
86 extra interrupt vector  : yes
87 hardware watchpoint     : yes, count: 4, address/irw mask: [0x0000, 0x0f98, 0x0f78, 0x0df8]
88 ASEs implemented        : mips16
89 shadow register sets    : 1
90 kscratch registers      : 0
91 core                    : 0
92 VCED exceptions         : not available
93 VCEI exceptions         : not available
94 )");
95   const auto info = GetMipsInfo();
96   EXPECT_FALSE(info.features.msa);
97   EXPECT_FALSE(info.features.eva);
98 }
99 
TEST(CpuinfoMipsTest,Goldfish)100 TEST(CpuinfoMipsTest, Goldfish) {
101   DisableHardwareCapabilities();
102   auto& fs = GetEmptyFilesystem();
103   fs.CreateFile("/proc/cpuinfo", R"(system type		: MIPS-Goldfish
104 Hardware		: goldfish
105 Revison		: 1
106 processor		: 0
107 cpu model		: MIPS 24Kc V0.0  FPU V0.0
108 BogoMIPS		: 1042.02
109 wait instruction	: yes
110 microsecond timers	: yes
111 tlb_entries		: 16
112 extra interrupt vector	: yes
113 hardware watchpoint	: yes, count: 1, address/irw mask: [0x0ff8]
114 ASEs implemented	:
115 shadow register sets	: 1
116 core			: 0
117 VCED exceptions		: not available
118 VCEI exceptions		: not available
119 )");
120   const auto info = GetMipsInfo();
121   EXPECT_FALSE(info.features.msa);
122   EXPECT_FALSE(info.features.eva);
123 }
124 
125 }  // namespace
126 }  // namespace cpu_features
127