1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /** @file kms_vblank.c
25 *
26 * This is a test of performance of drmWaitVblank.
27 */
28
29 #include "igt.h"
30 #include <stdlib.h>
31 #include <stdio.h>
32 #include <string.h>
33 #include <fcntl.h>
34 #include <inttypes.h>
35 #include <errno.h>
36 #include <time.h>
37 #include <sys/poll.h>
38 #include <sys/stat.h>
39 #include <sys/time.h>
40 #include <sys/wait.h>
41
42 #include <drm.h>
43
44 #include "intel_bufmgr.h"
45
46 IGT_TEST_DESCRIPTION("Test speed of WaitVblank.");
47
48 typedef struct {
49 igt_display_t display;
50 struct igt_fb primary_fb;
51 igt_output_t *output;
52 enum pipe pipe;
53 unsigned int flags;
54 #define IDLE 0x1
55 #define BUSY 0x2
56 #define FORKED 0x4
57 #define NOHANG 0x8
58 #define MODESET 0x10
59 #define DPMS 0x20
60 #define SUSPEND 0x40
61 #define RPM 0x80
62 } data_t;
63
elapsed(const struct timespec * start,const struct timespec * end,int loop)64 static double elapsed(const struct timespec *start,
65 const struct timespec *end,
66 int loop)
67 {
68 return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop;
69 }
70
prepare_crtc(data_t * data,int fd,igt_output_t * output)71 static void prepare_crtc(data_t *data, int fd, igt_output_t *output)
72 {
73 drmModeModeInfo *mode;
74 igt_display_t *display = &data->display;
75 igt_plane_t *primary;
76
77 igt_display_reset(display);
78
79 /* select the pipe we want to use */
80 igt_output_set_pipe(output, data->pipe);
81
82 /* create and set the primary plane fb */
83 mode = igt_output_get_mode(output);
84 igt_create_color_fb(fd, mode->hdisplay, mode->vdisplay,
85 DRM_FORMAT_XRGB8888,
86 LOCAL_DRM_FORMAT_MOD_NONE,
87 0.0, 0.0, 0.0,
88 &data->primary_fb);
89
90 primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
91 igt_plane_set_fb(primary, &data->primary_fb);
92
93 igt_display_commit(display);
94
95 igt_wait_for_vblank(fd, data->pipe);
96 }
97
cleanup_crtc(data_t * data,int fd,igt_output_t * output)98 static void cleanup_crtc(data_t *data, int fd, igt_output_t *output)
99 {
100 igt_remove_fb(fd, &data->primary_fb);
101 }
102
wait_vblank(int fd,union drm_wait_vblank * vbl)103 static int wait_vblank(int fd, union drm_wait_vblank *vbl)
104 {
105 int err;
106
107 err = 0;
108 if (igt_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, vbl))
109 err = -errno;
110
111 return err;
112 }
113
run_test(data_t * data,void (* testfunc)(data_t *,int,int))114 static void run_test(data_t *data, void (*testfunc)(data_t *, int, int))
115 {
116 igt_display_t *display = &data->display;
117 igt_output_t *output = data->output;
118 int fd = display->drm_fd;
119 igt_hang_t hang;
120
121 prepare_crtc(data, fd, output);
122
123 if (data->flags & RPM)
124 igt_require(igt_setup_runtime_pm());
125
126 igt_info("Beginning %s on pipe %s, connector %s\n",
127 igt_subtest_name(), kmstest_pipe_name(data->pipe),
128 igt_output_name(output));
129
130 if (!(data->flags & NOHANG))
131 hang = igt_hang_ring(fd, I915_EXEC_DEFAULT);
132
133 if (data->flags & BUSY) {
134 union drm_wait_vblank vbl;
135
136 memset(&vbl, 0, sizeof(vbl));
137 vbl.request.type =
138 DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT;
139 vbl.request.type |= kmstest_get_vbl_flag(data->pipe);
140 vbl.request.sequence = 120 + 12;
141 igt_assert_eq(wait_vblank(fd, &vbl), 0);
142 }
143
144 if (data->flags & FORKED) {
145 int nchildren = sysconf(_SC_NPROCESSORS_ONLN);
146
147 igt_debug("Spawning %d threads\n", nchildren);
148
149 igt_fork(child, nchildren)
150 testfunc(data, fd, nchildren);
151 igt_waitchildren();
152 } else
153 testfunc(data, fd, 1);
154
155 if (data->flags & BUSY) {
156 struct drm_event_vblank buf;
157 igt_assert_eq(read(fd, &buf, sizeof(buf)), sizeof(buf));
158 }
159
160 igt_assert(poll(&(struct pollfd){fd, POLLIN}, 1, 0) == 0);
161
162 if (!(data->flags & NOHANG))
163 igt_post_hang_ring(fd, hang);
164
165 igt_info("\n%s on pipe %s, connector %s: PASSED\n\n",
166 igt_subtest_name(), kmstest_pipe_name(data->pipe), igt_output_name(output));
167
168 /* cleanup what prepare_crtc() has done */
169 cleanup_crtc(data, fd, output);
170 }
171
crtc_id_subtest(data_t * data,int fd)172 static void crtc_id_subtest(data_t *data, int fd)
173 {
174 igt_display_t *display = &data->display;
175 igt_output_t *output;
176 enum pipe p;
177
178 for_each_pipe_with_valid_output(display, p, output) {
179 struct drm_event_vblank buf;
180 const uint32_t pipe_id_flag = kmstest_get_vbl_flag(p);
181 unsigned crtc_id, expected_crtc_id;
182 uint64_t val;
183 union drm_wait_vblank vbl;
184
185 crtc_id = display->pipes[p].crtc_id;
186 if (drmGetCap(display->drm_fd, DRM_CAP_CRTC_IN_VBLANK_EVENT, &val) == 0)
187 expected_crtc_id = crtc_id;
188 else
189 expected_crtc_id = 0;
190
191 data->pipe = p;
192 prepare_crtc(data, fd, output);
193
194 memset(&vbl, 0, sizeof(vbl));
195 vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT;
196 vbl.request.type |= pipe_id_flag;
197 vbl.request.sequence = 1;
198 igt_assert_eq(wait_vblank(fd, &vbl), 0);
199
200 igt_assert_eq(read(fd, &buf, sizeof(buf)), sizeof(buf));
201 igt_assert_eq(buf.crtc_id, expected_crtc_id);
202
203 do_or_die(drmModePageFlip(fd, crtc_id,
204 data->primary_fb.fb_id,
205 DRM_MODE_PAGE_FLIP_EVENT, NULL));
206
207 igt_assert_eq(read(fd, &buf, sizeof(buf)), sizeof(buf));
208 igt_assert_eq(buf.crtc_id, expected_crtc_id);
209
210 if (display->is_atomic) {
211 igt_plane_t *primary = igt_output_get_plane(output, 0);
212
213 igt_plane_set_fb(primary, &data->primary_fb);
214 igt_display_commit_atomic(display, DRM_MODE_PAGE_FLIP_EVENT, NULL);
215
216 igt_assert_eq(read(fd, &buf, sizeof(buf)), sizeof(buf));
217 igt_assert_eq(buf.crtc_id, expected_crtc_id);
218 }
219
220 cleanup_crtc(data, fd, output);
221 return;
222 }
223 }
224
accuracy(data_t * data,int fd,int nchildren)225 static void accuracy(data_t *data, int fd, int nchildren)
226 {
227 const uint32_t pipe_id_flag = kmstest_get_vbl_flag(data->pipe);
228 union drm_wait_vblank vbl;
229 unsigned long target;
230 int total = 120 / nchildren;
231 int n;
232
233 memset(&vbl, 0, sizeof(vbl));
234 vbl.request.type = _DRM_VBLANK_RELATIVE;
235 vbl.request.type |= pipe_id_flag;
236 vbl.request.sequence = 1;
237 igt_assert_eq(wait_vblank(fd, &vbl), 0);
238
239 target = vbl.reply.sequence + total;
240 for (n = 0; n < total; n++) {
241 vbl.request.type = _DRM_VBLANK_RELATIVE;
242 vbl.request.type |= pipe_id_flag;
243 vbl.request.sequence = 1;
244 igt_assert_eq(wait_vblank(fd, &vbl), 0);
245
246 vbl.request.type = _DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_EVENT;
247 vbl.request.type |= pipe_id_flag;
248 vbl.request.sequence = target;
249 igt_assert_eq(wait_vblank(fd, &vbl), 0);
250 }
251 vbl.request.type = _DRM_VBLANK_RELATIVE;
252 vbl.request.type |= pipe_id_flag;
253 vbl.request.sequence = 0;
254 igt_assert_eq(wait_vblank(fd, &vbl), 0);
255 igt_assert_eq(vbl.reply.sequence, target);
256
257 for (n = 0; n < total; n++) {
258 struct drm_event_vblank ev;
259 igt_assert_eq(read(fd, &ev, sizeof(ev)), sizeof(ev));
260 igt_assert_eq(ev.sequence, target);
261 }
262 }
263
vblank_query(data_t * data,int fd,int nchildren)264 static void vblank_query(data_t *data, int fd, int nchildren)
265 {
266 const uint32_t pipe_id_flag = kmstest_get_vbl_flag(data->pipe);
267 union drm_wait_vblank vbl;
268 struct timespec start, end;
269 unsigned long sq, count = 0;
270
271 memset(&vbl, 0, sizeof(vbl));
272 vbl.request.type = _DRM_VBLANK_RELATIVE;
273 vbl.request.type |= pipe_id_flag;
274 vbl.request.sequence = 0;
275 igt_assert_eq(wait_vblank(fd, &vbl), 0);
276
277 sq = vbl.reply.sequence;
278
279 clock_gettime(CLOCK_MONOTONIC, &start);
280 do {
281 vbl.request.type = _DRM_VBLANK_RELATIVE;
282 vbl.request.type |= pipe_id_flag;
283 vbl.request.sequence = 0;
284 igt_assert_eq(wait_vblank(fd, &vbl), 0);
285 count++;
286 } while ((vbl.reply.sequence - sq) <= 120);
287 clock_gettime(CLOCK_MONOTONIC, &end);
288
289 igt_info("Time to query current counter (%s): %7.3fµs\n",
290 data->flags & BUSY ? "busy" : "idle", elapsed(&start, &end, count));
291 }
292
vblank_wait(data_t * data,int fd,int nchildren)293 static void vblank_wait(data_t *data, int fd, int nchildren)
294 {
295 const uint32_t pipe_id_flag = kmstest_get_vbl_flag(data->pipe);
296 union drm_wait_vblank vbl;
297 struct timespec start, end;
298 unsigned long sq, count = 0;
299
300 memset(&vbl, 0, sizeof(vbl));
301 vbl.request.type = _DRM_VBLANK_RELATIVE;
302 vbl.request.type |= pipe_id_flag;
303 vbl.request.sequence = 0;
304 igt_assert_eq(wait_vblank(fd, &vbl), 0);
305
306 sq = vbl.reply.sequence;
307
308 clock_gettime(CLOCK_MONOTONIC, &start);
309 do {
310 vbl.request.type = _DRM_VBLANK_RELATIVE;
311 vbl.request.type |= pipe_id_flag;
312 vbl.request.sequence = 1;
313 igt_assert_eq(wait_vblank(fd, &vbl), 0);
314 count++;
315 } while ((vbl.reply.sequence - sq) <= 120);
316 clock_gettime(CLOCK_MONOTONIC, &end);
317
318 igt_info("Time to wait for %ld/%d vblanks (%s): %7.3fµs\n",
319 count, (int)(vbl.reply.sequence - sq),
320 data->flags & BUSY ? "busy" : "idle",
321 elapsed(&start, &end, count));
322 }
323
get_vblank(int fd,enum pipe pipe,unsigned flags)324 static int get_vblank(int fd, enum pipe pipe, unsigned flags)
325 {
326 union drm_wait_vblank vbl;
327
328 memset(&vbl, 0, sizeof(vbl));
329 vbl.request.type = DRM_VBLANK_RELATIVE | kmstest_get_vbl_flag(pipe) | flags;
330 do_or_die(igt_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl));
331
332 return vbl.reply.sequence;
333 }
334
335 #define VBLANK_ERR 5
336
vblank_ts_cont(data_t * data,int fd,int nchildren)337 static void vblank_ts_cont(data_t *data, int fd, int nchildren)
338 {
339 igt_display_t *display = &data->display;
340 igt_output_t *output = data->output;
341 int seq1, seq2;
342 union drm_wait_vblank vbl;
343 struct timespec start, end;
344 int estimated_vblanks = 0;
345 int vrefresh = igt_output_get_mode(output)->vrefresh;
346 double time_elapsed;
347
348 seq1 = get_vblank(fd, data->pipe, 0);
349 clock_gettime(CLOCK_MONOTONIC, &start);
350
351 if (data->flags & DPMS) {
352 igt_output_set_prop_value(output, IGT_CONNECTOR_DPMS, DRM_MODE_DPMS_OFF);
353 igt_display_commit(display);
354 }
355
356 if (data->flags & MODESET) {
357 igt_output_set_pipe(output, PIPE_NONE);
358 igt_display_commit2(display, display->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
359 }
360
361 if (data->flags & RPM)
362 igt_require(igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_SUSPENDED));
363
364 if (data->flags & SUSPEND)
365 igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
366 SUSPEND_TEST_NONE);
367
368 if (data->flags & (MODESET | DPMS)) {
369 /* Attempting to do a vblank while disabled should return -EINVAL */
370 memset(&vbl, 0, sizeof(vbl));
371 vbl.request.type = _DRM_VBLANK_RELATIVE;
372 vbl.request.type |= kmstest_get_vbl_flag(data->pipe);
373 igt_assert_eq(wait_vblank(fd, &vbl), -EINVAL);
374 }
375
376 if (data->flags & DPMS) {
377 igt_output_set_prop_value(output, IGT_CONNECTOR_DPMS, DRM_MODE_DPMS_ON);
378 igt_display_commit(display);
379 }
380
381 if (data->flags & MODESET) {
382 igt_output_set_pipe(output, data->pipe);
383 igt_display_commit2(display, display->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
384 }
385
386 seq2 = get_vblank(fd, data->pipe, 0);
387 clock_gettime(CLOCK_MONOTONIC, &end);
388
389 time_elapsed = igt_time_elapsed(&start, &end);
390 estimated_vblanks = (int)(time_elapsed * vrefresh);
391
392 igt_debug("testing ts continuity: Current frame %u, old frame %u\n", seq2, seq1);
393
394 igt_assert_f(seq2 - seq1 >= 0, "elapsed %f(%d vblanks) unexpected vblank seq %u, should be > %u\n", time_elapsed,
395 estimated_vblanks, seq2, seq1);
396 igt_assert_f(seq2 - seq1 <= estimated_vblanks + VBLANK_ERR, "elapsed %f(%d vblanks) unexpected vblank seq %u, should be <= %u\n", time_elapsed,
397 estimated_vblanks, seq2, seq1 + estimated_vblanks);
398 }
399
run_subtests_for_pipe(data_t * data)400 static void run_subtests_for_pipe(data_t *data)
401 {
402 const struct {
403 const char *name;
404 void (*func)(data_t *, int, int);
405 unsigned int valid;
406 } funcs[] = {
407 /*
408 * GPU reset recovery may disable irqs or reset display, so
409 * accuracy tests will fail in the hang case, disable this test.
410 */
411 { "accuracy", accuracy, IDLE | NOHANG },
412 { "query", vblank_query, IDLE | FORKED | BUSY },
413 { "wait", vblank_wait, IDLE | FORKED | BUSY },
414 { "ts-continuation", vblank_ts_cont, IDLE | SUSPEND | MODESET | DPMS | RPM },
415 { }
416 }, *f;
417
418 const struct {
419 const char *name;
420 unsigned int flags;
421 } modes[] = {
422 { "idle", IDLE },
423 { "forked", IDLE | FORKED },
424 { "busy", BUSY },
425 { "forked-busy", BUSY | FORKED },
426 { "dpms-rpm", DPMS | RPM | NOHANG },
427 { "dpms-suspend", DPMS | SUSPEND | NOHANG},
428 { "suspend", SUSPEND | NOHANG },
429 { "modeset", MODESET },
430 { "modeset-rpm", MODESET | RPM | NOHANG},
431 { }
432 }, *m;
433
434 igt_fixture
435 igt_display_require_output_on_pipe(&data->display, data->pipe);
436
437 for (f = funcs; f->name; f++) {
438 for (m = modes; m->name; m++) {
439 if (m->flags & ~(f->valid | NOHANG))
440 continue;
441
442 igt_subtest_f("pipe-%s-%s-%s",
443 kmstest_pipe_name(data->pipe),
444 f->name, m->name) {
445 for_each_valid_output_on_pipe(&data->display, data->pipe, data->output) {
446 data->flags = m->flags | NOHANG;
447 run_test(data, f->func);
448 }
449 }
450
451 /* Skip the -hang version if NOHANG flag is set */
452 if (f->valid & NOHANG || m->flags & NOHANG)
453 continue;
454
455 igt_subtest_f("pipe-%s-%s-%s-hang",
456 kmstest_pipe_name(data->pipe),
457 f->name, m->name) {
458 igt_hang_t hang;
459
460 hang = igt_allow_hang(data->display.drm_fd, 0, 0);
461 for_each_valid_output_on_pipe(&data->display, data->pipe, data->output) {
462 data->flags = m->flags;
463 run_test(data, f->func);
464 }
465 igt_disallow_hang(data->display.drm_fd, hang);
466 }
467 }
468 }
469 }
470
invalid_subtest(data_t * data,int fd)471 static void invalid_subtest(data_t *data, int fd)
472 {
473 union drm_wait_vblank vbl;
474 unsigned long valid_flags;
475
476 igt_display_require_output_on_pipe(&data->display, 0);
477
478 /* First check all is well with a simple query */
479 memset(&vbl, 0, sizeof(vbl));
480 vbl.request.type = _DRM_VBLANK_RELATIVE;
481 igt_assert_eq(wait_vblank(fd, &vbl), 0);
482
483 valid_flags = (_DRM_VBLANK_TYPES_MASK |
484 _DRM_VBLANK_FLAGS_MASK |
485 _DRM_VBLANK_HIGH_CRTC_MASK);
486
487 /* pick some interesting invalid permutations */
488 memset(&vbl, 0, sizeof(vbl));
489 vbl.request.type = _DRM_VBLANK_RELATIVE | ~valid_flags;
490 igt_assert_eq(wait_vblank(fd, &vbl), -EINVAL);
491 for (int bit = 0; bit < 32; bit++) {
492 int err;
493
494 if (valid_flags & (1 << bit))
495 continue;
496
497 memset(&vbl, 0, sizeof(vbl));
498 vbl.request.type = _DRM_VBLANK_RELATIVE | (1 << bit);
499 err = wait_vblank(fd, &vbl);
500 igt_assert_f(err == -EINVAL,
501 "vblank wait with invalid request.type bit %d [0x%08x] did not report -EINVAL, got %d\n",
502 bit, 1 << bit, err);
503 }
504
505 /* check the maximum pipe, nobody should have that many pipes! */
506 memset(&vbl, 0, sizeof(vbl));
507 vbl.request.type = _DRM_VBLANK_RELATIVE;
508 vbl.request.type |= _DRM_VBLANK_SECONDARY;
509 vbl.request.type |= _DRM_VBLANK_FLAGS_MASK;
510 igt_assert_eq(wait_vblank(fd, &vbl), -EINVAL);
511 }
512
513 igt_main
514 {
515 int fd;
516 data_t data;
517
518 igt_skip_on_simulation();
519
520 igt_fixture {
521 fd = drm_open_driver_master(DRIVER_ANY);
522 kmstest_set_vt_graphics_mode();
523 igt_display_require(&data.display, fd);
524 igt_display_require_output(&data.display);
525 }
526
527 igt_subtest("invalid")
528 invalid_subtest(&data, fd);
529
530 igt_subtest("crtc-id")
531 crtc_id_subtest(&data, fd);
532
533 for_each_pipe_static(data.pipe)
534 igt_subtest_group
535 run_subtests_for_pipe(&data);
536 }
537