1#!/usr/bin/env python3 2# Copyright 2021 The Pigweed Authors 3# 4# Licensed under the Apache License, Version 2.0 (the "License"); you may not 5# use this file except in compliance with the License. You may obtain a copy of 6# the License at 7# 8# https://www.apache.org/licenses/LICENSE-2.0 9# 10# Unless required by applicable law or agreed to in writing, software 11# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 12# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the 13# License for the specific language governing permissions and limitations under 14# the License. 15"""Finds files for a given product.""" 16 17import unittest 18 19from pw_stm32cube_build import icf_to_ld 20 21 22class ParseIcfTest(unittest.TestCase): 23 """parse_icf tests.""" 24 TEST_ICF_1 = """ 25/*test comments*/ 26// some other comments 27define symbol __ICFEDIT_intvec_start__ = 0x08000000; 28/*-Memory Regions-*/ 29define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 30define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 31define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 32define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 33 34/*-Sizes-*/ 35define symbol __ICFEDIT_size_cstack__ = 0x400; 36define symbol __ICFEDIT_size_heap__ = 0x200; 37/**** End of ICF editor section. ###ICF###*/ 38 39define symbol __region_SRAM1_start__ = 0x20000000; 40define symbol __region_SRAM1_end__ = 0x2002FFFF; 41define symbol __region_SRAM2_start__ = 0x20030000; 42define symbol __region_SRAM2_end__ = 0x2003FFFF; 43 44define memory mem with size = 4G; 45define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 46define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 47define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 48define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 49 50define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 51define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 52 53initialize by copy { readwrite }; 54do not initialize { section .noinit }; 55 56place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 57 58place in ROM_region { readonly }; 59place in RAM_region { readwrite, 60 block CSTACK, block HEAP }; 61place in SRAM1_region { }; 62place in SRAM2_region { }; 63""" 64 65 TEST_ICF_2 = """ 66/*test comments*/ 67// some other comments 68/*-Specials-*/ 69define symbol __ICFEDIT_intvec_start__ = 0x08000000; 70/*-Memory Regions-*/ 71define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 72define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 73define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 74define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 75define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 76define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 77/*-Sizes-*/ 78define symbol __ICFEDIT_size_cstack__ = 0x400; 79define symbol __ICFEDIT_size_heap__ = 0x200; 80/**** End of ICF editor section. ###ICF###*/ 81 82 83define memory mem with size = 4G; 84define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 85define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 86define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 87 88define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 89define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 90 91initialize by copy { readwrite }; 92do not initialize { section .noinit }; 93 94place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 95 96place in ROM_region { readonly }; 97place in RAM_region { readwrite, 98 block CSTACK, block HEAP }; 99""" 100 101 def test_parse_icf_2(self): 102 regions, blocks = icf_to_ld.parse_icf(self.TEST_ICF_2) 103 104 self.assertEqual( 105 { 106 'ROM': ('0x08000000', '0x081FFFFF'), 107 'RAM': ('0x20000000', '0x2002FFFF'), 108 'CCMRAM': ('0x10000000', '0x1000FFFF'), 109 }, regions) 110 111 self.assertEqual( 112 { 113 'CSTACK': { 114 'alignment': '8', 115 'size': '0x400' 116 }, 117 'HEAP': { 118 'alignment': '8', 119 'size': '0x200' 120 }, 121 }, blocks) 122 123 124class IcfRegionsToLdRegionsTest(unittest.TestCase): 125 """icf_regions_to_ld_regions tests.""" 126 def test_icf_region(self): 127 ld_regions = icf_to_ld.icf_regions_to_ld_regions({ 128 'ROM': ('0x08000000', '0x081FFFFF'), 129 'RAM': ('0x20000000', '0x2002FFFF'), 130 'CCMRAM': ('0x10000000', '0x1000FFFF'), 131 }) 132 133 self.assertEqual( 134 { 135 'FLASH': ('0x08000000', '2048K'), 136 'RAM': ('0x20000000', '192K'), 137 'CCMRAM': ('0x10000000', '64K'), 138 }, ld_regions) 139 140 def test_icf_region_off_by_one(self): 141 ld_regions = icf_to_ld.icf_regions_to_ld_regions({ 142 'ROM': ('0x08000000', '0x080FFFFF'), 143 'RAM': ('0x20000000', '0x20020000'), 144 }) 145 146 self.assertEqual( 147 { 148 'FLASH': ('0x08000000', '1024K'), 149 'RAM': ('0x20000000', '128K'), 150 }, ld_regions) 151 152 153class CreateLdTest(unittest.TestCase): 154 """create_ld tests.""" 155 def test_create_ld(self): 156 ld_str = icf_to_ld.create_ld( 157 { 158 'FLASH': ('0x08000000', '2048K'), 159 'RAM': ('0x20000000', '192K'), 160 'CCMRAM': ('0x10000000', '64K'), 161 }, { 162 'CSTACK': { 163 'alignment': '8', 164 'size': '0x400' 165 }, 166 'HEAP': { 167 'alignment': '8', 168 'size': '0x200' 169 }, 170 }) 171 172 self.assertTrue( 173 'RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K' in ld_str) 174 self.assertTrue( 175 'FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K' in ld_str) 176 177 178if __name__ == '__main__': 179 unittest.main() 180