1 use gdbstub::arch::RegId; 2 3 /// RISC-V Register identifier. 4 #[derive(Debug, Clone, Copy)] 5 #[non_exhaustive] 6 pub enum RiscvRegId<U> { 7 /// General Purpose Register (x0-x31). 8 Gpr(u8), 9 /// Floating Point Register (f0-f31). 10 Fpr(u8), 11 /// Program Counter. 12 Pc, 13 /// Control and Status Register. 14 Csr(u16), 15 /// Privilege level. 16 Priv, 17 18 #[doc(hidden)] 19 _Marker(core::marker::PhantomData<U>), 20 } 21 22 macro_rules! impl_riscv_reg_id { 23 ($usize:ty) => { 24 impl RegId for RiscvRegId<$usize> { 25 fn from_raw_id(id: usize) -> Option<(Self, usize)> { 26 const USIZE: usize = core::mem::size_of::<$usize>(); 27 28 let reg_size = match id { 29 0..=31 => (Self::Gpr(id as u8), USIZE), 30 32 => (Self::Pc, USIZE), 31 33..=64 => (Self::Fpr((id - 33) as u8), USIZE), 32 65..=4160 => (Self::Csr((id - 65) as u16), USIZE), 33 4161 => (Self::Priv, 1), 34 _ => return None, 35 }; 36 Some(reg_size) 37 } 38 } 39 }; 40 } 41 42 impl_riscv_reg_id!(u32); 43 impl_riscv_reg_id!(u64); 44