1 //===-- VEMCTargetDesc.cpp - VE Target Descriptions -----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides VE specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "VEMCTargetDesc.h"
14 #include "InstPrinter/VEInstPrinter.h"
15 #include "VEMCAsmInfo.h"
16 #include "VETargetStreamer.h"
17 #include "llvm/MC/MCInstrInfo.h"
18 #include "llvm/MC/MCRegisterInfo.h"
19 #include "llvm/MC/MCSubtargetInfo.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/TargetRegistry.h"
22
23 using namespace llvm;
24
25 #define GET_INSTRINFO_MC_DESC
26 #include "VEGenInstrInfo.inc"
27
28 #define GET_SUBTARGETINFO_MC_DESC
29 #include "VEGenSubtargetInfo.inc"
30
31 #define GET_REGINFO_MC_DESC
32 #include "VEGenRegisterInfo.inc"
33
createVEMCAsmInfo(const MCRegisterInfo & MRI,const Triple & TT,const MCTargetOptions & Options)34 static MCAsmInfo *createVEMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT,
35 const MCTargetOptions &Options) {
36 MCAsmInfo *MAI = new VEELFMCAsmInfo(TT);
37 unsigned Reg = MRI.getDwarfRegNum(VE::SX11, true);
38 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
39 MAI->addInitialFrameState(Inst);
40 return MAI;
41 }
42
createVEMCInstrInfo()43 static MCInstrInfo *createVEMCInstrInfo() {
44 MCInstrInfo *X = new MCInstrInfo();
45 InitVEMCInstrInfo(X);
46 return X;
47 }
48
createVEMCRegisterInfo(const Triple & TT)49 static MCRegisterInfo *createVEMCRegisterInfo(const Triple &TT) {
50 MCRegisterInfo *X = new MCRegisterInfo();
51 InitVEMCRegisterInfo(X, VE::SX10);
52 return X;
53 }
54
createVEMCSubtargetInfo(const Triple & TT,StringRef CPU,StringRef FS)55 static MCSubtargetInfo *createVEMCSubtargetInfo(const Triple &TT, StringRef CPU,
56 StringRef FS) {
57 if (CPU.empty())
58 CPU = "ve";
59 return createVEMCSubtargetInfoImpl(TT, CPU, FS);
60 }
61
62 static MCTargetStreamer *
createObjectTargetStreamer(MCStreamer & S,const MCSubtargetInfo & STI)63 createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
64 return new VETargetELFStreamer(S);
65 }
66
createTargetAsmStreamer(MCStreamer & S,formatted_raw_ostream & OS,MCInstPrinter * InstPrint,bool isVerboseAsm)67 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
68 formatted_raw_ostream &OS,
69 MCInstPrinter *InstPrint,
70 bool isVerboseAsm) {
71 return new VETargetAsmStreamer(S, OS);
72 }
73
createVEMCInstPrinter(const Triple & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI)74 static MCInstPrinter *createVEMCInstPrinter(const Triple &T,
75 unsigned SyntaxVariant,
76 const MCAsmInfo &MAI,
77 const MCInstrInfo &MII,
78 const MCRegisterInfo &MRI) {
79 return new VEInstPrinter(MAI, MII, MRI);
80 }
81
LLVMInitializeVETargetMC()82 extern "C" void LLVMInitializeVETargetMC() {
83 // Register the MC asm info.
84 RegisterMCAsmInfoFn X(getTheVETarget(), createVEMCAsmInfo);
85
86 for (Target *T : {&getTheVETarget()}) {
87 // Register the MC instruction info.
88 TargetRegistry::RegisterMCInstrInfo(*T, createVEMCInstrInfo);
89
90 // Register the MC register info.
91 TargetRegistry::RegisterMCRegInfo(*T, createVEMCRegisterInfo);
92
93 // Register the MC subtarget info.
94 TargetRegistry::RegisterMCSubtargetInfo(*T, createVEMCSubtargetInfo);
95
96 // Register the object target streamer.
97 TargetRegistry::RegisterObjectTargetStreamer(*T,
98 createObjectTargetStreamer);
99
100 // Register the asm streamer.
101 TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
102
103 // Register the MCInstPrinter
104 TargetRegistry::RegisterMCInstPrinter(*T, createVEMCInstPrinter);
105 }
106 }
107