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1 /*
2  * Copyright (C) 2012 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 /**
18  * Project HWC 2.0 Design
19  */
20 
21 #ifndef _EXYNOSMPP_H
22 #define _EXYNOSMPP_H
23 
24 #include <utils/Thread.h>
25 #include <utils/Mutex.h>
26 #include <utils/Condition.h>
27 #include <utils/String8.h>
28 #include <utils/StrongPointer.h>
29 #include <utils/List.h>
30 #include <utils/Vector.h>
31 #include <map>
32 #include <hardware/exynos/acryl.h>
33 #include <map>
34 #include "ExynosHWCModule.h"
35 #include "ExynosHWCHelper.h"
36 #include "ExynosMPPType.h"
37 
38 class ExynosDisplay;
39 class ExynosMPP;
40 class ExynosResourceManager;
41 
42 #ifndef NUM_MPP_DST_BUFS
43 #define NUM_MPP_DST_BUFS_DEFAULT 3
44 /*
45  * Buffer number can be different according to type
46  * #define NUM_MPP_DST_BUFS(type) ((type == MPP_LOGICAL_G2D_RGB) ? 3:2)
47  */
48 #define NUM_MPP_DST_BUFS(type) (3)
49 #endif
50 
51 #ifndef G2D_MAX_SRC_NUM
52 #define G2D_MAX_SRC_NUM 15
53 #endif
54 
55 #define G2D_JUSTIFIED_DST_ALIGN     16
56 
57 #define NUM_MPP_SRC_BUFS G2D_MAX_SRC_NUM
58 
59 #ifndef G2D_RESTRICTIVE_SRC_NUM
60 #define G2D_RESTRICTIVE_SRC_NUM   5
61 #endif
62 
63 #ifndef G2D_BASE_PPC
64 #define G2D_BASE_PPC 2.8
65 #endif
66 #ifndef G2D_DST_BASE_PPC
67 #define G2D_DST_BASE_PPC 3.5
68 #endif
69 #ifndef G2D_DST_BASE_PPC_YUV420
70 #define G2D_DST_BASE_PPC_YUV420 2.8
71 #endif
72 #ifndef G2D_DST_BASE_PPC_ROT
73 #define G2D_DST_BASE_PPC_ROT  2.4
74 #endif
75 #ifndef G2D_BASE_PPC_COLORFILL
76 #define G2D_BASE_PPC_COLORFILL  3.8
77 #endif
78 
79 #ifndef G2D_CLOCK
80 #define G2D_CLOCK   711000
81 #endif
82 
83 #ifndef MSC_CLOCK
84 #define MSC_CLOCK   534000
85 #endif
86 
87 #ifndef VPP_CLOCK
88 #define VPP_CLOCK 664000
89 #endif
90 #ifndef VPP_MIC_FACTOR
91 #define VPP_MIC_FACTOR  2
92 #endif
93 
94 #ifndef VPP_TE_PERIOD
95 #define VPP_TE_PERIOD 63
96 #endif
97 #ifndef VPP_MARGIN
98 #define VPP_MARGIN 1.1
99 #endif
100 #ifndef VPP_BUBBLE
101 #define VPP_BUBBLE 0.06
102 #endif
103 
104 #define VPP_RESOL_CLOCK_FACTOR (VPP_TE_PERIOD * VPP_MARGIN)
105 #define VPP_RESOL_MARGIN (VPP_MARGIN + VPP_BUBBLE)
106 #ifndef VPP_DISP_FACTOR
107 #define VPP_DISP_FACTOR 1.0
108 #endif
109 #ifndef VPP_PIXEL_PER_CLOCK
110 #define VPP_PIXEL_PER_CLOCK 2
111 #endif
112 
113 #ifndef MPP_G2D_CAPACITY
114 #define MPP_G2D_CAPACITY    8
115 #endif
116 #ifndef MPP_MSC_CAPACITY
117 #define MPP_MSC_CAPACITY    8
118 #endif
119 
120 /* Currently allowed capacity percentage is over 10% */
121 #define MPP_CAPA_OVER_THRESHOLD 1.1
122 
123 #ifndef MPP_G2D_SRC_SCALED_WEIGHT
124 #define MPP_G2D_SRC_SCALED_WEIGHT   1.125
125 #endif
126 
127 #ifndef MPP_G2D_DST_ROT_WEIGHT
128 #define MPP_G2D_DST_ROT_WEIGHT  2.0
129 #endif
130 
131 #define MPP_DUMP_PATH  "/data/vendor/log/hwc/output.dat"
132 
133 using namespace android;
134 
135 enum {
136     eMPPSaveCapability            =     1ULL << 0,
137     eMPPStrideCrop                =     1ULL << 1,
138     eMPPUnsupportedRotation       =     1ULL << 2,
139     eMPPHWBusy                    =     1ULL << 3,
140     eMPPExeedSrcCropMax           =     1ULL << 4,
141     eMPPUnsupportedColorTransform =     1ULL << 5,
142     eMPPUnsupportedBlending       =     1ULL << 6,
143     eMPPUnsupportedFormat         =     1ULL << 7,
144     eMPPNotAlignedDstSize         =     1ULL << 8,
145     eMPPNotAlignedSrcCropPosition =     1ULL << 9,
146     eMPPNotAlignedHStride         =     1ULL << 10,
147     eMPPNotAlignedVStride         =     1ULL << 11,
148     eMPPExceedHStrideMaximum      =     1ULL << 12,
149     eMPPExceedVStrideMaximum      =     1ULL << 13,
150     eMPPExeedMaxDownScale         =     1ULL << 14,
151     eMPPExeedMaxDstWidth          =     1ULL << 15,
152     eMPPExeedMaxDstHeight         =     1ULL << 16,
153     eMPPExeedMinSrcWidth          =     1ULL << 17,
154     eMPPExeedMinSrcHeight         =     1ULL << 18,
155     eMPPExeedMaxUpScale           =     1ULL << 19,
156     eMPPExeedSrcWCropMax          =     1ULL << 20,
157     eMPPExeedSrcHCropMax          =     1ULL << 21,
158     eMPPExeedSrcWCropMin          =     1ULL << 22,
159     eMPPExeedSrcHCropMin          =     1ULL << 23,
160     eMPPNotAlignedCrop            =     1ULL << 24,
161     eMPPNotAlignedOffset          =     1ULL << 25,
162     eMPPExeedMinDstWidth          =     1ULL << 26,
163     eMPPExeedMinDstHeight         =     1ULL << 27,
164     eMPPUnsupportedCompression    =     1ULL << 28,
165     eMPPUnsupportedCSC            =     1ULL << 29,
166     eMPPUnsupportedDIMLayer       =     1ULL << 30,
167     eMPPUnsupportedDRM            =     1ULL << 31,
168     eMPPUnsupportedDynamicMeta    =     1ULL << 32,
169     eMPPSatisfiedRestriction      =     1ULL << 33,
170 };
171 
172 enum {
173     MPP_TYPE_NONE,
174     MPP_TYPE_OTF,
175     MPP_TYPE_M2M
176 };
177 
178 enum {
179     MPP_ASSIGN_STATE_FREE       =     0x00000000,
180     MPP_ASSIGN_STATE_RESERVED   =     0x00000001,
181     MPP_ASSIGN_STATE_ASSIGNED   =     0x00000002,
182 };
183 
184 enum {
185     MPP_HW_STATE_IDLE,
186     MPP_HW_STATE_RUNNING
187 };
188 
189 enum {
190     MPP_BUFFER_NORMAL = 0,
191     MPP_BUFFER_NORMAL_DRM,
192     MPP_BUFFER_SECURE_DRM,
193     MPP_BUFFER_DUMP,
194 };
195 
196 enum {
197     MPP_MEM_MMAP = 1,
198     MPP_MEM_USERPTR,
199     MPP_MEM_OVERLAY,
200     MPP_MEM_DMABUF,
201 };
202 
203 enum {
204     MPP_SOURCE_COMPOSITION_TARGET,
205     MPP_SOURCE_LAYER,
206     MPP_SOURCE_MAX
207 };
208 
209 /* Based on multi-resolution feature */
210 typedef enum {
211     DST_SIZE_HD = 0,
212     DST_SIZE_HD_PLUS,
213     DST_SIZE_FHD,
214     DST_SIZE_FHD_PLUS,
215     DST_SIZE_WQHD,
216     DST_SIZE_WQHD_PLUS,
217     DST_SIZE_UNKNOWN,
218 } dst_alloc_buf_size_t;
219 
220 #ifndef DEFAULT_MPP_DST_FORMAT
221 #define DEFAULT_MPP_DST_FORMAT HAL_PIXEL_FORMAT_RGBA_8888
222 #endif
223 #ifndef DEFAULT_MPP_DST_YUV_FORMAT
224 #define DEFAULT_MPP_DST_YUV_FORMAT HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN
225 #endif
226 #ifndef DEFAULT_MPP_DST_UNCOMP_YUV_FORMAT
227 #define DEFAULT_MPP_DST_UNCOMP_YUV_FORMAT HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN
228 #endif
229 
230 typedef struct exynos_mpp_img_info {
231     buffer_handle_t bufferHandle;
232     uint32_t bufferType;
233     uint32_t format;
234     android_dataspace_t dataspace;
235     AcrylicLayer *mppLayer;
236     int acrylicAcquireFenceFd;
237     int acrylicReleaseFenceFd;
238 } exynos_mpp_img_info_t;
239 
240 typedef enum {
241     PPC_SCALE_NO = 0,   /* no scale */
242     PPC_SCALE_DOWN_1_4, /* x1/1.xx ~ x1/4 */
243     PPC_SCALE_DOWN_4_9, /* x1/4 ~ x1/9 */
244     PPC_SCALE_DOWN_9_16, /* x1/9 ~ x1/16 */
245     PPC_SCALE_DOWN_16_,  /* x1/16 ~ */
246     PPC_SCALE_UP_1_4,   /* x1.xx ~ x4 */
247     PPC_SCALE_UP_4_,    /* x4 ~ */
248     PPC_SCALE_MAX
249 } scaling_index_t;
250 
251 typedef enum {
252     PPC_FORMAT_YUV420   =   0,
253     PPC_FORMAT_YUV422,
254     PPC_FORMAT_RGB32,
255     PPC_FORMAT_SBWC,
256     PPC_FORMAT_P010,
257     PPC_FORMAT_AFBC_RGB,
258     PPC_FORMAT_AFBC_YUV,
259     PPC_FORMAT_FORMAT_MAX
260 } format_index_t;
261 
262 typedef enum {
263     PPC_ROT_NO   =   0,
264     PPC_ROT,
265     PPC_ROT_MAX
266 } rot_index_t;
267 
268 typedef struct ppc_list_for_scaling {
269     float ppcList[PPC_SCALE_MAX];
270 } ppc_list_for_scaling_t;
271 
272 typedef std::map<uint32_t, ppc_list_for_scaling> ppc_table;
273 
274 typedef struct dstMetaInfo {
275     uint16_t minLuminance = 0;
276     uint16_t maxLuminance = 0;
277 } dstMetaInfo_t;
278 
279 enum
280 {
281     NODE_NONE,
282     NODE_SRC,
283     NODE_DST
284 }; /* nodeType */
285 
286 enum
287 {
288     HAL_TRANSFORM_NONE = 0
289 };
290 
291 enum
292 {
293     HAL_PIXEL_FORMAT_NONE = 0
294 };
295 
296 #define YUV_CHROMA_H_SUBSAMPLE  static_cast<uint32_t>(2) // Horizontal
297 #define YUV_CHROMA_V_SUBSAMPLE  static_cast<uint32_t>(2) // Vertical
298 #define RESTRICTION_CNT_MAX 1024
299 
300 typedef enum restriction_classification {
301     RESTRICTION_RGB =   0,
302     RESTRICTION_YUV,
303     RESTRICTION_MAX
304 } restriction_classification_t;
305 
306 typedef struct restriction_key
307 {
308     mpp_phycal_type_t hwType; /* MPP_DPP_VG, MPP_DPP_VGFS, ... */
309     uint32_t nodeType; /* src or dst */
310     uint32_t format; /* HAL format */
311     uint32_t reserved;
312 } restriction_key_t;
313 
314 typedef struct restriction_size
315 {
316     static constexpr size_t kNumofRestriction = 16;
317     union {
318         std::array<uint32_t, kNumofRestriction> mData;
319         struct {
320             uint32_t maxDownScale;
321             uint32_t maxUpScale;
322             uint32_t maxFullWidth;
323             uint32_t maxFullHeight;
324             uint32_t minFullWidth;
325             uint32_t minFullHeight;
326             uint32_t fullWidthAlign;
327             uint32_t fullHeightAlign;
328             uint32_t maxCropWidth;
329             uint32_t maxCropHeight;
330             uint32_t minCropWidth;
331             uint32_t minCropHeight;
332             uint32_t cropXAlign;
333             uint32_t cropYAlign;
334             uint32_t cropWidthAlign;
335             uint32_t cropHeightAlign;
336         };
337     };
338 
339     restriction_size() = default;
restriction_sizerestriction_size340     restriction_size(std::array<uint32_t, kNumofRestriction> &&rdata) : mData(rdata){};
341 
342     bool operator==(const restriction_size &rhs) const { return rhs.mData == mData; }
343 } restriction_size_t;
344 
345 typedef struct restriction_size_element
346 {
347     restriction_key_t key;
348     restriction_size_t sizeRestriction;
349 } restriction_size_element_t;
350 
351 typedef struct restriction_table_element
352 {
353     uint32_t classfication_type;
354     const restriction_size_element *table;
355     uint32_t table_element_size;
356 } restriction_table_element_t;
357 /* */
358 
359 #define FORMAT_SHIFT   10
360 #define ROT_SHIFT   20
361 #define PPC_IDX(x,y,z) (x|(y<<FORMAT_SHIFT)|(z<<ROT_SHIFT))
362 
363 const std::map<uint32_t, int32_t> dataspace_standard_map =
364 {
365     {HAL_DATASPACE_STANDARD_UNSPECIFIED,
366         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
367 
368     {HAL_DATASPACE_STANDARD_BT709,
369         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
370 
371     {HAL_DATASPACE_STANDARD_BT601_625,
372         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
373 
374     {HAL_DATASPACE_STANDARD_BT601_625_UNADJUSTED,
375         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
376 
377     {HAL_DATASPACE_STANDARD_BT601_525,
378         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
379 
380     {HAL_DATASPACE_STANDARD_BT601_525_UNADJUSTED,
381         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
382 
383     {HAL_DATASPACE_STANDARD_BT2020,
384         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
385 
386     {HAL_DATASPACE_STANDARD_BT2020_CONSTANT_LUMINANCE,
387         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
388 
389     {HAL_DATASPACE_STANDARD_BT470M,
390         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
391 
392     {HAL_DATASPACE_STANDARD_FILM,
393         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
394 
395     {HAL_DATASPACE_STANDARD_DCI_P3,
396         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
397 
398     {HAL_DATASPACE_STANDARD_ADOBE_RGB,
399         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}
400 };
401 
402 const std::map<uint32_t, int32_t> dataspace_transfer_map =
403 {
404     {HAL_DATASPACE_TRANSFER_UNSPECIFIED,
405         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
406 
407     {HAL_DATASPACE_TRANSFER_LINEAR,
408         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
409 
410     {HAL_DATASPACE_TRANSFER_SRGB,
411         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
412 
413     {HAL_DATASPACE_TRANSFER_SMPTE_170M,
414         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
415 
416     {HAL_DATASPACE_TRANSFER_GAMMA2_2,
417         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
418 
419     {HAL_DATASPACE_TRANSFER_GAMMA2_6,
420         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
421 
422     {HAL_DATASPACE_TRANSFER_GAMMA2_8,
423         MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
424 
425     {HAL_DATASPACE_TRANSFER_ST2084,
426         MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS},
427 
428     {HAL_DATASPACE_TRANSFER_HLG,
429         MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}
430 };
431 
432 void dumpExynosMPPImgInfo(uint32_t type, exynos_mpp_img_info &imgInfo);
433 
434 struct ExynosMPPFrameInfo
435 {
436     uint32_t srcNum;
437     exynos_image srcInfo[NUM_MPP_SRC_BUFS];
438     exynos_image dstInfo[NUM_MPP_SRC_BUFS];
439 };
440 
441 class ExynosMPPSource {
442     public:
443         ExynosMPPSource();
444         ExynosMPPSource(uint32_t sourceType, void *source);
~ExynosMPPSource()445         ~ExynosMPPSource(){};
446         void setExynosImage(exynos_image src_img, exynos_image dst_img);
447         void setExynosMidImage(exynos_image mid_img);
448 
449         uint32_t mSourceType;
450         void *mSource;
451         exynos_image mSrcImg;
452         exynos_image mDstImg;
453         exynos_image mMidImg;
454 
455         ExynosMPP *mOtfMPP;
456         ExynosMPP *mM2mMPP;
457 };
458 bool exynosMPPSourceComp(const ExynosMPPSource* l, const ExynosMPPSource* r);
459 void dump(const restriction_size_t &restrictionSize, String8 &result);
460 
461 class ExynosMPP {
462 private:
463     class ResourceManageThread: public Thread {
464         private:
465             ExynosMPP *mExynosMPP;
466             Condition mCondition;
467             List<exynos_mpp_img_info > mFreedBuffers;
468             List<int> mStateFences;
469 
470             void freeBuffers();
471             bool checkStateFences();
472         public:
473             bool mRunning;
474             Mutex mMutex;
475             ResourceManageThread(ExynosMPP *exynosMPP);
476             ~ResourceManageThread();
477             virtual bool threadLoop();
478             void addFreedBuffer(exynos_mpp_img_info freedBuffer);
479             void addStateFence(int fence);
480     };
481 
482 public:
483     ExynosResourceManager *mResourceManager;
484     /**
485      * Resource type
486      * Ex: MPP_DPP_VGFS, MPP_DPP_VG, MPP_MSC, MPP_G2D
487      */
488     uint32_t mMPPType;
489     uint32_t  mPhysicalType;
490     uint32_t  mLogicalType;
491     String8 mName;
492     uint32_t mPhysicalIndex;
493     uint32_t mLogicalIndex;
494     uint32_t mPreAssignDisplayInfo;
495     uint32_t mPreAssignDisplayList[DISPLAY_MODE_NUM];
496     static int mainDisplayWidth;
497     static int mainDisplayHeight;
498 
499     uint32_t mHWState;
500     int mLastStateFenceFd;
501     uint32_t mAssignedState;
502     bool    mEnable;
503 
504     ExynosDisplay *mAssignedDisplay;
505 
506     /* Some resource can support blending feature
507      * then source can be multiple layers */
508     Vector <ExynosMPPSource* > mAssignedSources;
509     uint32_t mMaxSrcLayerNum;
510 
511     uint32_t mPrevAssignedState;
512     int32_t mPrevAssignedDisplayType;
513     int32_t mReservedDisplay;
514 
515     android::sp<ResourceManageThread> mResourceManageThread;
516     float mCapacity;
517     float mUsedCapacity;
518 
519     union {
520         struct {
521             float mUsedBaseCycles;
522             uint32_t mRotatedSrcCropBW;
523             uint32_t mNoRotatedSrcCropBW;
524         };
525     };
526 
527     bool mAllocOutBufFlag;
528     bool mFreeOutBufFlag;
529     bool mHWBusyFlag;
530     /* For reuse previous frame */
531     ExynosMPPFrameInfo mPrevFrameInfo;
532     struct exynos_mpp_img_info mSrcImgs[NUM_MPP_SRC_BUFS];
533     struct exynos_mpp_img_info mDstImgs[NUM_MPP_DST_BUFS_DEFAULT];
534     int32_t mCurrentDstBuf;
535     int32_t mPrivDstBuf;
536     bool mNeedCompressedTarget;
537     struct restriction_size mSrcSizeRestrictions[RESTRICTION_MAX];
538     struct restriction_size mDstSizeRestrictions[RESTRICTION_MAX];
539 
540     // Force Dst buffer reallocation
541     dst_alloc_buf_size_t mDstAllocatedSize;
542 
543     /* For libacryl */
544     Acrylic *mAcrylicHandle;
545 
546     bool mUseM2MSrcFence;
547     /* MPP's attribute bit (supported feature bit) */
548     uint64_t    mAttr;
549 
550     bool mNeedSolidColorLayer;
551 
552     ExynosMPP(ExynosResourceManager* resourceManager,
553             uint32_t physicalType, uint32_t logicalType, const char *name,
554             uint32_t physicalIndex, uint32_t logicalIndex, uint32_t preAssignInfo);
555     virtual ~ExynosMPP();
556 
557     int32_t allocOutBuf(uint32_t w, uint32_t h, uint32_t format, uint64_t usage, uint32_t index);
558     int32_t setOutBuf(buffer_handle_t outbuf, int32_t fence);
559     int32_t freeOutBuf(exynos_mpp_img_info dst);
560     int32_t doPostProcessing(struct exynos_image &src, struct exynos_image &dst);
561     int32_t doPostProcessing(uint32_t totalImags, uint32_t imageIndex, struct exynos_image &src, struct exynos_image &dst);
562     int32_t setupRestriction();
563     int32_t getSrcReleaseFence(uint32_t srcIndex);
564     int32_t resetSrcReleaseFence();
565     int32_t getDstImageInfo(exynos_image *img);
566     int32_t setDstAcquireFence(int releaseFence);
567     int32_t resetDstReleaseFence();
568     int32_t requestHWStateChange(uint32_t state);
569     int32_t setHWStateFence(int32_t fence);
570     virtual int64_t isSupported(ExynosDisplay &display, struct exynos_image &src, struct exynos_image &dst);
571 
572     bool isDataspaceSupportedByMPP(struct exynos_image &src, struct exynos_image &dst);
573     bool isSupportedHDR10Plus(struct exynos_image &src, struct exynos_image &dst);
574     bool isSupportedBlend(struct exynos_image &src);
575     virtual bool isSupportedTransform(struct exynos_image &src);
576     bool isSupportedCapability(ExynosDisplay &display, struct exynos_image &src);
577     bool isSupportedDRM(struct exynos_image &src);
578     virtual bool isSupportedHStrideCrop(struct exynos_image &src);
579     bool checkDownscaleCap(const float resolution, const float displayRatio_V) const;
checkSpecificRestriction(const uint32_t __unused refreshRate,const struct exynos_image __unused & src,const struct exynos_image __unused & dst)580     virtual bool checkSpecificRestriction(const uint32_t __unused refreshRate,
581                                           const struct exynos_image __unused &src,
582                                           const struct exynos_image __unused &dst) {
583         return false;
584     }
585     virtual uint32_t getDownscaleRestriction(const struct exynos_image &src,
586                                              const struct exynos_image &dst) const;
587     virtual uint32_t getMaxDownscale(const ExynosDisplay &display, const struct exynos_image &src,
588                                      const struct exynos_image &dst) const;
589     virtual uint32_t getMaxUpscale(const struct exynos_image &src,
590                                    const struct exynos_image &dst) const;
591     uint32_t getSrcMaxWidth(struct exynos_image &src);
592     uint32_t getSrcMaxHeight(struct exynos_image &src);
593     uint32_t getSrcMinWidth(struct exynos_image &src);
594     uint32_t getSrcMinWidth(uint32_t idx);
595     uint32_t getSrcMinHeight(struct exynos_image &src);
596     uint32_t getSrcMinHeight(uint32_t idx);
597     uint32_t getSrcWidthAlign(struct exynos_image &src);
598     uint32_t getSrcHeightAlign(struct exynos_image &src);
599     uint32_t getSrcMaxCropWidth(struct exynos_image &src);
600     uint32_t getSrcMaxCropHeight(struct exynos_image &src);
601     virtual uint32_t getSrcMaxCropSize(struct exynos_image &src);
602     uint32_t getSrcMinCropWidth(struct exynos_image &src);
603     uint32_t getSrcMinCropHeight(struct exynos_image &src);
604     virtual uint32_t getSrcXOffsetAlign(struct exynos_image &src);
605     uint32_t getSrcXOffsetAlign(uint32_t idx);
606     uint32_t getSrcYOffsetAlign(struct exynos_image &src);
607     uint32_t getSrcYOffsetAlign(uint32_t idx);
608     uint32_t getSrcCropWidthAlign(const struct exynos_image &src) const;
609     uint32_t getSrcCropWidthAlign(uint32_t idx) const;
610     uint32_t getSrcCropHeightAlign(const struct exynos_image &src) const;
611     uint32_t getSrcCropHeightAlign(uint32_t idx) const;
612     virtual bool isSrcFormatSupported(struct exynos_image &src);
613     virtual bool isDimLayerSupported();
614     int32_t isSupportThis(uint32_t mSupportAttr);
615 
616     uint32_t getDstMaxWidth(struct exynos_image &dst);
617     uint32_t getDstMaxHeight(struct exynos_image &dst);
618     uint32_t getDstMinWidth(struct exynos_image &dst);
619     uint32_t getDstMinHeight(struct exynos_image &dst);
620     virtual uint32_t getDstWidthAlign(const struct exynos_image &dst) const;
621     uint32_t getDstHeightAlign(const struct exynos_image &dst) const;
622     uint32_t getDstXOffsetAlign(struct exynos_image &dst);
623     uint32_t getDstYOffsetAlign(struct exynos_image &dst);
624     uint32_t getOutBufAlign();
625     virtual bool isDstFormatSupported(struct exynos_image &dst);
626     int32_t isSupportLayerColorTransform(
627             struct exynos_image &src, struct exynos_image &dst);
628     uint32_t getSrcMaxBlendingNum(struct exynos_image &src, struct exynos_image &dst);
629     uint32_t getAssignedSourceNum();
630 
631     /* Based on multi-resolution support */
632     void setDstAllocSize(uint32_t width, uint32_t height);
633     dst_alloc_buf_size_t getDstAllocSize();
634     virtual bool needPreAllocation();
635 
636     int32_t resetMPP();
637     int32_t resetAssignedState();
638     int32_t resetAssignedState(ExynosMPPSource *mppSource);
639     int32_t reserveMPP(int32_t displayType = -1);
640 
641     bool isAssignableState(ExynosDisplay *display, struct exynos_image &src, struct exynos_image &dst);
642     bool isAssignable(ExynosDisplay *display,
643             struct exynos_image &src, struct exynos_image &dst);
644     int32_t assignMPP(ExynosDisplay *display, ExynosMPPSource* mppSource);
645 
646     bool hasEnoughCapa(ExynosDisplay *display, struct exynos_image &src, struct exynos_image &dst);
647     float getRequiredCapacity(ExynosDisplay *display, struct exynos_image &src, struct exynos_image &dst);
648     int32_t updateUsedCapacity();
649     void resetUsedCapacity();
650     int prioritize(int priority);
651 
getMPPClockKhz()652     uint32_t getMPPClockKhz() { return mClockKhz; };
653 
654     void dump(String8& result);
655     uint32_t increaseDstBuffIndex();
656     bool canSkipProcessing();
657 
658     virtual bool isSupportedCompression(struct exynos_image &src);
659 
660     void closeFences();
661 
662     void reloadResourceForHWFC();
663     void setTargetDisplayLuminance(uint16_t min, uint16_t max);
664     void setTargetDisplayDevice(int device);
665 
666     virtual bool checkRotationCondition(struct exynos_image &src);
667     void updateAttr();
668     dstMetaInfo getDstMetaInfo(android_dataspace_t dstDataspace);
669     float getAssignedCapacity();
670 
setPPC(float ppc)671     void setPPC(float ppc) { mPPC = ppc; };
setClockKhz(uint32_t clock)672     void setClockKhz(uint32_t clock) { mClockKhz = clock; };
673 
674 protected:
675     uint32_t getBufferType(uint64_t usage);
676     uint32_t getBufferType(const buffer_handle_t handle);
677     uint64_t getBufferUsage(uint64_t usage);
678     bool needCompressDstBuf() const;
679     bool needDstBufRealloc(struct exynos_image &dst, uint32_t index);
680     bool canUsePrevFrame();
681     int32_t setupDst(exynos_mpp_img_info *dstImgInfo);
682     virtual int32_t doPostProcessingInternal();
683     virtual int32_t setupLayer(exynos_mpp_img_info *srcImgInfo,
684             struct exynos_image &src, struct exynos_image &dst);
setColorConversionInfo()685     virtual int32_t setColorConversionInfo() { return NO_ERROR; };
686 
687     uint32_t getRestrictionClassification(const struct exynos_image &img) const;
688 
689     /*
690      * getPPC for src, dst referencing mppSources in mAssignedSources and
691      * assignCheckSrc, assignCheckDst that are likely to be added to the mAssignedSources
692      */
693     float getPPC(const struct exynos_image &src, const struct exynos_image &dst,
694             const struct exynos_image &criteria,
695             const struct exynos_image *assignCheckSrc = NULL,
696             const struct exynos_image *assignCheckDst = NULL);
getPPC()697     float getPPC() { return mPPC; };
698 
699     /* format and rotation index are defined by indexImage */
700     void getPPCIndex(const struct exynos_image &indexImage,
701             const struct exynos_image &refImage,
702             uint32_t &formatIndex, uint32_t &rotIndex, uint32_t &scaleIndex,
703             const struct exynos_image &criteria);
704 
705     float getRequiredBaseCycles(struct exynos_image &src, struct exynos_image &dst);
706     bool addCapacity(ExynosMPPSource* mppSource);
707     bool removeCapacity(ExynosMPPSource* mppSource);
708     /*
709      * This should be called by isCSCSupportedByMPP()
710      * This function checks additional restriction for color space conversion
711      */
712     virtual bool checkCSCRestriction(struct exynos_image &src, struct exynos_image &dst);
713 
714     uint32_t mClockKhz = 0;
715     float mPPC = 0;
716 };
717 
718 #endif //_EXYNOSMPP_H
719