| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | Register.h | 20 unsigned Reg; variable
23 Register(unsigned Val = 0): Reg(Val) {} in Reg() function
45 static bool isStackSlot(unsigned Reg) { in isStackSlot()
50 static int stackSlot2Index(unsigned Reg) { in stackSlot2Index()
63 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister()
69 static bool isVirtualRegister(unsigned Reg) { in isVirtualRegister()
76 static unsigned virtReg2Index(unsigned Reg) { in virtReg2Index()
|
| D | MachineRegisterInfo.h | 286 inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { in reg_operands()
302 reg_instructions(unsigned Reg) const { in reg_instructions()
317 inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { in reg_bundles()
337 reg_nodbg_operands(unsigned Reg) const { in reg_nodbg_operands()
354 reg_nodbg_instructions(unsigned Reg) const { in reg_nodbg_instructions()
371 reg_nodbg_bundles(unsigned Reg) const { in reg_nodbg_bundles()
389 inline iterator_range<def_iterator> def_operands(unsigned Reg) const { in def_operands()
405 def_instructions(unsigned Reg) const { in def_instructions()
420 inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const { in def_bundles()
428 StringRef getVRegName(unsigned Reg) const { in getVRegName()
[all …]
|
| D | LiveRegUnits.h | 56 Register Reg = O->getReg(); in accumulateUsedDefed() local
87 void addReg(MCPhysReg Reg) { in addReg()
94 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) { in addRegMasked()
103 void removeReg(MCPhysReg Reg) { in removeReg()
117 bool available(MCPhysReg Reg) const { in available()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64TargetStreamer.h | 42 virtual void EmitARM64WinCFISaveReg(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveReg()
43 virtual void EmitARM64WinCFISaveRegX(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveRegX()
44 virtual void EmitARM64WinCFISaveRegP(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveRegP()
45 virtual void EmitARM64WinCFISaveRegPX(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveRegPX()
46 virtual void EmitARM64WinCFISaveFReg(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveFReg()
47 virtual void EmitARM64WinCFISaveFRegX(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveFRegX()
48 virtual void EmitARM64WinCFISaveFRegP(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveFRegP()
49 virtual void EmitARM64WinCFISaveFRegPX(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveFRegPX()
|
| D | AArch64WinCOFFStreamer.cpp | 65 int Reg, in EmitARM64WinUnwindCode()
96 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveReg(unsigned Reg, in EmitARM64WinCFISaveReg()
103 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveRegX(unsigned Reg, in EmitARM64WinCFISaveRegX()
108 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveRegP(unsigned Reg, in EmitARM64WinCFISaveRegP()
113 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveRegPX(unsigned Reg, in EmitARM64WinCFISaveRegPX()
118 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveFReg(unsigned Reg, in EmitARM64WinCFISaveFReg()
125 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveFRegX(unsigned Reg, in EmitARM64WinCFISaveFRegX()
130 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveFRegP(unsigned Reg, in EmitARM64WinCFISaveFRegP()
135 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveFRegPX(unsigned Reg, in EmitARM64WinCFISaveFRegPX()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCRegister.h | 23 unsigned Reg; variable
26 MCRegister(unsigned Val = 0): Reg(Val) {} in Reg() function
46 static bool isStackSlot(unsigned Reg) { in isStackSlot()
52 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 252 inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { in reg_operands()
268 reg_instructions(unsigned Reg) const { in reg_instructions()
283 inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { in reg_bundles()
303 reg_nodbg_operands(unsigned Reg) const { in reg_nodbg_operands()
320 reg_nodbg_instructions(unsigned Reg) const { in reg_nodbg_instructions()
337 reg_nodbg_bundles(unsigned Reg) const { in reg_nodbg_bundles()
355 inline iterator_range<def_iterator> def_operands(unsigned Reg) const { in def_operands()
371 def_instructions(unsigned Reg) const { in def_instructions()
386 inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const { in def_bundles()
411 inline iterator_range<use_iterator> use_operands(unsigned Reg) const { in use_operands()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 75 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
88 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
109 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) { in LeaveGroup()
119 bool AggressiveAntiDepState::IsLive(unsigned Reg) { in IsLive()
165 unsigned Reg = *AI; in StartBlock() local
179 unsigned Reg = *I; in StartBlock() local
210 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
235 Register Reg = MO.getReg(); in IsImplicitDefUse() local
255 const Register Reg = MO.getReg(); in GetPassthruRegs() local
301 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
[all …]
|
| D | MachineRegisterInfo.cpp | 58 MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { in setRegClass()
63 void MachineRegisterInfo::setRegBank(unsigned Reg, in setRegBank()
69 constrainRegClass(MachineRegisterInfo &MRI, unsigned Reg, in constrainRegClass()
85 MachineRegisterInfo::constrainRegClass(unsigned Reg, in constrainRegClass()
92 MachineRegisterInfo::constrainRegAttrs(unsigned Reg, in constrainRegAttrs()
122 MachineRegisterInfo::recomputeRegClass(unsigned Reg) { in recomputeRegClass()
147 unsigned Reg = Register::index2VirtReg(getNumVirtRegs()); in createIncompleteVirtualRegister() local
165 unsigned Reg = createIncompleteVirtualRegister(Name); in createVirtualRegister() local
174 unsigned Reg = createIncompleteVirtualRegister(Name); in cloneVirtualRegister() local
190 unsigned Reg = createIncompleteVirtualRegister(Name); in createGenericVirtualRegister() local
[all …]
|
| D | MIRVRegNamerUtils.h | 33 Register Reg; variable
37 NamedVReg(Register Reg, std::string Name = "") : Reg(Reg), Name(Name) {} in Reg() argument
|
| D | MachineCopyPropagation.cpp | 101 for (unsigned Reg : Regs) { in markRegsUnavailable() local
112 void invalidateRegister(unsigned Reg, const TargetRegisterInfo &TRI) { in invalidateRegister()
134 void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) { in clobberRegister()
197 MachineInstr *findAvailBackwardCopy(MachineInstr &I, unsigned Reg, in findAvailBackwardCopy()
218 MachineInstr *findAvailCopy(MachineInstr &DestCopy, unsigned Reg, in findAvailCopy()
310 void MachineCopyPropagation::ReadRegister(unsigned Reg, MachineInstr &Reader, in ReadRegister()
600 Register Reg = MO.getReg(); in ForwardCopyPropagateBlock() local
623 Register Reg = MO.getReg(); in ForwardCopyPropagateBlock() local
637 Register Reg = MO.getReg(); in ForwardCopyPropagateBlock() local
656 Register Reg = MO.getReg(); in ForwardCopyPropagateBlock() local
[all …]
|
| D | LiveVariables.cpp | 182 void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr &MI) { in HandleVirtRegDef()
192 MachineInstr *LiveVariables::FindLastPartialDef(unsigned Reg, in FindLastPartialDef()
231 void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr &MI) { in HandlePhysRegUse()
281 MachineInstr *LiveVariables::FindLastRefOrPartRef(unsigned Reg) { in FindLastRefOrPartRef()
311 bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) { in HandlePhysRegKill()
426 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
443 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI, in HandlePhysRegDef()
489 unsigned Reg = Defs.back(); in UpdatePhysRegDefs() local
656 const unsigned Reg = Register::index2VirtReg(i); in runOnMachineFunction() local
681 void LiveVariables::replaceKillInstruction(unsigned Reg, MachineInstr &OldMI, in replaceKillInstruction()
[all …]
|
| D | CriticalAntiDepBreaker.cpp | 75 unsigned Reg = *AI; in StartBlock() local
89 unsigned Reg = *I; in StartBlock() local
93 unsigned Reg = *AI; in StartBlock() local
119 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
190 Register Reg = MO.getReg(); in PrescanInstruction() local
285 Register Reg = MO.getReg(); in ScanInstruction() local
316 Register Reg = MO.getReg(); in ScanInstruction() local
477 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
626 Register Reg = MO.getReg(); in BreakAntiDependencies() local
|
| D | RegisterScavenging.cpp | 53 void RegScavenger::setRegUsed(Register Reg, LaneBitmask LaneMask) { in setRegUsed()
100 void RegScavenger::addRegUnits(BitVector &BV, Register Reg) { in addRegUnits()
105 void RegScavenger::removeRegUnits(BitVector &BV, Register Reg) { in removeRegUnits()
137 Register Reg = MO.getReg(); in determineKillsAndDefs() local
208 Register Reg = MO.getReg(); in forward() local
282 bool RegScavenger::isRegUsed(Register Reg, bool includeReserved) const { in isRegUsed()
399 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards() local
417 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards() local
461 RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, in spill()
593 MCPhysReg Reg = P.first; in scavengeRegisterBackwards() local
[all …]
|
| /external/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 60 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
73 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
95 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) in LeaveGroup()
106 bool AggressiveAntiDepState::IsLive(unsigned Reg) in IsLive()
154 unsigned Reg = *AI; in StartBlock() local
167 unsigned Reg = *I; in StartBlock() local
197 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
222 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
242 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
288 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
[all …]
|
| D | LiveVariables.cpp | 182 void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr &MI) { in HandleVirtRegDef()
192 MachineInstr *LiveVariables::FindLastPartialDef(unsigned Reg, in FindLastPartialDef()
231 void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr &MI) { in HandlePhysRegUse()
281 MachineInstr *LiveVariables::FindLastRefOrPartRef(unsigned Reg) { in FindLastRefOrPartRef()
311 bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) { in HandlePhysRegKill()
426 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
443 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI, in HandlePhysRegDef()
489 unsigned Reg = Defs.back(); in UpdatePhysRegDefs() local
658 const unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in runOnMachineFunction() local
683 void LiveVariables::replaceKillInstruction(unsigned Reg, MachineInstr &OldMI, in replaceKillInstruction()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVectorPrint.cpp | 73 static bool isVecReg(unsigned Reg) { in isVecReg()
95 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, in addAsmInstr()
107 static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg) { in getInstrVecReg()
143 unsigned Reg = 0; in runOnMachineFunction() local
151 unsigned Reg = 0; in runOnMachineFunction() local
167 unsigned Reg = 0; in runOnMachineFunction() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 34 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { in isARMArea1Register()
49 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { in isARMArea2Register()
60 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { in isARMArea3Register()
77 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 43 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { in isARMArea1Register()
59 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { in isARMArea2Register()
71 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { in isARMArea3Register()
89 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
|
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCTargetDesc.h | 62 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
67 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
72 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
77 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCTargetDesc.h | 64 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
69 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
74 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
79 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 57 unsigned Reg; member
75 void setReg(unsigned Reg) { in setReg()
287 unsigned Reg = getRegForValue(Op); in computeAddress() local
373 unsigned Reg = getRegForValue(Obj); in computeAddress() local
382 unsigned Reg = Addr.getReg(); in materializeLoadStoreOperands() local
415 unsigned WebAssemblyFastISel::maskI1Value(unsigned Reg, const Value *V) { in maskI1Value()
434 unsigned Reg = getRegForValue(V); in getRegForI1Value() local
440 unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V, in zeroExtendToI32()
476 unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V, in signExtendToI32()
512 unsigned WebAssemblyFastISel::zeroExtend(unsigned Reg, const Value *V, in zeroExtend()
[all …]
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1143 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); in DecodeGPR64RegisterClass() local
1154 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); in DecodeGPRMM16RegisterClass() local
1165 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); in DecodeGPRMM16ZeroRegisterClass() local
1176 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); in DecodeGPRMM16MovePRegisterClass() local
1187 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); in DecodeGPR32RegisterClass() local
1216 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); in DecodeFGR64RegisterClass() local
1228 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); in DecodeFGR32RegisterClass() local
1239 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); in DecodeCCRRegisterClass() local
1250 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); in DecodeFCCRegisterClass() local
1261 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); in DecodeFGRCCRegisterClass() local
[all …]
|
| /external/capstone/arch/Mips/ |
| D | MipsDisassembler.c | 823 unsigned Reg; in DecodeGPR64RegisterClass() local
836 unsigned Reg; in DecodeGPRMM16RegisterClass() local
849 unsigned Reg; in DecodeGPRMM16ZeroRegisterClass() local
862 unsigned Reg; in DecodeGPRMM16MovePRegisterClass() local
875 unsigned Reg; in DecodeGPR32RegisterClass() local
904 unsigned Reg; in DecodeFGR64RegisterClass() local
917 unsigned Reg; in DecodeFGR32RegisterClass() local
930 unsigned Reg; in DecodeCCRRegisterClass() local
943 unsigned Reg; in DecodeFCCRegisterClass() local
956 unsigned Reg; in DecodeCCRegisterClass() local
[all …]
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonAsmPrinter.cpp | 70 inline static unsigned getHexagonRegisterPair(unsigned Reg, in getHexagonRegisterPair()
266 MCOperand Reg = Inst.getOperand(0); in HexagonProcessInstruction() local
288 MCOperand &Reg = MappedInst.getOperand(0); in HexagonProcessInstruction() local
307 MCOperand &Reg = MappedInst.getOperand(0); in HexagonProcessInstruction() local
332 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
343 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
355 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
367 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction() local
556 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
|