| /external/swiftshader/third_party/subzero/src/ |
| D | IcePhiLoweringImpl.h | 65 auto *SrcVec = llvm::cast<VariableVecOn32>(Src); in prelowerPhis32Bit() local
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| D | IceTargetLoweringMIPS32.cpp | 5429 auto *SrcVec = llvm::dyn_cast<VariableVecOn32>(legalizeUndef(Src0)); in lowerRet() local
5445 auto *SrcVec = llvm::dyn_cast<VariableVecOn32>(legalizeUndef(Src0)); in lowerRet() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600OptimizeVectorRegisters.cpp | 187 unsigned SrcVec = BaseRSI->Instr->getOperand(0).getReg(); in RebuildVector() local
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| D | SILowerControlFlow.cpp | 633 const MachineOperand *SrcVec = TII->getNamedOperand(MI, AMDGPU::OpName::src); in indirectSrc() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600OptimizeVectorRegisters.cpp | 205 Register SrcVec = BaseRSI->Instr->getOperand(0).getReg(); in RebuildVector() local
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| D | SIISelLowering.cpp | 3495 const MachineOperand *SrcVec = TII->getNamedOperand(MI, AMDGPU::OpName::src); in emitIndirectDst() local
6094 SDValue SrcVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, in LowerINTRINSIC_WO_CHAIN() local
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| /external/llvm/lib/IR/ |
| D | Verifier.cpp | 2318 bool SrcVec = SrcTy->isVectorTy(); in visitUIToFPInst() local
2341 bool SrcVec = SrcTy->isVectorTy(); in visitSIToFPInst() local
2364 bool SrcVec = SrcTy->isVectorTy(); in visitFPToUIInst() local
2387 bool SrcVec = SrcTy->isVectorTy(); in visitFPToSIInst() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | Verifier.cpp | 2662 bool SrcVec = SrcTy->isVectorTy(); in visitUIToFPInst() local
2685 bool SrcVec = SrcTy->isVectorTy(); in visitSIToFPInst() local
2708 bool SrcVec = SrcTy->isVectorTy(); in visitFPToUIInst() local
2731 bool SrcVec = SrcTy->isVectorTy(); in visitFPToSIInst() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineVectorOps.cpp | 320 Value *SrcVec = EI.getVectorOperand(); in visitExtractElementInst() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 419 SmallVectorImpl<int> &SrcIdx) { in buildHvxVectorReg()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/Interpreter/ |
| D | Execution.cpp | 1553 GenericValue TempDst, TempSrc, SrcVec; in executeBitCastInst() local
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| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| D | Execution.cpp | 1501 GenericValue TempDst, TempSrc, SrcVec; in executeBitCastInst() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 4239 Register SrcVec = Idx < NumElts ? Src0Reg : Src1Reg; in lowerShuffleVector() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 10351 SDValue SrcVec = Ext1.getOperand(0); in DAGCombineBuildVector() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 5686 SDValue SrcVec = V1; in LowerVECTOR_SHUFFLE() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 7328 SDValue SrcVec = SrcExtract.getOperand(0); in getFauxShuffleMask() local
9552 static SDValue createVariablePermute(MVT VT, SDValue SrcVec, SDValue IndicesVec, in createVariablePermute()
9811 SDValue SrcVec, IndicesVec; in LowerBUILD_VECTORAsVariablePermute() local
40348 SDValue SrcVec = N->getOperand(0).getOperand(0); in combineAnd() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 13322 SDValue SrcVec = Ext1.getOperand(0); in DAGCombineBuildVector() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7353 SDValue SrcVec = V1; in LowerVECTOR_SHUFFLE() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 30149 SDValue SrcVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InSubVT, N0, in combineToExtendVectorInReg() local
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