| /external/llvm/include/llvm/MC/ |
| D | MCInstrItineraries.h | 187 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding()
208 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency()
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| D | MCSubtargetInfo.h | 136 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
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| D | MCSchedule.h | 87 unsigned UseIdx; member
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrItineraries.h | 182 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding()
203 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency()
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| D | MCSubtargetInfo.h | 177 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
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| D | MCSchedule.h | 96 unsigned UseIdx; member
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| /external/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 144 unsigned UseIdx = 0; in findUseIdx() local
202 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
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| D | RegisterCoalescer.cpp | 705 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
759 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
1193 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1216 void RegisterCoalescer::addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx, in addUndefFlag()
1256 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); in updateRegDefsUses() local
1305 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local
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| D | LiveRangeCalc.cpp | 186 SlotIndex UseIdx; in extendToUses() local
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| D | LiveRangeEdit.cpp | 120 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt()
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| D | MachineVerifier.cpp | 1111 unsigned MONum, SlotIndex UseIdx, const LiveRange &LR, unsigned VRegOrUnit, in checkLivenessAtUse()
1208 SlotIndex UseIdx = LiveInts->getInstructionIndex(*MI); in checkLiveness() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXSwapRemoval.cpp | 672 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
715 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
756 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
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| D | PPCInstrInfo.h | 124 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCVSXSwapRemoval.cpp | 677 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
720 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
762 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
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| D | PPCInstrInfo.h | 218 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 174 unsigned UseIdx = 0; in findUseIdx() local
232 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
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| D | MachineCopyPropagation.cpp | 386 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy()
403 unsigned UseIdx) { in isForwardableRegClassCopy()
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| D | RegisterCoalescer.cpp | 848 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
902 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
1620 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1654 void RegisterCoalescer::addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx, in addUndefFlag()
1693 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); in updateRegDefsUses() local
1749 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local
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| D | LiveRangeEdit.cpp | 141 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt()
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| D | LiveRangeCalc.cpp | 190 SlotIndex UseIdx; in extendToUses() local
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| D | MachineCombiner.cpp | 195 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); in getDepth() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | AbstractCallSite.cpp | 100 unsigned UseIdx = CS.getArgumentNo(U); in AbstractCallSite() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 3263 unsigned UseIdx, unsigned UseAlign) const { in getVSTMUseCycle()
3303 unsigned UseIdx, unsigned UseAlign) const { in getSTMUseCycle()
3333 unsigned UseIdx, unsigned UseAlign) const { in getOperandLatency()
3465 unsigned &UseIdx, unsigned &Dist) { in getBundledUseMI()
3713 unsigned UseIdx, const MCInstrDesc &UseMCID, unsigned UseAdj) const { in getOperandLatencyImpl()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.cpp | 349 unsigned UseIdx = -1; in adjustSchedDependency() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 3838 unsigned UseIdx, unsigned UseAlign) const { in getVSTMUseCycle()
3878 unsigned UseIdx, unsigned UseAlign) const { in getSTMUseCycle()
3908 unsigned UseIdx, unsigned UseAlign) const { in getOperandLatency()
4040 unsigned &UseIdx, unsigned &Dist) { in getBundledUseMI()
4288 unsigned UseIdx, const MCInstrDesc &UseMCID, unsigned UseAdj) const { in getOperandLatencyImpl()
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