| /external/arm-trusted-firmware/drivers/st/usb/ |
| D | stm32mp1_usb.c | 361 uintptr_t reg_offset = usb_base_addr + OTG_DIEP_BASE; in usb_dwc2_activate_setup() local
384 uintptr_t reg_offset = usb_base_addr + OTG_DIEP_BASE + OTG_DIEPTSIZ; in usb_dwc2_ep0_out_start() local
408 uint32_t reg_offset; in usb_dwc2_write_packet() local
440 uint32_t reg_offset; in usb_dwc2_read_packet() local
466 uint32_t reg_offset; in usb_dwc2_ep_start_xfer() local
562 uint32_t reg_offset; in usb_dwc2_ep0_start_xfer() local
635 uint32_t reg_offset; in usb_dwc2_ep_set_stall() local
741 uint32_t reg_offset; in usb_dwc2_write_empty_tx_fifo() local
814 uint32_t reg_offset; in usb_dwc2_it_handler() local
848 uint32_t reg_offset; in usb_dwc2_it_handler() local
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| /external/arm-trusted-firmware/drivers/marvell/comphy/ |
| D | phy-comphy-3700.c | 239 static void comphy_sata_set_indirect(uintptr_t addr, uint32_t reg_offset, in comphy_sata_set_indirect()
246 static void comphy_usb3_set_indirect(uintptr_t addr, uint32_t reg_offset, in comphy_usb3_set_indirect()
253 static void comphy_usb3_set_direct(uintptr_t addr, uint32_t reg_offset, in comphy_usb3_set_direct()
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| /external/arm-trusted-firmware/drivers/arm/ccn/ |
| D | ccn.c | 575 unsigned int reg_offset, unsigned long long val) in ccn_write_node_reg()
601 unsigned int reg_offset) in ccn_read_node_reg()
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| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_winsys.c | 145 unsigned reg_offset, in radv_amdgpu_winsys_read_registers()
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| /external/mesa3d/src/amd/common/ |
| D | ac_shadowed_regs.c | 2935 unsigned reg_offset = R_02835C_PA_SC_TILE_STEERING_OVERRIDE; in ac_emulate_clear_state() local
2953 unsigned reg_offset, unsigned count) in ac_check_shadowed_regs()
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| D | ac_debug.c | 221 static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset, in ac_parse_set_reg_packet()
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| /external/arm-trusted-firmware/drivers/arm/ethosn/ |
| D | ethosn_smc.c | 29 #define ETHOSN_CORE_SEC_REG(core_addr, reg_offset) \ argument
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_visitor.cpp | 1340 src_reg *reladdr, int reg_offset) in get_scratch_offset()
1389 int reg_offset = base_offset + orig_src.offset / REG_SIZE; in emit_scratch_read() local
1418 int reg_offset = base_offset + inst->dst.offset / REG_SIZE; in emit_scratch_write() local
1634 int reg_offset = base_offset + src.offset / 16; in emit_pull_constant_load() local
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| D | brw_ir_vec4.h | 232 reg_offset(const backend_reg &r) in reg_offset() function
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| D | brw_ir_fs.h | 181 reg_offset(const fs_reg &r) in reg_offset() function
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| D | brw_fs.cpp | 2088 unsigned reg_offset = 0; in split_virtual_grfs() local
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| /external/arm-trusted-firmware/plat/rockchip/rk3288/drivers/pmu/ |
| D | pmu.c | 125 static const uint32_t reg_offset[] = { GRF_UOC0_CON0, GRF_UOC1_CON0, in rk3288_sleep_disable_osc() local
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| /external/crosvm/devices/src/pci/pcie/ |
| D | pci_bridge.rs | 291 let reg_offset: u64 = reg_idx as u64 * 4; in read_config_register() localVariable
305 let reg_offset = reg_idx as u64 * 4; in write_config_register() localVariable
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| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| D | amdgpu_winsys.c | 261 unsigned reg_offset, in amdgpu_read_registers()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | eg_debug.c | 134 unsigned reg_offset) in ac_parse_set_reg_packet()
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| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| D | radeon_drm_winsys.c | 755 unsigned reg_offset, in radeon_read_registers()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_build_pm4.h | 39 #define SI_CHECK_SHADOWED_REGS(reg_offset, count) argument
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| /external/elfutils/libdw/ |
| D | cfi.h | 127 reg_offset, /* DW_CFA_offset_extended et al */ enumerator
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| /external/crosvm/devices/src/ |
| D | vmwdt.rs | 252 let reg_offset = (info.offset % VMWDT_REG_LEN) as u32; in write() localVariable
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| /external/mesa3d/src/panfrost/midgard/ |
| D | midgard_ra.c | 45 offset_swizzle(unsigned *swizzle, unsigned reg_offset, unsigned srcshift, unsigned dstshift, unsign… in offset_swizzle()
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| /external/crosvm/hypervisor/src/kvm/ |
| D | x86_64.rs | 1134 let reg_offset = 16 * reg; in from() localVariable
1153 let reg_offset = 16 * reg; in from() localVariable
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| /external/mesa3d/src/intel/tools/ |
| D | aubinator_viewer.cpp | 108 handle_reg_write(void *user_data, uint32_t reg_offset, uint32_t reg_value) in handle_reg_write()
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| /external/crosvm/devices/src/pci/ |
| D | pci_configuration.rs | 410 let reg_offset = reg_idx * 4 + offset as usize; in write_reg() localVariable
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| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_ir.h | 600 int reg_offset = select.sel() - array->base_gpr.sel(); in get_final_gpr() local
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 1707 Register reg_offset = mem_op.GetRegisterOffset(); in ComputeAddress() local
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