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/external/arm-trusted-firmware/plat/imx/common/include/
Dimx_clock.h27 #define CCM_CCGR_SETTING0_DOM_CLK_RUN BIT(0)
28 #define CCM_CCGR_SETTING0_DOM_CLK_RUN_WAIT BIT(1)
29 #define CCM_CCGR_SETTING0_DOM_CLK_ALWAYS (BIT(1) | BIT(0))
31 #define CCM_CCGR_SETTING1_DOM_CLK_RUN BIT(4)
32 #define CCM_CCGR_SETTING1_DOM_CLK_RUN_WAIT BIT(5)
33 #define CCM_CCGR_SETTING1_DOM_CLK_ALWAYS (BIT(5) | BIT(4))
35 #define CCM_CCGR_SETTING2_DOM_CLK_RUN BIT(8)
36 #define CCM_CCGR_SETTING2_DOM_CLK_RUN_WAIT BIT(9)
37 #define CCM_CCGR_SETTING2_DOM_CLK_ALWAYS (BIT(9) | BIT(8))
39 #define CCM_CCGR_SETTING3_DOM_CLK_RUN BIT(12)
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/external/arm-trusted-firmware/include/drivers/st/
Dstm32mp1_rcc.h238 #define RCC_TZCR_TZEN BIT(0)
239 #define RCC_TZCR_MCKPROT BIT(1)
242 #define RCC_OCENSETR_HSION BIT(0)
243 #define RCC_OCENSETR_HSIKERON BIT(1)
244 #define RCC_OCENSETR_CSION BIT(4)
245 #define RCC_OCENSETR_CSIKERON BIT(5)
246 #define RCC_OCENSETR_DIGBYP BIT(7)
247 #define RCC_OCENSETR_HSEON BIT(8)
248 #define RCC_OCENSETR_HSEKERON BIT(9)
249 #define RCC_OCENSETR_HSEBYP BIT(10)
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Dstm32_uart_regs.h26 #define USART_CR1_UE BIT(0)
27 #define USART_CR1_UESM BIT(1)
28 #define USART_CR1_RE BIT(2)
29 #define USART_CR1_TE BIT(3)
30 #define USART_CR1_IDLEIE BIT(4)
31 #define USART_CR1_RXNEIE BIT(5)
32 #define USART_CR1_TCIE BIT(6)
33 #define USART_CR1_TXEIE BIT(7)
34 #define USART_CR1_PEIE BIT(8)
35 #define USART_CR1_PS BIT(9)
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Dstm32_i2c.h14 /* Bit definition for I2C_CR1 register */
15 #define I2C_CR1_PE BIT(0)
16 #define I2C_CR1_TXIE BIT(1)
17 #define I2C_CR1_RXIE BIT(2)
18 #define I2C_CR1_ADDRIE BIT(3)
19 #define I2C_CR1_NACKIE BIT(4)
20 #define I2C_CR1_STOPIE BIT(5)
21 #define I2C_CR1_TCIE BIT(6)
22 #define I2C_CR1_ERRIE BIT(7)
24 #define I2C_CR1_ANFOFF BIT(12)
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/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/V3M/
Dpfc_init_v3m.c15 /* Pin functon bit */
16 #define GPSR0_DU_EXODDF_DU_ODDF_DISP_CDE BIT(21)
17 #define GPSR0_DU_EXVSYNC_DU_VSYNC BIT(20)
18 #define GPSR0_DU_EXHSYNC_DU_HSYNC BIT(19)
19 #define GPSR0_DU_DOTCLKOUT BIT(18)
20 #define GPSR0_DU_DB7 BIT(17)
21 #define GPSR0_DU_DB6 BIT(16)
22 #define GPSR0_DU_DB5 BIT(15)
23 #define GPSR0_DU_DB4 BIT(14)
24 #define GPSR0_DU_DB3 BIT(13)
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/external/arm-trusted-firmware/drivers/imx/uart/
Dimx_uart.h12 #define IMX_UART_RXD_CHARRDY BIT(15)
13 #define IMX_UART_RXD_ERR BIT(14)
14 #define IMX_UART_RXD_OVERRUN BIT(13)
15 #define IMX_UART_RXD_FRMERR BIT(12)
16 #define IMX_UART_RXD_BRK BIT(11)
17 #define IMX_UART_RXD_PRERR BIT(10)
22 #define IMX_UART_CR1_ADEN BIT(15)
23 #define IMX_UART_CR1_ADBR BIT(14)
24 #define IMX_UART_CR1_TRDYEN BIT(13)
25 #define IMX_UART_CR1_IDEN BIT(12)
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/external/selinux/mcstrans/share/examples/nato/setrans.d/
Deyes-only.conf11 # Aruba - bit 201
14 # Antigua and Barbuda - bit 214
17 # United Arab Emirates - bit 208
20 # Afghanistan - bit 202
23 # Algeria - bit 263
26 # Azerbaijan - bit 217
29 # Albania - bit 205
32 # Armenia - bit 210
35 # Andorra - bit 206
38 # Angola - bit 203
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Drel.conf17 # Aruba - bit 201
20 # Antigua and Barbuda - bit 214
23 # United Arab Emirates - bit 208
26 # Afghanistan - bit 202
29 # Algeria - bit 263
32 # Azerbaijan - bit 217
35 # Albania - bit 205
38 # Armenia - bit 210
41 # Andorra - bit 206
44 # Angola - bit 203
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/external/arm-trusted-firmware/plat/imx/imx8m/imx8mp/include/
Dgpc_reg.h39 #define MASK_DSM_TRIGGER_A53 BIT(31)
40 #define IRQ_SRC_A53_WUP BIT(30)
42 #define IRQ_SRC_C1 BIT(29)
43 #define IRQ_SRC_C0 BIT(28)
44 #define IRQ_SRC_C3 BIT(23)
45 #define IRQ_SRC_C2 BIT(22)
46 #define CPU_CLOCK_ON_LPM BIT(14)
47 #define A53_CLK_ON_LPM BIT(14)
48 #define MASTER0_LPM_HSK BIT(6)
49 #define MASTER1_LPM_HSK BIT(7)
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/external/deqp/android/cts/main/vk-master-2022-03-01/
Dmemory-model.txt71 dEQP-VK.memory_model.shared.16bit.scalar_types.0
72 dEQP-VK.memory_model.shared.16bit.scalar_types.1
73 dEQP-VK.memory_model.shared.16bit.scalar_types.2
74 dEQP-VK.memory_model.shared.16bit.scalar_types.3
75 dEQP-VK.memory_model.shared.16bit.scalar_types.4
76 dEQP-VK.memory_model.shared.16bit.scalar_types.5
77 dEQP-VK.memory_model.shared.16bit.scalar_types.6
78 dEQP-VK.memory_model.shared.16bit.scalar_types.7
79 dEQP-VK.memory_model.shared.16bit.scalar_types.8
80 dEQP-VK.memory_model.shared.16bit.scalar_types.9
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/external/openthread/third_party/mbedtls/repo/tests/suites/
Dtest_suite_psa_crypto_not_supported.generated.data3 PSA import AES 128-bit not supported
7 PSA generate AES 128-bit not supported
11 PSA import AES 192-bit not supported
15 PSA generate AES 192-bit not supported
19 PSA import AES 256-bit not supported
23 PSA generate AES 256-bit not supported
27 PSA import ARC4 8-bit not supported
31 PSA generate ARC4 8-bit not supported
35 PSA import ARC4 128-bit not supported
39 PSA generate ARC4 128-bit not supported
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Dtest_suite_psa_crypto_generate_key.generated.data3 PSA AES 128-bit
7 PSA AES 192-bit
11 PSA AES 256-bit
15 PSA ARC4 8-bit
19 PSA ARC4 128-bit
23 PSA ARC4 2048-bit
27 PSA ARIA 128-bit
31 PSA ARIA 192-bit
35 PSA ARIA 256-bit
39 PSA CAMELLIA 128-bit
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/external/mbedtls/tests/suites/
Dtest_suite_psa_crypto_not_supported.generated.data3 PSA import AES 128-bit not supported
7 PSA generate AES 128-bit not supported
11 PSA import AES 192-bit not supported
15 PSA generate AES 192-bit not supported
19 PSA import AES 256-bit not supported
23 PSA generate AES 256-bit not supported
27 PSA import ARIA 128-bit not supported
31 PSA generate ARIA 128-bit not supported
35 PSA import ARIA 192-bit not supported
39 PSA generate ARIA 192-bit not supported
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Dtest_suite_psa_crypto_generate_key.generated.data3 PSA AES 128-bit
7 PSA AES 192-bit
11 PSA AES 256-bit
15 PSA ARIA 128-bit
19 PSA ARIA 192-bit
23 PSA ARIA 256-bit
27 PSA CAMELLIA 128-bit
31 PSA CAMELLIA 192-bit
35 PSA CAMELLIA 256-bit
39 PSA CHACHA20 256-bit
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/external/arm-trusted-firmware/plat/imx/imx8m/imx8mm/include/
Dgpc_reg.h37 #define MASK_DSM_TRIGGER_A53 BIT(31)
38 #define IRQ_SRC_A53_WUP BIT(30)
40 #define IRQ_SRC_C1 BIT(29)
41 #define IRQ_SRC_C0 BIT(28)
42 #define IRQ_SRC_C3 BIT(23)
43 #define IRQ_SRC_C2 BIT(22)
44 #define CPU_CLOCK_ON_LPM BIT(14)
45 #define A53_CLK_ON_LPM BIT(14)
46 #define MASTER0_LPM_HSK BIT(6)
47 #define MASTER1_LPM_HSK BIT(7)
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/external/deqp/android/cts/main/vk-master-2020-03-01/
Dubo.txt51 dEQP-VK.ubo.random.16bit.descriptor_indexing.0
52 dEQP-VK.ubo.random.16bit.descriptor_indexing.1
53 dEQP-VK.ubo.random.16bit.descriptor_indexing.2
54 dEQP-VK.ubo.random.16bit.descriptor_indexing.3
55 dEQP-VK.ubo.random.16bit.descriptor_indexing.4
56 dEQP-VK.ubo.random.16bit.descriptor_indexing.5
57 dEQP-VK.ubo.random.16bit.descriptor_indexing.6
58 dEQP-VK.ubo.random.16bit.descriptor_indexing.7
59 dEQP-VK.ubo.random.16bit.descriptor_indexing.8
60 dEQP-VK.ubo.random.16bit.descriptor_indexing.9
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/external/arm-trusted-firmware/plat/brcm/board/stingray/include/
Dusb_phy.h23 #define DRDU2_U2PLL_LOCK BIT(6U)
24 #define DRDU2_U2PLL_RESETB BIT(5U)
27 #define DRDU2_U2PLL_SUSPEND_EN BIT(0U)
30 #define DRDU2_U2IDDQ BIT(30U)
31 #define DRDU2_U2SOFT_RST_N BIT(29U)
32 #define DRDU2_U2PHY_ON_FLAG BIT(22U)
35 #define DRDU2_U2PHY_RESETB BIT(5U)
36 #define DRDU2_U2PHY_ISO BIT(4U)
37 #define DRDU2_U2AFE_BG_PWRDWNB BIT(3U)
38 #define DRDU2_U2AFE_PLL_PWRDWNB BIT(2U)
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/external/clang/lib/Headers/
Dmmintrin.h50 /// \brief Constructs a 64-bit integer vector, setting the lower 32 bits to the
51 /// value of the 32-bit integer parameter and setting the upper 32 bits to 0.
58 /// A 32-bit integer value.
59 /// \returns A 64-bit integer vector. The lower 32 bits contain the value of the
67 /// \brief Returns the lower 32 bits of a 64-bit integer vector as a 32-bit
75 /// A 64-bit integer vector.
76 /// \returns A 32-bit signed integer value containing the lower 32 bits of the
84 /// \brief Casts a 64-bit signed integer value into a 64-bit integer vector.
91 /// A 64-bit signed integer.
92 /// \returns A 64-bit integer vector containing the same bitwise pattern as the
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/external/llvm/test/MC/Mips/msa/
Dinvalid.s8 addvi.b $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
9 addvi.b $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
10 addvi.h $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
11 addvi.h $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
12 addvi.w $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
13 addvi.w $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
14 addvi.d $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
15 addvi.d $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
16 andi.b $w1, $w2, -1 # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate
17 andi.b $w1, $w2, 256 # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate
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/external/arm-trusted-firmware/plat/imx/imx8m/imx8mn/include/
Dgpc_reg.h37 #define MASK_DSM_TRIGGER_A53 BIT(31)
38 #define IRQ_SRC_A53_WUP BIT(30)
40 #define IRQ_SRC_C1 BIT(29)
41 #define IRQ_SRC_C0 BIT(28)
42 #define IRQ_SRC_C3 BIT(23)
43 #define IRQ_SRC_C2 BIT(22)
44 #define CPU_CLOCK_ON_LPM BIT(14)
45 #define A53_CLK_ON_LPM BIT(14)
46 #define MASTER0_LPM_HSK BIT(6)
47 #define MASTER1_LPM_HSK BIT(7)
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/external/arm-trusted-firmware/drivers/imx/usdhc/
Dimx_usdhc.h34 #define XFERTYPE_DPSEL BIT(21)
35 #define XFERTYPE_CICEN BIT(20)
36 #define XFERTYPE_CCCEN BIT(19)
37 #define XFERTYPE_RSPTYP_136 BIT(16)
38 #define XFERTYPE_RSPTYP_48 BIT(17)
39 #define XFERTYPE_RSPTYP_48_BUSY (BIT(16) | BIT(17))
42 #define PSTATE_DAT0 BIT(24)
43 #define PSTATE_DLA BIT(2)
44 #define PSTATE_CDIHB BIT(1)
45 #define PSTATE_CIHB BIT(0)
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/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/E3/
Dpfc_init_e3.c14 #define GPSR0_SDA4 BIT(17)
15 #define GPSR0_SCL4 BIT(16)
16 #define GPSR0_D15 BIT(15)
17 #define GPSR0_D14 BIT(14)
18 #define GPSR0_D13 BIT(13)
19 #define GPSR0_D12 BIT(12)
20 #define GPSR0_D11 BIT(11)
21 #define GPSR0_D10 BIT(10)
22 #define GPSR0_D9 BIT(9)
23 #define GPSR0_D8 BIT(8)
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/external/arm-trusted-firmware/drivers/renesas/rzg/pfc/G2E/
Dpfc_init_g2e.c17 #define GPSR0_SDA4 BIT(17)
18 #define GPSR0_SCL4 BIT(16)
19 #define GPSR0_D15 BIT(15)
20 #define GPSR0_D14 BIT(14)
21 #define GPSR0_D13 BIT(13)
22 #define GPSR0_D12 BIT(12)
23 #define GPSR0_D11 BIT(11)
24 #define GPSR0_D10 BIT(10)
25 #define GPSR0_D9 BIT(9)
26 #define GPSR0_D8 BIT(8)
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/external/swiftshader/tests/regres/testlists/vk-default/
Dmesh-shader.txt3067 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3068 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3069 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3070 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3071 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3072 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3073 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3074 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3075 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
3076 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
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/external/deqp/android/cts/main/vk-master-2023-03-01/
Dmesh-shader.txt1957 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1958 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1959 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1960 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1961 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1962 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1963 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1964 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1965 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
1966 dEQP-VK.mesh_shader.ext.query.prim_query.points.no_reset.copy.no_wait.draw.32bit.no_availability.mu…
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