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Searched refs:S7 (Results 1 – 9 of 9) sorted by relevance

/art/runtime/arch/arm/
Dregisters_arm.h65 S7 = 7, enumerator
Dcontext_arm.cc89 fprs_[S7] = nullptr; in SmashCallerSaves()
Dcallee_save_frame_arm.h48 (1 << art::arm::S4) | (1 << art::arm::S5) | (1 << art::arm::S6) | (1 << art::arm::S7) |
/art/runtime/arch/riscv64/
Dregisters_riscv64.h55 S7 = 23, // X23, callee-saved 7 enumerator
Dcallee_save_frame_riscv64.h38 (1 << art::riscv64::S7) | (1 << art::riscv64::S8) | (1 << art::riscv64::S9) |
/art/runtime/arch/arm64/
Dregisters_arm64.h161 S7 = 7, enumerator
/art/compiler/jni/quick/arm64/
Dcalling_convention_arm64.cc46 S0, S1, S2, S3, S4, S5, S6, S7
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc56 S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15
/art/compiler/utils/arm64/
Dmanaged_register_arm64_test.cc245 reg = Arm64ManagedRegister::FromSRegister(S7); in TEST()
253 EXPECT_EQ(S7, reg.AsSRegister()); in TEST()
255 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S7))); in TEST()
714 EXPECT_TRUE(vixl::aarch64::s7.Is(Arm64Assembler::reg_s(S7))); in TEST()