• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * Copyright (C) 2014 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include "managed_register_arm64.h"
18 
19 #include "assembler_arm64.h"
20 #include "base/globals.h"
21 #include "base/macros.h"
22 #include "gtest/gtest.h"
23 
24 namespace art HIDDEN {
25 namespace arm64 {
26 
TEST(Arm64ManagedRegister,NoRegister)27 TEST(Arm64ManagedRegister, NoRegister) {
28   Arm64ManagedRegister reg = ManagedRegister::NoRegister().AsArm64();
29   EXPECT_TRUE(reg.IsNoRegister());
30   EXPECT_TRUE(!reg.Overlaps(reg));
31 }
32 
33 // X Register test.
TEST(Arm64ManagedRegister,XRegister)34 TEST(Arm64ManagedRegister, XRegister) {
35   Arm64ManagedRegister reg = Arm64ManagedRegister::FromXRegister(X0);
36   Arm64ManagedRegister wreg = Arm64ManagedRegister::FromWRegister(W0);
37   EXPECT_TRUE(!reg.IsNoRegister());
38   EXPECT_TRUE(reg.IsXRegister());
39   EXPECT_TRUE(!reg.IsWRegister());
40   EXPECT_TRUE(!reg.IsDRegister());
41   EXPECT_TRUE(!reg.IsSRegister());
42   EXPECT_TRUE(reg.Overlaps(wreg));
43   EXPECT_EQ(X0, reg.AsXRegister());
44 
45   reg = Arm64ManagedRegister::FromXRegister(X1);
46   wreg = Arm64ManagedRegister::FromWRegister(W1);
47   EXPECT_TRUE(!reg.IsNoRegister());
48   EXPECT_TRUE(reg.IsXRegister());
49   EXPECT_TRUE(!reg.IsWRegister());
50   EXPECT_TRUE(!reg.IsDRegister());
51   EXPECT_TRUE(!reg.IsSRegister());
52   EXPECT_TRUE(reg.Overlaps(wreg));
53   EXPECT_EQ(X1, reg.AsXRegister());
54 
55   reg = Arm64ManagedRegister::FromXRegister(X7);
56   wreg = Arm64ManagedRegister::FromWRegister(W7);
57   EXPECT_TRUE(!reg.IsNoRegister());
58   EXPECT_TRUE(reg.IsXRegister());
59   EXPECT_TRUE(!reg.IsWRegister());
60   EXPECT_TRUE(!reg.IsDRegister());
61   EXPECT_TRUE(!reg.IsSRegister());
62   EXPECT_TRUE(reg.Overlaps(wreg));
63   EXPECT_EQ(X7, reg.AsXRegister());
64 
65   reg = Arm64ManagedRegister::FromXRegister(X15);
66   wreg = Arm64ManagedRegister::FromWRegister(W15);
67   EXPECT_TRUE(!reg.IsNoRegister());
68   EXPECT_TRUE(reg.IsXRegister());
69   EXPECT_TRUE(!reg.IsWRegister());
70   EXPECT_TRUE(!reg.IsDRegister());
71   EXPECT_TRUE(!reg.IsSRegister());
72   EXPECT_TRUE(reg.Overlaps(wreg));
73   EXPECT_EQ(X15, reg.AsXRegister());
74 
75   reg = Arm64ManagedRegister::FromXRegister(X19);
76   wreg = Arm64ManagedRegister::FromWRegister(W19);
77   EXPECT_TRUE(!reg.IsNoRegister());
78   EXPECT_TRUE(reg.IsXRegister());
79   EXPECT_TRUE(!reg.IsWRegister());
80   EXPECT_TRUE(!reg.IsDRegister());
81   EXPECT_TRUE(!reg.IsSRegister());
82   EXPECT_TRUE(reg.Overlaps(wreg));
83   EXPECT_EQ(X19, reg.AsXRegister());
84 
85   reg = Arm64ManagedRegister::FromXRegister(X16);
86   wreg = Arm64ManagedRegister::FromWRegister(W16);
87   EXPECT_TRUE(!reg.IsNoRegister());
88   EXPECT_TRUE(reg.IsXRegister());
89   EXPECT_TRUE(!reg.IsWRegister());
90   EXPECT_TRUE(!reg.IsDRegister());
91   EXPECT_TRUE(!reg.IsSRegister());
92   EXPECT_TRUE(reg.Overlaps(wreg));
93   EXPECT_EQ(IP0, reg.AsXRegister());
94 
95   reg = Arm64ManagedRegister::FromXRegister(SP);
96   wreg = Arm64ManagedRegister::FromWRegister(WZR);
97   EXPECT_TRUE(!reg.IsNoRegister());
98   EXPECT_TRUE(reg.IsXRegister());
99   EXPECT_TRUE(!reg.IsWRegister());
100   EXPECT_TRUE(!reg.IsDRegister());
101   EXPECT_TRUE(!reg.IsSRegister());
102   EXPECT_TRUE(!reg.Overlaps(wreg));
103   EXPECT_EQ(SP, reg.AsXRegister());
104 }
105 
106 // W register test.
TEST(Arm64ManagedRegister,WRegister)107 TEST(Arm64ManagedRegister, WRegister) {
108   Arm64ManagedRegister reg = Arm64ManagedRegister::FromWRegister(W0);
109   Arm64ManagedRegister xreg = Arm64ManagedRegister::FromXRegister(X0);
110   EXPECT_TRUE(!reg.IsNoRegister());
111   EXPECT_TRUE(!reg.IsXRegister());
112   EXPECT_TRUE(reg.IsWRegister());
113   EXPECT_TRUE(!reg.IsDRegister());
114   EXPECT_TRUE(!reg.IsSRegister());
115   EXPECT_TRUE(reg.Overlaps(xreg));
116   EXPECT_EQ(W0, reg.AsWRegister());
117 
118   reg = Arm64ManagedRegister::FromWRegister(W5);
119   xreg = Arm64ManagedRegister::FromXRegister(X5);
120   EXPECT_TRUE(!reg.IsNoRegister());
121   EXPECT_TRUE(!reg.IsXRegister());
122   EXPECT_TRUE(reg.IsWRegister());
123   EXPECT_TRUE(!reg.IsDRegister());
124   EXPECT_TRUE(!reg.IsSRegister());
125   EXPECT_TRUE(reg.Overlaps(xreg));
126   EXPECT_EQ(W5, reg.AsWRegister());
127 
128   reg = Arm64ManagedRegister::FromWRegister(W6);
129   xreg = Arm64ManagedRegister::FromXRegister(X6);
130   EXPECT_TRUE(!reg.IsNoRegister());
131   EXPECT_TRUE(!reg.IsXRegister());
132   EXPECT_TRUE(reg.IsWRegister());
133   EXPECT_TRUE(!reg.IsDRegister());
134   EXPECT_TRUE(!reg.IsSRegister());
135   EXPECT_TRUE(reg.Overlaps(xreg));
136   EXPECT_EQ(W6, reg.AsWRegister());
137 
138   reg = Arm64ManagedRegister::FromWRegister(W18);
139   xreg = Arm64ManagedRegister::FromXRegister(X18);
140   EXPECT_TRUE(!reg.IsNoRegister());
141   EXPECT_TRUE(!reg.IsXRegister());
142   EXPECT_TRUE(reg.IsWRegister());
143   EXPECT_TRUE(!reg.IsDRegister());
144   EXPECT_TRUE(!reg.IsSRegister());
145   EXPECT_TRUE(reg.Overlaps(xreg));
146   EXPECT_EQ(W18, reg.AsWRegister());
147 
148   reg = Arm64ManagedRegister::FromWRegister(W29);
149   xreg = Arm64ManagedRegister::FromXRegister(FP);
150   EXPECT_TRUE(!reg.IsNoRegister());
151   EXPECT_TRUE(!reg.IsXRegister());
152   EXPECT_TRUE(reg.IsWRegister());
153   EXPECT_TRUE(!reg.IsDRegister());
154   EXPECT_TRUE(!reg.IsSRegister());
155   EXPECT_TRUE(reg.Overlaps(xreg));
156   EXPECT_EQ(W29, reg.AsWRegister());
157 
158   reg = Arm64ManagedRegister::FromWRegister(WZR);
159   xreg = Arm64ManagedRegister::FromXRegister(SP);
160   EXPECT_TRUE(!reg.IsNoRegister());
161   EXPECT_TRUE(!reg.IsXRegister());
162   EXPECT_TRUE(reg.IsWRegister());
163   EXPECT_TRUE(!reg.IsDRegister());
164   EXPECT_TRUE(!reg.IsSRegister());
165   EXPECT_TRUE(!reg.Overlaps(xreg));
166 }
167 
168 // D Register test.
TEST(Arm64ManagedRegister,DRegister)169 TEST(Arm64ManagedRegister, DRegister) {
170   Arm64ManagedRegister reg = Arm64ManagedRegister::FromDRegister(D0);
171   Arm64ManagedRegister sreg = Arm64ManagedRegister::FromSRegister(S0);
172   EXPECT_TRUE(!reg.IsNoRegister());
173   EXPECT_TRUE(!reg.IsXRegister());
174   EXPECT_TRUE(!reg.IsWRegister());
175   EXPECT_TRUE(reg.IsDRegister());
176   EXPECT_TRUE(!reg.IsSRegister());
177   EXPECT_TRUE(reg.Overlaps(sreg));
178   EXPECT_EQ(D0, reg.AsDRegister());
179   EXPECT_EQ(S0, reg.AsOverlappingSRegister());
180   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D0)));
181 
182   reg = Arm64ManagedRegister::FromDRegister(D1);
183   sreg = Arm64ManagedRegister::FromSRegister(S1);
184   EXPECT_TRUE(!reg.IsNoRegister());
185   EXPECT_TRUE(!reg.IsXRegister());
186   EXPECT_TRUE(!reg.IsWRegister());
187   EXPECT_TRUE(reg.IsDRegister());
188   EXPECT_TRUE(!reg.IsSRegister());
189   EXPECT_TRUE(reg.Overlaps(sreg));
190   EXPECT_EQ(D1, reg.AsDRegister());
191   EXPECT_EQ(S1, reg.AsOverlappingSRegister());
192   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D1)));
193 
194   reg = Arm64ManagedRegister::FromDRegister(D20);
195   sreg = Arm64ManagedRegister::FromSRegister(S20);
196   EXPECT_TRUE(!reg.IsNoRegister());
197   EXPECT_TRUE(!reg.IsXRegister());
198   EXPECT_TRUE(!reg.IsWRegister());
199   EXPECT_TRUE(reg.IsDRegister());
200   EXPECT_TRUE(!reg.IsSRegister());
201   EXPECT_TRUE(reg.Overlaps(sreg));
202   EXPECT_EQ(D20, reg.AsDRegister());
203   EXPECT_EQ(S20, reg.AsOverlappingSRegister());
204   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D20)));
205 
206   reg = Arm64ManagedRegister::FromDRegister(D31);
207   sreg = Arm64ManagedRegister::FromSRegister(S31);
208   EXPECT_TRUE(!reg.IsNoRegister());
209   EXPECT_TRUE(!reg.IsXRegister());
210   EXPECT_TRUE(!reg.IsWRegister());
211   EXPECT_TRUE(reg.IsDRegister());
212   EXPECT_TRUE(!reg.IsSRegister());
213   EXPECT_TRUE(reg.Overlaps(sreg));
214   EXPECT_EQ(D31, reg.AsDRegister());
215   EXPECT_EQ(S31, reg.AsOverlappingSRegister());
216   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D31)));
217 }
218 
219 // S Register test.
TEST(Arm64ManagedRegister,SRegister)220 TEST(Arm64ManagedRegister, SRegister) {
221   Arm64ManagedRegister reg = Arm64ManagedRegister::FromSRegister(S0);
222   Arm64ManagedRegister dreg = Arm64ManagedRegister::FromDRegister(D0);
223   EXPECT_TRUE(!reg.IsNoRegister());
224   EXPECT_TRUE(!reg.IsXRegister());
225   EXPECT_TRUE(!reg.IsWRegister());
226   EXPECT_TRUE(reg.IsSRegister());
227   EXPECT_TRUE(!reg.IsDRegister());
228   EXPECT_TRUE(reg.Overlaps(dreg));
229   EXPECT_EQ(S0, reg.AsSRegister());
230   EXPECT_EQ(D0, reg.AsOverlappingDRegister());
231   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S0)));
232 
233   reg = Arm64ManagedRegister::FromSRegister(S5);
234   dreg = Arm64ManagedRegister::FromDRegister(D5);
235   EXPECT_TRUE(!reg.IsNoRegister());
236   EXPECT_TRUE(!reg.IsXRegister());
237   EXPECT_TRUE(!reg.IsWRegister());
238   EXPECT_TRUE(reg.IsSRegister());
239   EXPECT_TRUE(!reg.IsDRegister());
240   EXPECT_TRUE(reg.Overlaps(dreg));
241   EXPECT_EQ(S5, reg.AsSRegister());
242   EXPECT_EQ(D5, reg.AsOverlappingDRegister());
243   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S5)));
244 
245   reg = Arm64ManagedRegister::FromSRegister(S7);
246   dreg = Arm64ManagedRegister::FromDRegister(D7);
247   EXPECT_TRUE(!reg.IsNoRegister());
248   EXPECT_TRUE(!reg.IsXRegister());
249   EXPECT_TRUE(!reg.IsWRegister());
250   EXPECT_TRUE(reg.IsSRegister());
251   EXPECT_TRUE(!reg.IsDRegister());
252   EXPECT_TRUE(reg.Overlaps(dreg));
253   EXPECT_EQ(S7, reg.AsSRegister());
254   EXPECT_EQ(D7, reg.AsOverlappingDRegister());
255   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S7)));
256 
257   reg = Arm64ManagedRegister::FromSRegister(S31);
258   dreg = Arm64ManagedRegister::FromDRegister(D31);
259   EXPECT_TRUE(!reg.IsNoRegister());
260   EXPECT_TRUE(!reg.IsXRegister());
261   EXPECT_TRUE(!reg.IsWRegister());
262   EXPECT_TRUE(reg.IsSRegister());
263   EXPECT_TRUE(!reg.IsDRegister());
264   EXPECT_TRUE(reg.Overlaps(dreg));
265   EXPECT_EQ(S31, reg.AsSRegister());
266   EXPECT_EQ(D31, reg.AsOverlappingDRegister());
267   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S31)));
268 }
269 
TEST(Arm64ManagedRegister,Equals)270 TEST(Arm64ManagedRegister, Equals) {
271   ManagedRegister no_reg = ManagedRegister::NoRegister();
272   EXPECT_TRUE(no_reg.Equals(Arm64ManagedRegister::NoRegister()));
273   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromXRegister(X0)));
274   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromXRegister(X1)));
275   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W0)));
276   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W1)));
277   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromDRegister(D0)));
278   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromSRegister(S0)));
279 
280   Arm64ManagedRegister reg_X0 = Arm64ManagedRegister::FromXRegister(X0);
281   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::NoRegister()));
282   EXPECT_TRUE(reg_X0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
283   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromXRegister(X1)));
284   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromWRegister(W0)));
285   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
286   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
287 
288   Arm64ManagedRegister reg_X1 = Arm64ManagedRegister::FromXRegister(X1);
289   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::NoRegister()));
290   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromXRegister(X0)));
291   EXPECT_TRUE(reg_X1.Equals(Arm64ManagedRegister::FromXRegister(X1)));
292   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromWRegister(W1)));
293   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D0)));
294   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S0)));
295   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D1)));
296   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S1)));
297 
298   Arm64ManagedRegister reg_SP = Arm64ManagedRegister::FromXRegister(SP);
299   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::NoRegister()));
300   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromXRegister(XZR)));
301   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromSRegister(S0)));
302   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromDRegister(D0)));
303 
304   Arm64ManagedRegister reg_W8 = Arm64ManagedRegister::FromWRegister(W8);
305   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::NoRegister()));
306   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromXRegister(X0)));
307   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromXRegister(X8)));
308   EXPECT_TRUE(reg_W8.Equals(Arm64ManagedRegister::FromWRegister(W8)));
309   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D0)));
310   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S0)));
311   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D1)));
312   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S1)));
313 
314   Arm64ManagedRegister reg_W12 = Arm64ManagedRegister::FromWRegister(W12);
315   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::NoRegister()));
316   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromXRegister(X0)));
317   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromXRegister(X8)));
318   EXPECT_TRUE(reg_W12.Equals(Arm64ManagedRegister::FromWRegister(W12)));
319   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromDRegister(D0)));
320   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S0)));
321   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromDRegister(D1)));
322   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S1)));
323 
324   Arm64ManagedRegister reg_S0 = Arm64ManagedRegister::FromSRegister(S0);
325   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::NoRegister()));
326   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
327   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromXRegister(X1)));
328   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromWRegister(W0)));
329   EXPECT_TRUE(reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
330   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S1)));
331   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
332   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromDRegister(D1)));
333 
334   Arm64ManagedRegister reg_S1 = Arm64ManagedRegister::FromSRegister(S1);
335   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::NoRegister()));
336   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromXRegister(X0)));
337   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromXRegister(X1)));
338   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromWRegister(W0)));
339   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S0)));
340   EXPECT_TRUE(reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S1)));
341   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromDRegister(D0)));
342   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromDRegister(D1)));
343 
344   Arm64ManagedRegister reg_S31 = Arm64ManagedRegister::FromSRegister(S31);
345   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::NoRegister()));
346   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromXRegister(X0)));
347   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromXRegister(X1)));
348   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromWRegister(W0)));
349   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromSRegister(S0)));
350   EXPECT_TRUE(reg_S31.Equals(Arm64ManagedRegister::FromSRegister(S31)));
351   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromDRegister(D0)));
352   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromDRegister(D1)));
353 
354   Arm64ManagedRegister reg_D0 = Arm64ManagedRegister::FromDRegister(D0);
355   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::NoRegister()));
356   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
357   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromWRegister(W1)));
358   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
359   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
360   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S31)));
361   EXPECT_TRUE(reg_D0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
362   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromDRegister(D1)));
363 
364   Arm64ManagedRegister reg_D15 = Arm64ManagedRegister::FromDRegister(D15);
365   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::NoRegister()));
366   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromXRegister(X0)));
367   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromXRegister(X1)));
368   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromWRegister(W0)));
369   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromSRegister(S0)));
370   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromSRegister(S31)));
371   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D0)));
372   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D1)));
373   EXPECT_TRUE(reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D15)));
374 }
375 
TEST(Arm64ManagedRegister,Overlaps)376 TEST(Arm64ManagedRegister, Overlaps) {
377   Arm64ManagedRegister reg = Arm64ManagedRegister::FromXRegister(X0);
378   Arm64ManagedRegister reg_o = Arm64ManagedRegister::FromWRegister(W0);
379   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X0)));
380   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
381   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
382   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W0)));
383   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
384   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
385   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
386   EXPECT_EQ(X0, reg_o.AsOverlappingXRegister());
387   EXPECT_EQ(W0, reg.AsOverlappingWRegister());
388   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
389   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
390   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
391   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
392   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
393   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
394   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
395   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
396   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
397   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
398 
399   reg = Arm64ManagedRegister::FromXRegister(X10);
400   reg_o = Arm64ManagedRegister::FromWRegister(W10);
401   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X10)));
402   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
403   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
404   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W10)));
405   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
406   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
407   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
408   EXPECT_EQ(X10, reg_o.AsOverlappingXRegister());
409   EXPECT_EQ(W10, reg.AsOverlappingWRegister());
410   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
411   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
412   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
413   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
414   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
415   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
416   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
417   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
418   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
419   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
420 
421   reg = Arm64ManagedRegister::FromXRegister(IP1);
422   reg_o = Arm64ManagedRegister::FromWRegister(W17);
423   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X17)));
424   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
425   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
426   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W17)));
427   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
428   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
429   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
430   EXPECT_EQ(X17, reg_o.AsOverlappingXRegister());
431   EXPECT_EQ(W17, reg.AsOverlappingWRegister());
432   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
433   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
434   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
435   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
436   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
437   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
438   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
439   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
440   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
441   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
442 
443   reg = Arm64ManagedRegister::FromXRegister(XZR);
444   reg_o = Arm64ManagedRegister::FromWRegister(WZR);
445   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
446   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
447   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
448   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
449   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W19)));
450   EXPECT_NE(SP, reg_o.AsOverlappingXRegister());
451   EXPECT_EQ(XZR, reg_o.AsOverlappingXRegister());
452   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
453   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
454   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
455   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
456   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
457   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
458   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
459   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
460   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
461   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
462 
463   reg = Arm64ManagedRegister::FromXRegister(SP);
464   reg_o = Arm64ManagedRegister::FromWRegister(WZR);
465   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
466   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
467   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
468   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
469   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
470   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
471   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
472   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
473   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
474   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
475   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
476   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
477   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
478   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
479   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
480 
481   reg = Arm64ManagedRegister::FromWRegister(W1);
482   reg_o = Arm64ManagedRegister::FromXRegister(X1);
483   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
484   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
485   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
486   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
487   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
488   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
489   EXPECT_EQ(W1, reg_o.AsOverlappingWRegister());
490   EXPECT_EQ(X1, reg.AsOverlappingXRegister());
491   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
492   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
493   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
494   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
495   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
496   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
497   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
498   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
499   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
500   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
501 
502   reg = Arm64ManagedRegister::FromWRegister(W21);
503   reg_o = Arm64ManagedRegister::FromXRegister(X21);
504   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W21)));
505   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X21)));
506   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
507   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
508   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
509   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
510   EXPECT_EQ(W21, reg_o.AsOverlappingWRegister());
511   EXPECT_EQ(X21, reg.AsOverlappingXRegister());
512   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
513   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
514   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
515   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
516   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
517   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
518   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
519   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
520   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
521   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
522 
523 
524   reg = Arm64ManagedRegister::FromSRegister(S1);
525   reg_o = Arm64ManagedRegister::FromDRegister(D1);
526   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
527   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
528   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
529   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
530   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
531   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
532   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
533   EXPECT_EQ(S1, reg_o.AsOverlappingSRegister());
534   EXPECT_EQ(D1, reg.AsOverlappingDRegister());
535   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
536   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
537   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
538   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
539   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
540   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
541   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
542   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
543   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
544   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
545   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
546 
547   reg = Arm64ManagedRegister::FromSRegister(S15);
548   reg_o = Arm64ManagedRegister::FromDRegister(D15);
549   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
550   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
551   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
552   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
553   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
554   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
555   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
556   EXPECT_EQ(S15, reg_o.AsOverlappingSRegister());
557   EXPECT_EQ(D15, reg.AsOverlappingDRegister());
558   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
559   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
560   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
561   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S17)));
562   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S16)));
563   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
564   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D16)));
565   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
566   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
567   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17)));
568   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20)));
569 
570   reg = Arm64ManagedRegister::FromDRegister(D15);
571   reg_o = Arm64ManagedRegister::FromSRegister(S15);
572   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
573   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
574   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
575   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
576   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
577   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
578   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
579   EXPECT_EQ(S15, reg.AsOverlappingSRegister());
580   EXPECT_EQ(D15, reg_o.AsOverlappingDRegister());
581   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
582   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
583   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
584   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S17)));
585   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S16)));
586   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
587   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D16)));
588   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
589   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
590   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17)));
591   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20)));
592 }
593 
TEST(Arm64ManagedRegister,VixlRegisters)594 TEST(Arm64ManagedRegister, VixlRegisters) {
595   // X Registers.
596   EXPECT_TRUE(vixl::aarch64::x0.Is(Arm64Assembler::reg_x(X0)));
597   EXPECT_TRUE(vixl::aarch64::x1.Is(Arm64Assembler::reg_x(X1)));
598   EXPECT_TRUE(vixl::aarch64::x2.Is(Arm64Assembler::reg_x(X2)));
599   EXPECT_TRUE(vixl::aarch64::x3.Is(Arm64Assembler::reg_x(X3)));
600   EXPECT_TRUE(vixl::aarch64::x4.Is(Arm64Assembler::reg_x(X4)));
601   EXPECT_TRUE(vixl::aarch64::x5.Is(Arm64Assembler::reg_x(X5)));
602   EXPECT_TRUE(vixl::aarch64::x6.Is(Arm64Assembler::reg_x(X6)));
603   EXPECT_TRUE(vixl::aarch64::x7.Is(Arm64Assembler::reg_x(X7)));
604   EXPECT_TRUE(vixl::aarch64::x8.Is(Arm64Assembler::reg_x(X8)));
605   EXPECT_TRUE(vixl::aarch64::x9.Is(Arm64Assembler::reg_x(X9)));
606   EXPECT_TRUE(vixl::aarch64::x10.Is(Arm64Assembler::reg_x(X10)));
607   EXPECT_TRUE(vixl::aarch64::x11.Is(Arm64Assembler::reg_x(X11)));
608   EXPECT_TRUE(vixl::aarch64::x12.Is(Arm64Assembler::reg_x(X12)));
609   EXPECT_TRUE(vixl::aarch64::x13.Is(Arm64Assembler::reg_x(X13)));
610   EXPECT_TRUE(vixl::aarch64::x14.Is(Arm64Assembler::reg_x(X14)));
611   EXPECT_TRUE(vixl::aarch64::x15.Is(Arm64Assembler::reg_x(X15)));
612   EXPECT_TRUE(vixl::aarch64::x16.Is(Arm64Assembler::reg_x(X16)));
613   EXPECT_TRUE(vixl::aarch64::x17.Is(Arm64Assembler::reg_x(X17)));
614   EXPECT_TRUE(vixl::aarch64::x18.Is(Arm64Assembler::reg_x(X18)));
615   EXPECT_TRUE(vixl::aarch64::x19.Is(Arm64Assembler::reg_x(X19)));
616   EXPECT_TRUE(vixl::aarch64::x20.Is(Arm64Assembler::reg_x(X20)));
617   EXPECT_TRUE(vixl::aarch64::x21.Is(Arm64Assembler::reg_x(X21)));
618   EXPECT_TRUE(vixl::aarch64::x22.Is(Arm64Assembler::reg_x(X22)));
619   EXPECT_TRUE(vixl::aarch64::x23.Is(Arm64Assembler::reg_x(X23)));
620   EXPECT_TRUE(vixl::aarch64::x24.Is(Arm64Assembler::reg_x(X24)));
621   EXPECT_TRUE(vixl::aarch64::x25.Is(Arm64Assembler::reg_x(X25)));
622   EXPECT_TRUE(vixl::aarch64::x26.Is(Arm64Assembler::reg_x(X26)));
623   EXPECT_TRUE(vixl::aarch64::x27.Is(Arm64Assembler::reg_x(X27)));
624   EXPECT_TRUE(vixl::aarch64::x28.Is(Arm64Assembler::reg_x(X28)));
625   EXPECT_TRUE(vixl::aarch64::x29.Is(Arm64Assembler::reg_x(X29)));
626   EXPECT_TRUE(vixl::aarch64::x30.Is(Arm64Assembler::reg_x(X30)));
627 
628   EXPECT_TRUE(vixl::aarch64::x19.Is(Arm64Assembler::reg_x(TR)));
629   EXPECT_TRUE(vixl::aarch64::ip0.Is(Arm64Assembler::reg_x(IP0)));
630   EXPECT_TRUE(vixl::aarch64::ip1.Is(Arm64Assembler::reg_x(IP1)));
631   EXPECT_TRUE(vixl::aarch64::x29.Is(Arm64Assembler::reg_x(FP)));
632   EXPECT_TRUE(vixl::aarch64::lr.Is(Arm64Assembler::reg_x(LR)));
633   EXPECT_TRUE(vixl::aarch64::sp.Is(Arm64Assembler::reg_x(SP)));
634   EXPECT_TRUE(vixl::aarch64::xzr.Is(Arm64Assembler::reg_x(XZR)));
635 
636   // W Registers.
637   EXPECT_TRUE(vixl::aarch64::w0.Is(Arm64Assembler::reg_w(W0)));
638   EXPECT_TRUE(vixl::aarch64::w1.Is(Arm64Assembler::reg_w(W1)));
639   EXPECT_TRUE(vixl::aarch64::w2.Is(Arm64Assembler::reg_w(W2)));
640   EXPECT_TRUE(vixl::aarch64::w3.Is(Arm64Assembler::reg_w(W3)));
641   EXPECT_TRUE(vixl::aarch64::w4.Is(Arm64Assembler::reg_w(W4)));
642   EXPECT_TRUE(vixl::aarch64::w5.Is(Arm64Assembler::reg_w(W5)));
643   EXPECT_TRUE(vixl::aarch64::w6.Is(Arm64Assembler::reg_w(W6)));
644   EXPECT_TRUE(vixl::aarch64::w7.Is(Arm64Assembler::reg_w(W7)));
645   EXPECT_TRUE(vixl::aarch64::w8.Is(Arm64Assembler::reg_w(W8)));
646   EXPECT_TRUE(vixl::aarch64::w9.Is(Arm64Assembler::reg_w(W9)));
647   EXPECT_TRUE(vixl::aarch64::w10.Is(Arm64Assembler::reg_w(W10)));
648   EXPECT_TRUE(vixl::aarch64::w11.Is(Arm64Assembler::reg_w(W11)));
649   EXPECT_TRUE(vixl::aarch64::w12.Is(Arm64Assembler::reg_w(W12)));
650   EXPECT_TRUE(vixl::aarch64::w13.Is(Arm64Assembler::reg_w(W13)));
651   EXPECT_TRUE(vixl::aarch64::w14.Is(Arm64Assembler::reg_w(W14)));
652   EXPECT_TRUE(vixl::aarch64::w15.Is(Arm64Assembler::reg_w(W15)));
653   EXPECT_TRUE(vixl::aarch64::w16.Is(Arm64Assembler::reg_w(W16)));
654   EXPECT_TRUE(vixl::aarch64::w17.Is(Arm64Assembler::reg_w(W17)));
655   EXPECT_TRUE(vixl::aarch64::w18.Is(Arm64Assembler::reg_w(W18)));
656   EXPECT_TRUE(vixl::aarch64::w19.Is(Arm64Assembler::reg_w(W19)));
657   EXPECT_TRUE(vixl::aarch64::w20.Is(Arm64Assembler::reg_w(W20)));
658   EXPECT_TRUE(vixl::aarch64::w21.Is(Arm64Assembler::reg_w(W21)));
659   EXPECT_TRUE(vixl::aarch64::w22.Is(Arm64Assembler::reg_w(W22)));
660   EXPECT_TRUE(vixl::aarch64::w23.Is(Arm64Assembler::reg_w(W23)));
661   EXPECT_TRUE(vixl::aarch64::w24.Is(Arm64Assembler::reg_w(W24)));
662   EXPECT_TRUE(vixl::aarch64::w25.Is(Arm64Assembler::reg_w(W25)));
663   EXPECT_TRUE(vixl::aarch64::w26.Is(Arm64Assembler::reg_w(W26)));
664   EXPECT_TRUE(vixl::aarch64::w27.Is(Arm64Assembler::reg_w(W27)));
665   EXPECT_TRUE(vixl::aarch64::w28.Is(Arm64Assembler::reg_w(W28)));
666   EXPECT_TRUE(vixl::aarch64::w29.Is(Arm64Assembler::reg_w(W29)));
667   EXPECT_TRUE(vixl::aarch64::w30.Is(Arm64Assembler::reg_w(W30)));
668   EXPECT_TRUE(vixl::aarch64::w31.Is(Arm64Assembler::reg_w(WZR)));
669   EXPECT_TRUE(vixl::aarch64::wzr.Is(Arm64Assembler::reg_w(WZR)));
670   EXPECT_TRUE(vixl::aarch64::wsp.Is(Arm64Assembler::reg_w(WSP)));
671 
672   // D Registers.
673   EXPECT_TRUE(vixl::aarch64::d0.Is(Arm64Assembler::reg_d(D0)));
674   EXPECT_TRUE(vixl::aarch64::d1.Is(Arm64Assembler::reg_d(D1)));
675   EXPECT_TRUE(vixl::aarch64::d2.Is(Arm64Assembler::reg_d(D2)));
676   EXPECT_TRUE(vixl::aarch64::d3.Is(Arm64Assembler::reg_d(D3)));
677   EXPECT_TRUE(vixl::aarch64::d4.Is(Arm64Assembler::reg_d(D4)));
678   EXPECT_TRUE(vixl::aarch64::d5.Is(Arm64Assembler::reg_d(D5)));
679   EXPECT_TRUE(vixl::aarch64::d6.Is(Arm64Assembler::reg_d(D6)));
680   EXPECT_TRUE(vixl::aarch64::d7.Is(Arm64Assembler::reg_d(D7)));
681   EXPECT_TRUE(vixl::aarch64::d8.Is(Arm64Assembler::reg_d(D8)));
682   EXPECT_TRUE(vixl::aarch64::d9.Is(Arm64Assembler::reg_d(D9)));
683   EXPECT_TRUE(vixl::aarch64::d10.Is(Arm64Assembler::reg_d(D10)));
684   EXPECT_TRUE(vixl::aarch64::d11.Is(Arm64Assembler::reg_d(D11)));
685   EXPECT_TRUE(vixl::aarch64::d12.Is(Arm64Assembler::reg_d(D12)));
686   EXPECT_TRUE(vixl::aarch64::d13.Is(Arm64Assembler::reg_d(D13)));
687   EXPECT_TRUE(vixl::aarch64::d14.Is(Arm64Assembler::reg_d(D14)));
688   EXPECT_TRUE(vixl::aarch64::d15.Is(Arm64Assembler::reg_d(D15)));
689   EXPECT_TRUE(vixl::aarch64::d16.Is(Arm64Assembler::reg_d(D16)));
690   EXPECT_TRUE(vixl::aarch64::d17.Is(Arm64Assembler::reg_d(D17)));
691   EXPECT_TRUE(vixl::aarch64::d18.Is(Arm64Assembler::reg_d(D18)));
692   EXPECT_TRUE(vixl::aarch64::d19.Is(Arm64Assembler::reg_d(D19)));
693   EXPECT_TRUE(vixl::aarch64::d20.Is(Arm64Assembler::reg_d(D20)));
694   EXPECT_TRUE(vixl::aarch64::d21.Is(Arm64Assembler::reg_d(D21)));
695   EXPECT_TRUE(vixl::aarch64::d22.Is(Arm64Assembler::reg_d(D22)));
696   EXPECT_TRUE(vixl::aarch64::d23.Is(Arm64Assembler::reg_d(D23)));
697   EXPECT_TRUE(vixl::aarch64::d24.Is(Arm64Assembler::reg_d(D24)));
698   EXPECT_TRUE(vixl::aarch64::d25.Is(Arm64Assembler::reg_d(D25)));
699   EXPECT_TRUE(vixl::aarch64::d26.Is(Arm64Assembler::reg_d(D26)));
700   EXPECT_TRUE(vixl::aarch64::d27.Is(Arm64Assembler::reg_d(D27)));
701   EXPECT_TRUE(vixl::aarch64::d28.Is(Arm64Assembler::reg_d(D28)));
702   EXPECT_TRUE(vixl::aarch64::d29.Is(Arm64Assembler::reg_d(D29)));
703   EXPECT_TRUE(vixl::aarch64::d30.Is(Arm64Assembler::reg_d(D30)));
704   EXPECT_TRUE(vixl::aarch64::d31.Is(Arm64Assembler::reg_d(D31)));
705 
706   // S Registers.
707   EXPECT_TRUE(vixl::aarch64::s0.Is(Arm64Assembler::reg_s(S0)));
708   EXPECT_TRUE(vixl::aarch64::s1.Is(Arm64Assembler::reg_s(S1)));
709   EXPECT_TRUE(vixl::aarch64::s2.Is(Arm64Assembler::reg_s(S2)));
710   EXPECT_TRUE(vixl::aarch64::s3.Is(Arm64Assembler::reg_s(S3)));
711   EXPECT_TRUE(vixl::aarch64::s4.Is(Arm64Assembler::reg_s(S4)));
712   EXPECT_TRUE(vixl::aarch64::s5.Is(Arm64Assembler::reg_s(S5)));
713   EXPECT_TRUE(vixl::aarch64::s6.Is(Arm64Assembler::reg_s(S6)));
714   EXPECT_TRUE(vixl::aarch64::s7.Is(Arm64Assembler::reg_s(S7)));
715   EXPECT_TRUE(vixl::aarch64::s8.Is(Arm64Assembler::reg_s(S8)));
716   EXPECT_TRUE(vixl::aarch64::s9.Is(Arm64Assembler::reg_s(S9)));
717   EXPECT_TRUE(vixl::aarch64::s10.Is(Arm64Assembler::reg_s(S10)));
718   EXPECT_TRUE(vixl::aarch64::s11.Is(Arm64Assembler::reg_s(S11)));
719   EXPECT_TRUE(vixl::aarch64::s12.Is(Arm64Assembler::reg_s(S12)));
720   EXPECT_TRUE(vixl::aarch64::s13.Is(Arm64Assembler::reg_s(S13)));
721   EXPECT_TRUE(vixl::aarch64::s14.Is(Arm64Assembler::reg_s(S14)));
722   EXPECT_TRUE(vixl::aarch64::s15.Is(Arm64Assembler::reg_s(S15)));
723   EXPECT_TRUE(vixl::aarch64::s16.Is(Arm64Assembler::reg_s(S16)));
724   EXPECT_TRUE(vixl::aarch64::s17.Is(Arm64Assembler::reg_s(S17)));
725   EXPECT_TRUE(vixl::aarch64::s18.Is(Arm64Assembler::reg_s(S18)));
726   EXPECT_TRUE(vixl::aarch64::s19.Is(Arm64Assembler::reg_s(S19)));
727   EXPECT_TRUE(vixl::aarch64::s20.Is(Arm64Assembler::reg_s(S20)));
728   EXPECT_TRUE(vixl::aarch64::s21.Is(Arm64Assembler::reg_s(S21)));
729   EXPECT_TRUE(vixl::aarch64::s22.Is(Arm64Assembler::reg_s(S22)));
730   EXPECT_TRUE(vixl::aarch64::s23.Is(Arm64Assembler::reg_s(S23)));
731   EXPECT_TRUE(vixl::aarch64::s24.Is(Arm64Assembler::reg_s(S24)));
732   EXPECT_TRUE(vixl::aarch64::s25.Is(Arm64Assembler::reg_s(S25)));
733   EXPECT_TRUE(vixl::aarch64::s26.Is(Arm64Assembler::reg_s(S26)));
734   EXPECT_TRUE(vixl::aarch64::s27.Is(Arm64Assembler::reg_s(S27)));
735   EXPECT_TRUE(vixl::aarch64::s28.Is(Arm64Assembler::reg_s(S28)));
736   EXPECT_TRUE(vixl::aarch64::s29.Is(Arm64Assembler::reg_s(S29)));
737   EXPECT_TRUE(vixl::aarch64::s30.Is(Arm64Assembler::reg_s(S30)));
738   EXPECT_TRUE(vixl::aarch64::s31.Is(Arm64Assembler::reg_s(S31)));
739 }
740 
741 }  // namespace arm64
742 }  // namespace art
743