/art/runtime/arch/arm64/ |
D | context_arm64.cc | 41 gprs_[SP] = &sp_; in Reset() 45 sp_ = kBadGprBase + SP; in Reset() 153 DCHECK_EQ(SP, 31); in DoLongJump() 168 untag_memory(__builtin_frame_address(0), reinterpret_cast<void*>(gprs[SP])); in DoLongJump() 172 __hwasan_handle_longjmp(reinterpret_cast<void*>(gprs[SP])); in DoLongJump()
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D | context_arm64.h | 42 SetGPR(SP, new_sp); in SetSP()
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D | registers_arm64.h | 58 SP = 31, // SP and XZR are encoded in instructions using the register enumerator
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/art/runtime/arch/riscv64/ |
D | context_riscv64.cc | 40 gprs_[SP] = &sp_; in Reset() 44 sp_ = kBadGprBase + SP; in Reset() 134 DCHECK_EQ(SP, 2); in DoLongJump() 147 __hwasan_handle_longjmp(reinterpret_cast<void*>(gprs[SP])); in DoLongJump()
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D | registers_riscv64.h | 30 SP = 2, // X2, stack pointer enumerator
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D | context_riscv64.h | 41 void SetSP(uintptr_t new_sp) override { SetGPR(SP, new_sp); } in SetSP()
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/art/compiler/utils/arm64/ |
D | jni_macro_assembler_arm64.cc | 70 StoreToOffset(TR, SP, offset.Int32Value()); in GetCurrentThread() 77 AddConstant(SP, -adjust); in IncreaseFrameSize() 86 AddConstant(SP, adjust); in DecreaseFrameSize() 97 static_assert(WSP == static_cast<std::underlying_type_t<XRegister>>(SP)); in CoreRegisterWithSize() 157 CHECK_NE(source, SP); in StoreToOffset() 170 Store(Arm64ManagedRegister::FromXRegister(SP), MemberOffset(offs.Int32Value()), m_src, size); in Store() 198 StoreToOffset(src.AsXRegister(), SP, offs.Int32Value()); in StoreRawPtr() 204 ___ Mov(scratch, reg_x(SP)); in StoreStackPointerToThread() 258 CHECK_NE(dest, SP); in LoadFromOffset() 280 CHECK_NE(dest.AsXRegister(), SP) << dest; in Load() [all …]
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D | managed_register_arm64_test.cc | 95 reg = Arm64ManagedRegister::FromXRegister(SP); in TEST() 103 EXPECT_EQ(SP, reg.AsXRegister()); in TEST() 159 xreg = Arm64ManagedRegister::FromXRegister(SP); in TEST() 298 Arm64ManagedRegister reg_SP = Arm64ManagedRegister::FromXRegister(SP); in TEST() 381 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP))); in TEST() 403 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP))); in TEST() 425 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP))); in TEST() 446 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP))); in TEST() 450 EXPECT_NE(SP, reg_o.AsOverlappingXRegister()); in TEST() 463 reg = Arm64ManagedRegister::FromXRegister(SP); in TEST() [all …]
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D | managed_register_arm64.h | 188 return IsXRegister() && (id_ == SP); in IsStackPointer()
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D | assembler_arm64.h | 164 if (code == SP) { in reg_x()
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/art/runtime/arch/arm/ |
D | context_arm.cc | 32 gprs_[SP] = &sp_; in Reset() 36 sp_ = kBadGprBase + SP; in Reset()
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D | registers_arm.h | 47 SP = 13, enumerator
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D | context_arm.h | 42 SetGPR(SP, new_sp); in SetSP()
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D | quick_entrypoints_arm.S | 516 mov sp, r0 @ Make SP point to gprs_. 517 @ Do not access fprs_ from now, they may be below SP. 521 ldr sp, [sp, #52] @ Load SP from gprs_ 52 = 4 * 13. 522 @ Do not access gprs_ from now, they are below SP. 1391 mov r3, sp @ pass SP 1392 blx artQuickProxyInvokeHandler @ (Method* proxy method, receiver, Thread*, SP) 1576 mov r2, sp @ pass SP 1577 blx artQuickToInterpreterBridge @ (Method* method, Thread*, SP) 2380 mov r2, sp @ r2 := SP 2381 bl artInvokePolymorphic @ artInvokePolymorphic(receiver, Thread*, SP) [all …]
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/art/compiler/optimizing/ |
D | common_arm64.h | 44 static_assert((SP == 31) && (WSP == 31) && (XZR == 32) && (WZR == 32), 48 if (code == SP) { in VIXLRegCodeFromART() 59 return SP; in ARTRegCodeFromVIXL()
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D | common_arm.h | 39 static_assert(vixl::aarch32::kSpCode == SP, "vixl::aarch32::kSpCode must equal ART's SP");
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D | code_generator_arm_vixl.cc | 2131 blocked_core_registers_[SP] = true; in SetupBlockedRegisters()
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/art/compiler/utils/riscv64/ |
D | managed_register_riscv64_test.cc | 43 reg = Riscv64ManagedRegister::FromXRegister(SP); in TEST() 47 EXPECT_EQ(SP, reg.AsXRegister()); in TEST()
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/art/libnativeloader/ |
D | README.md | 32 with the [VNDK-SP](https://source.android.com/devices/architecture/vndk#sp-hal)
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/art/compiler/utils/arm/ |
D | jni_macro_assembler_arm_vixl.cc | 279 Store(ArmManagedRegister::FromCoreRegister(SP), MemberOffset(dest.Int32Value()), m_src, size); in Store()
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