| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_builder.h | 365 #define ALU1(op) \ macro
404 ALU1(BFREV) in ALU2_ACC()
405 ALU1(CBIT) in ALU2_ACC()
408 ALU1(DIM) in ALU2_ACC()
413 ALU1(F16TO32) in ALU2_ACC()
414 ALU1(F32TO16) in ALU2_ACC()
415 ALU1(FBH) in ALU2_ACC()
416 ALU1(FBL) in ALU2_ACC()
417 ALU1(FRC) in ALU2_ACC()
419 ALU1(LZD) in ALU2_ACC()
[all …]
|
| D | brw_fs_builder.h | 527 #define ALU1(op) \ macro
566 ALU1(BFREV) in ALU2_ACC()
567 ALU1(CBIT) in ALU2_ACC()
569 ALU1(DIM) in ALU2_ACC()
574 ALU1(F16TO32) in ALU2_ACC()
575 ALU1(F32TO16) in ALU2_ACC()
576 ALU1(FBH) in ALU2_ACC()
577 ALU1(FBL) in ALU2_ACC()
578 ALU1(FRC) in ALU2_ACC()
580 ALU1(LZD) in ALU2_ACC()
[all …]
|
| D | brw_eu.h | 211 #define ALU1(OP) \ macro
229 ALU1(MOV)
231 ALU1(NOT) in ALU2()
237 ALU1(DIM) in ALU2()
242 ALU1(F32TO16) in ALU2()
243 ALU1(F16TO32) in ALU2()
247 ALU1(FRC) in ALU2()
248 ALU1(RNDD) in ALU2()
249 ALU1(RNDE) in ALU2()
250 ALU1(RNDU) in ALU2()
[all …]
|
| D | brw_vec4_visitor.cpp | 121 #define ALU1(op) \ macro
158 ALU1(NOT)
159 ALU1(MOV) in ALU1() function
160 ALU1(FRC) in ALU1()
161 ALU1(RNDD) in ALU1()
162 ALU1(RNDE) in ALU1()
163 ALU1(RNDZ) in ALU1()
164 ALU1(F32TO16) in ALU1()
165 ALU1(F16TO32) in ALU1()
179 ALU1(BFREV) in ALU1()
[all …]
|
| D | brw_eu_emit.c | 1001 #define ALU1(OP) \ macro
1067 ALU1(NOT) in ALU1() function
1073 ALU1(DIM) in ALU1()
1078 ALU1(FRC) in ALU1()
1079 ALU1(RNDD) in ALU1()
1080 ALU1(RNDE) in ALU1()
1081 ALU1(RNDU) in ALU1()
1082 ALU1(RNDZ) in ALU1()
1085 ALU1(LZD) in ALU1()
1092 ALU1(BFREV) in ALU1()
[all …]
|
| /external/mesa3d/src/gallium/drivers/nouveau/nvc0/mme/ |
| D | comc597.mme.h | 155 MME_INSN(0, MERGE, R7, ZERO, R1, (1<<10)|(5<<5)|0, ALU1, NONE,
158 ADD, ZERO, R5, ZERO, 0, NONE, ALU1),
159 MME_INSN(1, ADD, ZERO, R7, IMMED, (1<<12)|0x0600/4, ALU0, ALU1,
179 MERGE, ZERO, ZERO, R1, (0<<10)|(1<<5)|1, NONE, ALU1),
181 MERGE, ZERO, ZERO, R1, (0<<10)|(1<<5)|3, NONE, ALU1),
183 MERGE, ZERO, ZERO, R1, (0<<10)|(1<<5)|5, NONE, ALU1),
185 MERGE, ZERO, ZERO, R1, (0<<10)|(1<<5)|7, NONE, ALU1),
399 ADD, ZERO, R6, ZERO, 0, NONE, ALU1),
413 ADD, ZERO, R2, ZERO, 0x0d78/4, IMMED1, ALU1),
462 ADD, ZERO, R4, ZERO, 256 + 160, NONE, ALU1),
[all …]
|
| /external/igt-gpu-tools/assembler/ |
| D | brw_eu.h | 129 #define ALU1(OP) \ macro
150 ALU1(MOV)
152 ALU1(NOT)
165 ALU1(FRC)
166 ALU1(RNDD)
169 ALU1(LZD)
181 #undef ALU1
|
| D | brw_eu_emit.c | 923 #define ALU1(OP) \ macro
976 ALU1(MOV)
978 ALU1(NOT) in ALU2()
987 ALU1(FRC) in ALU2()
988 ALU1(RNDD) in ALU2()
991 ALU1(LZD) in ALU2()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ScheduleBtVer2.td | 35 def JALU1 : ProcResource<1>; // Integer Pipe1: integer ALU1/MUL/DIV
|
| D | X86ScheduleAtom.td | 22 def Port1 : FuncUnit; // ALU: ALU1, bit processing, jump, and LEA
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ScheduleAtom.td | 37 def AtomPort1 : ProcResource<1>; // ALU: ALU1, bit processing, jump, and LEA
|
| D | X86ScheduleBtVer2.td | 34 def JALU1 : ProcResource<1>; // Integer Pipe1: integer ALU1/MUL/DIV
|
| D | X86ScheduleZnver2.td | 84 // Integer Multiplication issued on ALU1.
|
| D | X86ScheduleZnver1.td | 83 // Integer Multiplication issued on ALU1.
|