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Searched refs:ATOMIC_LOAD_ADD (Results 1 – 25 of 32) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h728 ATOMIC_LOAD_ADD, enumerator
DSelectionDAGNodes.h1103 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
1184 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h872 ATOMIC_LOAD_ADD, enumerator
DSelectionDAGNodes.h1401 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
1458 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp67 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; in getOperationName()
DLegalizeIntegerTypes.cpp142 case ISD::ATOMIC_LOAD_ADD: in PromoteIntegerResult()
1337 case ISD::ATOMIC_LOAD_ADD: in ExpandIntegerResult()
DSelectionDAG.cpp466 case ISD::ATOMIC_LOAD_ADD: in AddNodeIDCustom()
4908 assert((Opcode == ISD::ATOMIC_LOAD_ADD || in getAtomic()
DLegalizeDAG.cpp3767 case ISD::ATOMIC_LOAD_ADD: in ConvertNodeToLibcall()
DSelectionDAGBuilder.cpp3935 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break; in visitAtomicRMW()
/external/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp134 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp133 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; in getOperationName()
DLegalizeIntegerTypes.cpp171 case ISD::ATOMIC_LOAD_ADD: in PromoteIntegerResult()
1836 case ISD::ATOMIC_LOAD_ADD: in ExpandIntegerResult()
DSelectionDAG.cpp607 case ISD::ATOMIC_LOAD_ADD: in AddNodeIDCustom()
6619 assert((Opcode == ISD::ATOMIC_LOAD_ADD || in getAtomic()
DLegalizeDAG.cpp3895 case ISD::ATOMIC_LOAD_ADD: in ConvertNodeToLibcall()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp467 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_ADD, SYNC_FETCH_AND_ADD) in getSYNC()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp244 setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD); in SITargetLowering()
3010 case ISD::ATOMIC_LOAD_ADD: in PerformDAGCombine()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp742 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_ADD, SYNC_FETCH_AND_ADD) in getSYNC()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td498 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp205 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Custom); in SystemZTargetLowering()
3303 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB()
4535 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp234 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Custom); in SystemZTargetLowering()
3922 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB()
5155 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td586 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp441 setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom); in X86TargetLowering()
21177 case ISD::ATOMIC_LOAD_ADD: in lowerAtomicArithWithLOCK()
21222 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, VT, Chain, LHS, in lowerAtomicArith()
21226 assert(Opc == ISD::ATOMIC_LOAD_ADD && in lowerAtomicArith()
21667 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
22027 case ISD::ATOMIC_LOAD_ADD: in ReplaceNodeResults()
26971 if (Opc != ISD::ATOMIC_LOAD_ADD && Opc != ISD::ATOMIC_LOAD_SUB) in combineSetCCAtomicArith()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp753 setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD); in SITargetLowering()
10027 case ISD::ATOMIC_LOAD_ADD: in PerformDAGCombine()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp461 setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom); in X86TargetLowering()
27969 case ISD::ATOMIC_LOAD_ADD: in lowerAtomicArithWithLOCK()
28015 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, VT, Chain, LHS, in lowerAtomicArith()
28018 assert(Opc == ISD::ATOMIC_LOAD_ADD && in lowerAtomicArith()
28542 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
29451 case ISD::ATOMIC_LOAD_ADD: in ReplaceNodeResults()
38372 if (Opc != ISD::ATOMIC_LOAD_ADD && Opc != ISD::ATOMIC_LOAD_SUB) in combineSetCCAtomicArith()

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